embeddedsw/lib/sw_services/xilpm/src/common/pm_ipi_buffer.h
Soren Brinkmann 69bae79a14 xilpm: Expand 'req' to 'request'
To avoid confustion between request vs requirement, spell them out.

Scripted change:
  find -type f -name "*.[chS]" -exec sed -i -e 's/PM_REQ_WAKEUP/PM_REQUEST_WAKEUP/g' -e 's/PM_REQ_SUSPEND/PM_REQUEST_SUSPEND/g' -e 's/PM_REQ_NODE/PM_REQUEST_NODE/g' -e 's/REQ_ACK_NO/REQUEST_ACK_NO/g' -e 's/REQ_ACK_BLOCKING/REQUEST_ACK_BLOCKING/g' -e 's/REQ_ACK_CB_STANDARD/REQUEST_ACK_CB_STANDARD/g' -e 's/REQ_ACK_CB_ERROR/REQUEST_ACK_CB_CERROR/g' -e 's/IPI_BUFFER_REQ_OFFSET/IPI_BUFFER_REQUEST_OFFSET/g' -e 's/XPm_ReqSuspend/XPm_RequestSuspend/g' -e 's/XPm_ReqWakeUp/XPm_RequestWakeUp/g' -e 's/XPm_ReqNode/XPm_RequestNode/g' '{}' ';'

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2015-06-03 18:40:00 +05:30

58 lines
2.6 KiB
C

/******************************************************************************
*
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
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* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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******************************************************************************/
#ifndef PM_IPI_BUFFER_H_
#define PM_IPI_BUFFER_H_
#define IPI_BUFFER_BASEADDR 0xFF990000U
#define IPI_BUFFER_RPU_0_BASE (IPI_BUFFER_BASEADDR + 0x0U)
#define IPI_BUFFER_RPU_1_BASE (IPI_BUFFER_BASEADDR + 0x200U)
#define IPI_BUFFER_APU_BASE (IPI_BUFFER_BASEADDR + 0x400U)
#define IPI_BUFFER_PL_0_BASE (IPI_BUFFER_BASEADDR + 0x600U)
#define IPI_BUFFER_PL_1_BASE (IPI_BUFFER_BASEADDR + 0x800U)
#define IPI_BUFFER_PL_2_BASE (IPI_BUFFER_BASEADDR + 0xA00U)
#define IPI_BUFFER_PL_3_BASE (IPI_BUFFER_BASEADDR + 0xC00U)
#define IPI_BUFFER_PMU_BASE (IPI_BUFFER_BASEADDR + 0xE00U)
#define IPI_BUFFER_TARGET_RPU_0_OFFSET 0x0U
#define IPI_BUFFER_TARGET_RPU_1_OFFSET 0x40U
#define IPI_BUFFER_TARGET_APU_OFFSET 0x80U
#define IPI_BUFFER_TARGET_PL_0_OFFSET 0xC0U
#define IPI_BUFFER_TARGET_PL_1_OFFSET 0x100U
#define IPI_BUFFER_TARGET_PL_2_OFFSET 0x140U
#define IPI_BUFFER_TARGET_PL_3_OFFSET 0x180U
#define IPI_BUFFER_TARGET_PMU_OFFSET 0x1C0U
#define IPI_BUFFER_REQUEST_OFFSET 0x0U
#define IPI_BUFFER_RESP_OFFSET 0x20U
#endif