Andrei-Liviu Simion 7619fa4f90 dp: Handle new PHY_CONFIG bit for 8b10b encoding. ... Bit 21 of DPTX register PHY_CONFIG (0x200) enables 8b10b encoding. In v6.0 of the DPTX core, the default value is '1'. Current driver should keep this value untouched when writing to the PHY_CONFIG register. Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>		2015-04-27 12:56:51 +05:30
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data	dp : added hsi namespace to xdefine procs.	2015-04-26 10:35:19 +05:30
doc/html/api	dp: Update Doxygen documentation.	2015-04-26 10:34:41 +05:30
examples	dp: rx: example: Set up handlers after core configuration has complete.	2015-04-26 10:34:38 +05:30
src	dp: Handle new PHY_CONFIG bit for 8b10b encoding.	2015-04-27 12:56:51 +05:30