
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
605 lines
16 KiB
C
Executable file
605 lines
16 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xaxicdma_example_sg_poll.c
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*
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* This file demonstrates how to use the xaxicdma driver on the Xilinx AXI
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* CDMA core (AXICDMA) to transfer packets in scatter gather transfer mode
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* without interrupt.
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*
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* The completion of the transfer is checked through polling. Using polling
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* mode can give better performance on an idle system, where the DMA engine
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* is lowly loaded, and the application has nothing else to do. The polling
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* mode can yield better turn-around time for DMA transfers.
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*
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* To see the debug print, you need a uart16550 or uartlite in your system,
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* and please set "-DDEBUG" in your compiler options for the example, also
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* comment out the "#undef DEBUG" in xdebug.h. You need to rebuild your
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* software executable.
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*
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* Make sure that MEMORY_BASE is defined properly as per the HW system.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a jz 07/30/10 First release
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* 2.01a rkv 01/28/11 Modified function prototype of XAxiCdma_SgPollExample to
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* a function taking only one arguments i.e. device id.
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* 2.01a srt 03/05/12 Added V7 DDR Base Address to fix CR 649405.
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* Modified Flushing and Invalidation of Caches to fix CRs
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* 648103, 648701.
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* 2.02a srt 03/01/13 Updated DDR base address for IPI designs (CR 703656).
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* </pre>
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*
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****************************************************************************/
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#include "xaxicdma.h"
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#include "xdebug.h"
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#include "xenv.h" /* memset */
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#include "xil_cache.h"
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#include "xparameters.h"
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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#include "xuartns550_l.h" /* to use uartns550 */
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#endif
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#if (!defined(DEBUG))
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extern void xil_printf(const char *format, ...);
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#endif
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/******************** Constant Definitions **********************************/
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/*
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* Device hardware build related constants.
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*/
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#ifndef TESTAPP_GEN
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#define DMA_CTRL_DEVICE_ID XPAR_AXICDMA_0_DEVICE_ID
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#endif
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#ifdef XPAR_V6DDR_0_S_AXI_BASEADDR
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#define MEMORY_BASE XPAR_V6DDR_0_S_AXI_BASEADDR
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#elif XPAR_S6DDR_0_S0_AXI_BASEADDR
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#define MEMORY_BASE XPAR_S6DDR_0_S0_AXI_BASEADDR
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#elif XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
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#define MEMORY_BASE XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
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#elif XPAR_MIG7SERIES_0_BASEADDR
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#define MEMORY_BASE XPAR_MIG7SERIES_0_BASEADDR
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#else
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#warning CHECK FOR THE VALID DDR ADDRESS IN XPARAMETERS.H, \
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DEFAULT SET TO 0x01000000
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#define MEMORY_BASE 0x01000000
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#endif
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#define BD_SPACE_BASE (MEMORY_BASE + 0x03000000)
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#define BD_SPACE_HIGH (MEMORY_BASE + 0x03001FFF)
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#define TX_BUFFER_BASE (MEMORY_BASE + 0x00630000)
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#define RX_BUFFER_BASE (MEMORY_BASE + 0x00660000)
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#define RX_BUFFER_HIGH (MEMORY_BASE + 0x0068FFFF)
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#define MAX_PKT_LEN 128
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/* Number of BDs in the transfer example
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* We show how to submit multiple BDs for one transmit.
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*/
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#define NUMBER_OF_BDS_TO_TRANSFER 1
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#define RESET_LOOP_COUNT 10 /* Number of times to check reset is done */
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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static void Uart550_Setup(void);
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#endif
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static int CheckCompletion(XAxiCdma *InstancePtr);
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static int SetupTransfer(XAxiCdma * InstancePtr);
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static int DoTransfer(XAxiCdma * InstancePtr);
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static int CheckData(u8 *SrcPtr, u8 *DestPtr, int Length);
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int XAxiCdma_SgPollExample(u16 DeviceId);
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/************************** Variable Definitions *****************************/
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static XAxiCdma AxiCdmaInstance; /* Instance of the XAxiCdma */
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/* Transmit buffer for DMA transfer.
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*/
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static u32 *TransmitBufferPtr = (u32 *) TX_BUFFER_BASE;
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static u32 *ReceiveBufferPtr = (u32 *) RX_BUFFER_BASE;
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/* Shared variables used to test the callbacks.
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*/
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volatile static int Done = 0; /* Dma transfer is done */
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volatile static int Error = 0; /* Dma Bus Error occurs */
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/*****************************************************************************/
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/*
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* The entry point for this example. It sets up uart16550 if one is available,
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* invokes the example function, and reports the execution status.
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*
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* @param None.
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*
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* @return
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* - XST_SUCCESS if example finishes successfully
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* - XST_FAILURE if example fails.
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*
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* @note None.
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*
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******************************************************************************/
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#ifndef TESTAPP_GEN
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int main()
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{
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int Status;
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#ifdef XPAR_UARTNS550_0_BASEADDR
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Uart550_Setup();
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#endif
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xil_printf("\r\n--- Entering main() --- \r\n");
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/* Run the interrupt example for simple transfer
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*/
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Status = XAxiCdma_SgPollExample(DMA_CTRL_DEVICE_ID);
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if (Status != XST_SUCCESS) {
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xil_printf("XAxiCdma_SgPollExample: Failed\r\n");
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return XST_FAILURE;
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}
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xil_printf("XAxiCdma_SgPollExample: Passed\r\n");
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xil_printf("--- Exiting main() --- \r\n");
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return XST_SUCCESS;
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}
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#endif
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#if defined(XPAR_UARTNS550_0_BASEADDR)
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/*****************************************************************************/
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/*
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* This function setup the baudrate to 9600 and data bits to 8 in Uart16550
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*
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* @param None
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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static void Uart550_Setup(void)
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{
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/* Set the baudrate to be predictable
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*/
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XUartNs550_SetBaud(XPAR_UARTNS550_0_BASEADDR,
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XPAR_XUARTNS550_CLOCK_HZ, 9600);
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XUartNs550_SetLineControlReg(XPAR_UARTNS550_0_BASEADDR,
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XUN_LCR_8_DATA_BITS);
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}
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#endif
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/*****************************************************************************/
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/*
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* Check for transfer completion.
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*
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* If the DMA engine has errors or any of the finished BDs has error bit set,
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* then the example should fail.
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*
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* @param InstancePtr is pointer to the XAxiCdma instance.
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*
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* @return Number of Bds that have been completed by hardware.
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*
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* @note None
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*
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******************************************************************************/
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static int CheckCompletion(XAxiCdma *InstancePtr)
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{
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int BdCount;
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XAxiCdma_Bd *BdPtr;
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XAxiCdma_Bd *BdCurPtr;
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int Status;
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int Index;
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/* Check whether the hardware has encountered any problems.
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* In some error cases, the DMA engine may not able to update the
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* BD that has caused the problem.
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*/
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if (XAxiCdma_GetError(InstancePtr) != 0x0) {
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xdbg_printf(XDBG_DEBUG_ERROR, "Transfer error %x\r\n",
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(unsigned int)XAxiCdma_GetError(InstancePtr));
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Error = 1;
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return 0;
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}
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/* Get all processed BDs from hardware
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*/
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BdCount = XAxiCdma_BdRingFromHw(InstancePtr, XAXICDMA_ALL_BDS, &BdPtr);
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/* Check finished BDs then release them
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*/
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if(BdCount > 0) {
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BdCurPtr = BdPtr;
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for (Index = 0; Index < BdCount; Index++) {
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/* If the completed BD has error bit set,
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* then the example fails
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*/
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if (XAxiCdma_BdGetSts(BdCurPtr) &
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XAXICDMA_BD_STS_ALL_ERR_MASK) {
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Error = 1;
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return 0;
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}
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BdCurPtr = XAxiCdma_BdRingNext(InstancePtr, BdCurPtr);
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}
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/* Release the BDs so later submission can use them
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*/
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Status = XAxiCdma_BdRingFree(InstancePtr, BdCount, BdPtr);
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if(Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Error free BD %x\r\n", Status);
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Error = 1;
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return 0;
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}
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Done += BdCount;
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}
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return Done;
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}
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/*****************************************************************************/
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/**
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*
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* This function sets up the DMA engine to be ready for scatter gather transfer
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*
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* @param InstancePtr is pointer to the XAxiCdma instance.
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*
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* @return
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* - XST_SUCCESS if the setup is successful
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* - XST_FAILURE if error occurs
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*
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* @note None
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*
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******************************************************************************/
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static int SetupTransfer(XAxiCdma * InstancePtr)
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{
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int Status;
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XAxiCdma_Bd BdTemplate;
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int BdCount;
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u8 *SrcBufferPtr;
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int Index;
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/* Disable all interrupts
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*/
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XAxiCdma_IntrDisable(InstancePtr, XAXICDMA_XR_IRQ_ALL_MASK);
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/* Setup BD ring */
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BdCount = XAxiCdma_BdRingCntCalc(XAXICDMA_BD_MINIMUM_ALIGNMENT,
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BD_SPACE_HIGH - BD_SPACE_BASE + 1,
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(u32)BD_SPACE_BASE);
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Status = XAxiCdma_BdRingCreate(InstancePtr, BD_SPACE_BASE,
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BD_SPACE_BASE, XAXICDMA_BD_MINIMUM_ALIGNMENT, BdCount);
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if (Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR, "Create BD ring failed %d\r\n",
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Status);
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return XST_FAILURE;
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}
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/*
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* Setup a BD template to copy to every BD.
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*/
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XAxiCdma_BdClear(&BdTemplate);
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Status = XAxiCdma_BdRingClone(InstancePtr, &BdTemplate);
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if (Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR, "Clone BD ring failed %d\r\n",
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Status);
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return XST_FAILURE;
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}
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/* Initialize receive buffer to 0's and transmit buffer with pattern
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*/
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memset((void *)ReceiveBufferPtr, 0,
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MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
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SrcBufferPtr = (u8 *)TransmitBufferPtr;
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for(Index = 0; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER; Index++) {
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SrcBufferPtr[Index] = Index & 0xFF;
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}
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/* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
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* is enabled
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*/
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Xil_DCacheFlushRange((u32)TransmitBufferPtr,
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MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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*
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* This function non-blockingly transmits all packets through the DMA engine.
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*
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* @param InstancePtr points to the DMA engine instance
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*
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* @return
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* - XST_SUCCESS if the DMA accepts all the packets successfully,
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* - XST_FAILURE if error occurs
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*
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* @note None
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*
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******************************************************************************/
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static int DoTransfer(XAxiCdma * InstancePtr)
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{
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XAxiCdma_Bd *BdPtr;
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XAxiCdma_Bd *BdCurPtr;
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int Status;
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int Index;
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u32 SrcBufferAddr;
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u32 DstBufferAddr;
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Status = XAxiCdma_BdRingAlloc(InstancePtr,
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NUMBER_OF_BDS_TO_TRANSFER, &BdPtr);
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if (Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR, "Failed bd alloc\r\n");
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return XST_FAILURE;
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}
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SrcBufferAddr = (u32)TransmitBufferPtr;
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DstBufferAddr = (u32)ReceiveBufferPtr;
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BdCurPtr = BdPtr;
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/* Set up the BDs
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*/
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for(Index = 0; Index < NUMBER_OF_BDS_TO_TRANSFER; Index++) {
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Status = XAxiCdma_BdSetSrcBufAddr(BdCurPtr, SrcBufferAddr);
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if(Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Set src addr failed %d, %x/%x\r\n",
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Status, (unsigned int)BdCurPtr,
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(unsigned int)SrcBufferAddr);
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return XST_FAILURE;
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}
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Status = XAxiCdma_BdSetDstBufAddr(BdCurPtr, DstBufferAddr);
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if(Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Set dst addr failed %d, %x/%x\r\n",
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Status, (unsigned int)BdCurPtr,
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(unsigned int)DstBufferAddr);
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return XST_FAILURE;
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}
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Status = XAxiCdma_BdSetLength(BdCurPtr, MAX_PKT_LEN);
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if(Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Set BD length failed %d\r\n", Status);
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return XST_FAILURE;
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}
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SrcBufferAddr += MAX_PKT_LEN;
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DstBufferAddr += MAX_PKT_LEN;
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BdCurPtr = XAxiCdma_BdRingNext(InstancePtr, BdCurPtr);
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}
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/* Give the BDs to hardware */
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Status = XAxiCdma_BdRingToHw(InstancePtr, NUMBER_OF_BDS_TO_TRANSFER,
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BdPtr, NULL, NULL);
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if (Status != XST_SUCCESS) {
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xdbg_printf(XDBG_DEBUG_ERROR, "Failed to hw %d\r\n", Status);
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/*
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* This function checks that two buffers have the same data
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*
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* @param SrcPtr is the source buffer
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* @param DestPtr is the destination buffer
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* @param Length is the length of the buffer to check
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*
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* @return
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* - XST_SUCCESS if the two buffer matches
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* - XST_FAILURE otherwise
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*
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* @note None
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*
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******************************************************************************/
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static int CheckData(u8 *SrcPtr, u8 *DestPtr, int Length)
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{
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int Index;
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/* Invalidate the DestBuffer before receiving the data, in case the
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* Data Cache is enabled
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*/
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Xil_DCacheInvalidateRange((u32)DestPtr, Length);
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for (Index = 0; Index < Length; Index++) {
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if ( DestPtr[Index] != SrcPtr[Index]) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Data check failure %d: %x/%x\r\n",
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Index, DestPtr[Index], SrcPtr[Index]);
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return XST_FAILURE;
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}
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* The example to do the scatter gather transfer through polling.
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*
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* @param DeviceId is the Device Id of the XAxiCdma instance
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*
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* @return
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* - XST_SUCCESS if example finishes successfully
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* - XST_FAILURE if error occurs
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*
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* @note None
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*
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******************************************************************************/
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int XAxiCdma_SgPollExample(u16 DeviceId)
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{
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XAxiCdma_Config *CfgPtr;
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int Status;
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u8 *SrcPtr;
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u8 *DstPtr;
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SrcPtr = (u8 *)TransmitBufferPtr;
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DstPtr = (u8 *)ReceiveBufferPtr;
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/* Initialize the XAxiCdma device.
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*/
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CfgPtr = XAxiCdma_LookupConfig(DeviceId);
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if (!CfgPtr) {
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xdbg_printf(XDBG_DEBUG_ERROR,
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"Cannot find config structure for device %d\r\n",
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XPAR_AXICDMA_0_DEVICE_ID);
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return XST_FAILURE;
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}
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Status = XAxiCdma_CfgInitialize(&AxiCdmaInstance, CfgPtr,
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CfgPtr->BaseAddress);
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if (Status != XST_SUCCESS) {
|
|
xdbg_printf(XDBG_DEBUG_ERROR,
|
|
"Initialization failed with %d\r\n", Status);
|
|
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/* Setup the BD ring
|
|
*/
|
|
Status = SetupTransfer(&AxiCdmaInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
xdbg_printf(XDBG_DEBUG_ERROR,
|
|
"Setup BD ring failed with %d\r\n", Status);
|
|
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
Done = 0;
|
|
Error = 0;
|
|
|
|
/* Start the DMA transfer
|
|
*/
|
|
Status = DoTransfer(&AxiCdmaInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
xdbg_printf(XDBG_DEBUG_ERROR,
|
|
"Do transfer failed with %d\r\n", Status);
|
|
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/* Wait until the DMA transfer is done or error occurs
|
|
*/
|
|
while ((CheckCompletion(&AxiCdmaInstance) < NUMBER_OF_BDS_TO_TRANSFER)
|
|
&& !Error) {
|
|
/* Wait */
|
|
}
|
|
|
|
if(Error) {
|
|
int TimeOut = RESET_LOOP_COUNT;
|
|
|
|
xdbg_printf(XDBG_DEBUG_ERROR, "Transfer has error %x\r\n",
|
|
Error);
|
|
|
|
/* Need to reset the hardware to restore to the correct state
|
|
*/
|
|
XAxiCdma_Reset(&AxiCdmaInstance);
|
|
|
|
while (TimeOut) {
|
|
if (XAxiCdma_ResetIsDone(&AxiCdmaInstance)) {
|
|
break;
|
|
}
|
|
TimeOut -= 1;
|
|
}
|
|
|
|
/* Reset has failed, print a message to notify the user
|
|
*/
|
|
if (!TimeOut) {
|
|
xdbg_printf(XDBG_DEBUG_ERROR,
|
|
"Reset hardware failed with %d\r\n", Status);
|
|
|
|
}
|
|
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/* Transfer completed successfully, check data
|
|
*/
|
|
Status = CheckData(SrcPtr, DstPtr,
|
|
MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
|
|
if (Status != XST_SUCCESS) {
|
|
xdbg_printf(XDBG_DEBUG_ERROR, "Check data failed for sg "
|
|
"transfer\r\n");
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/* Test finishes successfully, return successfully
|
|
*/
|
|
return XST_SUCCESS;
|
|
}
|
|
|
|
|
|
|