
There are 4 Filter coefficient tables available. The table to be loaded in the IP is determined by the scaling ratio Scale Up: Always use 6tap Scale Dn: Different table selected based on scaling ration Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
184 lines
6.5 KiB
C
184 lines
6.5 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xv_hscaler_l2.h
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* @addtogroup v_hscaler_v1_0
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* @{
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* @details
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*
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* This header file contains layer 2 API's of the horizontal scaler sub-core
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* driver.The functions contained herein provides a high level implementation of
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* features provided by the IP, abstracting away the register level details from
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* the user
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*
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* <b>H Scaler IP Features </b>
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*
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* This H-Scaler IP supports following features
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* - 3 Channel Scaler with RGB, YUV444 and YUV422 support
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* - Scale horizontally to 4K line at 60Hz
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* - up to 16bits color depth
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* - 1, 2 or 4 pixel per clock processing
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*
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* <b>Dependency</b>
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*
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* This driver makes use of the video enumerations and data types defined in the
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* Xilinx Video Common Driver (video_common_vX.x) and as such the common driver
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* must be included as dependency to compile this driver
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* <b>Initialization & Configuration</b>
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*
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* The device driver enables higher layer software (e.g., an application) to
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* communicate to the hscaler core.
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*
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* Before using the layer-2 API's user must initialize the core by calling
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* Layer-1 API XV_hscaler_Initialize(). This function will look for a
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* configuration structure for the device and initialize it to defined HW
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* settings. After initialization Layer-2 API's can be used to configure
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* the core. It is recommended user always make use of Layer-2 API to
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* interact with this core.
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* Advanced users always have the capability to directly interact with the IP
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* core using Layer-1 API's that perform low level register peek/poke.
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*
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* <b> Interrupts </b>
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*
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* This driver does not have any interrupts
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*
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* <b> Virtual Memory </b>
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*
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* This driver supports Virtual Memory. The RTOS is responsible for calculating
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* the correct device base address in Virtual Memory space.
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*
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* <b> Threads </b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b>Limitations</b>
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*
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* Current implementation of "computed coefficients" is non-entrant. If multiple
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* instances of the core are used in the design, user application has to make sure
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* that scaler configuration is an atomic operation and cannot be interrupted in
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* middle to context switch to a different instance of the core
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* However fixed coefficient version of the code (default) is safe to be used with
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* multiple instances of the core.
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* i.e. SCALER_FIXED_COEFF should always be 1
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00 rco 07/21/15 Initial Release
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* </pre>
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*
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******************************************************************************/
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#ifndef XV_HSCALER_L2_H /* prevent circular inclusions */
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#define XV_HSCALER_L2_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "xvidc.h"
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#include "xv_hscaler.h"
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/************************** Constant Definitions *****************************/
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/** @name Hw Configuration
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* @{
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* The following constants define the scaler HW MAX configuration
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*/
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#define XV_HSCALER_MAX_H_TAPS (12)
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#define XV_HSCALER_MAX_H_PHASES (64)
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#define XV_HSCALER_MAX_LINE_WIDTH (3840)
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/**************************** Type Definitions *******************************/
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/**
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* This typedef enumerates the Scaler Type
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*/
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typedef enum
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{
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XV_HSCALER_BILINEAR = 0,
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XV_HSCALER_BICUBIC,
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XV_HSCALER_POLYPHASE
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}XV_HSCALER_TYPE;
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/**
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* This typedef enumerates the supported taps
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*/
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typedef enum
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{
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XV_HSCALER_TAPS_6 = 6,
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XV_HSCALER_TAPS_8 = 8,
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XV_HSCALER_TAPS_10 = 10,
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XV_HSCALER_TAPS_12 = 12
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}XV_HSCALER_TAPS;
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/**
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* H Scaler Layer 2 data. The user is required to allocate a variable
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* of this type for every H Scaler device in the system. A pointer to a
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* variable of this type is then passed to the driver API functions.
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*/
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typedef struct
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{
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u8 UseExtCoeff;
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short coeff[XV_HSCALER_MAX_H_PHASES][XV_HSCALER_MAX_H_TAPS];
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u64 phasesH[XV_HSCALER_MAX_LINE_WIDTH];
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}XV_hscaler_l2;
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/************************** Macros Definitions *******************************/
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/************************** Function Prototypes ******************************/
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void XV_HScalerStart(XV_hscaler *InstancePtr);
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void XV_HScalerStop(XV_hscaler *InstancePtr);
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void XV_HScalerLoadExtCoeff(XV_hscaler *InstancePtr,
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XV_hscaler_l2 *HscL2DataPtr,
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u16 num_phases,
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u16 num_taps,
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const short *Coeff);
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void XV_HScalerSetup(XV_hscaler *InstancePtr,
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XV_hscaler_l2 *HscL2DataPtr,
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u32 HeightIn,
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u32 WidthIn,
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u32 WidthOut,
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u32 cformat);
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void XV_HScalerDbgReportStatus(XV_hscaler *InstancePtr);
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#ifdef __cplusplus
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}
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#endif
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#endif
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/** @} */
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