2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
523 lines
19 KiB
C
Executable file
523 lines
19 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xaxidma_bdring.h
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*
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* This file contains DMA channel related structure and constant definition
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* as well as function prototypes. Each DMA channel is managed by a Buffer
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* Descriptor ring, and XAxiDma_BdRing is chosen as the symbol prefix used in
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* this file. See xaxidma.h for more information on how a BD ring is managed.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a jz 05/18/10 First release
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* 2.00a jz 08/10/10 Second release, added in xaxidma_g.c, xaxidma_sinit.c,
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* updated tcl file, added xaxidma_porting_guide.h
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* 3.00a jz 11/22/10 Support IP core parameters change
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* 6.00a srt 01/24/12 Added support for Multi-Channel DMA.
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* - New API
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* * XAxiDma_UpdateBdRingCDesc(XAxiDma_BdRing * RingPtr,
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* int RingIndex)
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* - Changed APIs
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* * XAxiDma_StartBdRingHw(XAxiDma_BdRing * RingPtr,
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* int RingIndex)
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* * XAxiDma_BdRingStart(XAxiDma_BdRing * RingPtr,
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* int RingIndex)
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* * XAxiDma_BdRingToHw(XAxiDma_BdRing * RingPtr,
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* int NumBd, XAxiDma_Bd * BdSetPtr, int RingIndex)
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* * XAxiDma_BdRingDumpRegs(XAxiDma_BdRing * RingPtr,
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* int RingIndex)
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* * XAxiDma_BdRingSnapShotCurrBd(XAxiDma_BdRing * RingPtr,
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* int RingIndex)
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* 7.00a srt 06/18/12 All the APIs changed in v6_00_a are reverted back for
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* backward compatibility.
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*
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*
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* </pre>
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*
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******************************************************************************/
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#ifndef XAXIDMA_BDRING_H_ /* prevent circular inclusions */
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#define XAXIDMA_BDRING_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xstatus.h"
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#include "xaxidma_bd.h"
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/************************** Constant Definitions *****************************/
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/* State of a DMA channel
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*/
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#define AXIDMA_CHANNEL_NOT_HALTED 1
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#define AXIDMA_CHANNEL_HALTED 2
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/* Argument constant to simplify argument setting
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*/
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#define XAXIDMA_NO_CHANGE 0xFFFFFFFF
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#define XAXIDMA_ALL_BDS 0x0FFFFFFF /* 268 Million */
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/**************************** Type Definitions *******************************/
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/** Container structure for descriptor storage control. If address translation
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* is enabled, then all addresses and pointers excluding FirstBdPhysAddr are
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* expressed in terms of the virtual address.
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*/
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typedef struct {
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u32 ChanBase; /**< physical base address*/
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int IsRxChannel; /**< Is this a receive channel */
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volatile int RunState; /**< Whether channel is running */
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int HasStsCntrlStrm; /**< Whether has stscntrl stream */
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int HasDRE;
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int DataWidth;
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u32 MaxTransferLen;
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u32 FirstBdPhysAddr; /**< Physical address of 1st BD in list */
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u32 FirstBdAddr; /**< Virtual address of 1st BD in list */
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u32 LastBdAddr; /**< Virtual address of last BD in the list */
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u32 Length; /**< Total size of ring in bytes */
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u32 Separation; /**< Number of bytes between the starting
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address of adjacent BDs */
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XAxiDma_Bd *FreeHead; /**< First BD in the free group */
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XAxiDma_Bd *PreHead; /**< First BD in the pre-work group */
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XAxiDma_Bd *HwHead; /**< First BD in the work group */
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XAxiDma_Bd *HwTail; /**< Last BD in the work group */
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XAxiDma_Bd *PostHead; /**< First BD in the post-work group */
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XAxiDma_Bd *BdaRestart; /**< BD to load when channel is started */
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int FreeCnt; /**< Number of allocatable BDs in free group */
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int PreCnt; /**< Number of BDs in pre-work group */
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int HwCnt; /**< Number of BDs in work group */
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int PostCnt; /**< Number of BDs in post-work group */
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int AllCnt; /**< Total Number of BDs for channel */
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int RingIndex; /**< Ring Index */
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} XAxiDma_BdRing;
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/***************** Macros (Inline Functions) Definitions *********************/
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/*****************************************************************************/
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/**
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* Use this macro at initialization time to determine how many BDs will fit
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* within the given memory constraints.
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*
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* The results of this macro can be provided to XAxiDma_BdRingCreate().
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*
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* @param Alignment specifies what byte alignment the BDs must fall
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* on and must be a power of 2 to get an accurate calculation
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* (32, 64, 126,...)
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* @param Bytes is the number of bytes to be used to store BDs.
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*
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* @return Number of BDs that can fit in the given memory area
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingCntCalc(u32 Alignment, u32 Bytes)
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* This function is used only when system is configured as SG mode
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*
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******************************************************************************/
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#define XAxiDma_BdRingCntCalc(Alignment, Bytes) \
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(int)((Bytes)/((sizeof(XAxiDma_Bd)+((Alignment)-1))&~((Alignment)-1)))
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/*****************************************************************************/
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/**
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* Use this macro at initialization time to determine how many bytes of memory
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* are required to contain a given number of BDs at a given alignment.
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*
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* @param Alignment specifies what byte alignment the BDs must fall on.
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* This parameter must be a power of 2 to get an accurate
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* calculation (32, 64,128,...)
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* @param NumBd is the number of BDs to calculate memory size
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* requirements
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*
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* @return The number of bytes of memory required to create a BD list
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* with the given memory constraints.
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingMemCalc(u32 Alignment, u32 NumBd)
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* This function is used only when system is configured as SG mode
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*
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******************************************************************************/
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#define XAxiDma_BdRingMemCalc(Alignment, NumBd) \
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(int)((sizeof(XAxiDma_Bd)+((Alignment)-1)) & ~((Alignment)-1))*(NumBd)
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/****************************************************************************/
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/**
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* Return the total number of BDs allocated by this channel with
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* XAxiDma_BdRingCreate().
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*
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* @param RingPtr is the BD ring to operate on.
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*
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* @return The total number of BDs allocated for this channel.
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingGetCnt(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetCnt(RingPtr) ((RingPtr)->AllCnt)
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/****************************************************************************/
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/**
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* Return the number of BDs allocatable with XAxiDma_BdRingAlloc() for pre-
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* processing.
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*
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* @param RingPtr is the BD ring to operate on.
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*
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* @return The number of BDs currently allocatable.
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingGetFreeCnt(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetFreeCnt(RingPtr) ((RingPtr)->FreeCnt)
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/****************************************************************************/
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/**
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* Snap shot the latest BD a BD ring is processing.
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*
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* @param RingPtr is the BD ring to operate on.
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*
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* @return None
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*
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* @note
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* C-style signature:
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* void XAxiDma_BdRingSnapShotCurrBd(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingSnapShotCurrBd(RingPtr) \
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{ \
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if (!RingPtr->IsRxChannel) { \
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(RingPtr)->BdaRestart = \
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(XAxiDma_Bd *)XAxiDma_ReadReg((RingPtr)->ChanBase, \
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XAXIDMA_CDESC_OFFSET); \
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} else { \
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if (!RingPtr->RingIndex) { \
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(RingPtr)->BdaRestart = \
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(XAxiDma_Bd *)XAxiDma_ReadReg( \
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(RingPtr)->ChanBase, \
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XAXIDMA_CDESC_OFFSET); \
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} else { \
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(RingPtr)->BdaRestart = \
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(XAxiDma_Bd *)XAxiDma_ReadReg( \
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(RingPtr)->ChanBase, \
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(XAXIDMA_RX_CDESC0_OFFSET + \
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(RingPtr->RingIndex - 1) * \
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XAXIDMA_RX_NDESC_OFFSET)); \
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} \
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} \
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}
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/****************************************************************************/
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/**
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* Get the BD a BD ring is processing.
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*
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* @param RingPtr is the BD ring to operate on.
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*
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* @return The current BD that the BD ring is working on
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*
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* @note
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* C-style signature:
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* XAxiDma_Bd * XAxiDma_BdRingGetCurrBd(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetCurrBd(RingPtr) \
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(XAxiDma_Bd *)XAxiDma_ReadReg((RingPtr)->ChanBase, \
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XAXIDMA_CDESC_OFFSET) \
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/****************************************************************************/
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/**
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* Return the next BD in the ring.
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*
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* @param RingPtr is the BD ring to operate on.
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* @param BdPtr is the current BD.
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*
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* @return The next BD in the ring relative to the BdPtr parameter.
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*
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* @note
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* C-style signature:
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* XAxiDma_Bd *XAxiDma_BdRingNext(XAxiDma_BdRing* RingPtr,
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* XAxiDma_Bd *BdPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingNext(RingPtr, BdPtr) \
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(((u32)(BdPtr) >= (RingPtr)->LastBdAddr) ? \
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(XAxiDma_Bd*)(RingPtr)->FirstBdAddr : \
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(XAxiDma_Bd*)((u32)(BdPtr) + (RingPtr)->Separation))
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/****************************************************************************/
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/**
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* Return the previous BD in the ring.
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*
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* @param RingPtr is the DMA channel to operate on.
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* @param BdPtr is the current BD.
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*
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* @return The previous BD in the ring relative to the BdPtr parameter.
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*
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* @note
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* C-style signature:
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* XAxiDma_Bd *XAxiDma_BdRingPrev(XAxiDma_BdRing* RingPtr,
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* XAxiDma_Bd *BdPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingPrev(RingPtr, BdPtr) \
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(((u32)(BdPtr) <= (RingPtr)->FirstBdAddr) ? \
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(XAxiDma_Bd*)(RingPtr)->LastBdAddr : \
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(XAxiDma_Bd*)((u32)(BdPtr) - (RingPtr)->Separation))
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/****************************************************************************/
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/**
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* Retrieve the contents of the channel status register
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*
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* @param RingPtr is the channel instance to operate on.
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*
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* @return Current contents of status register
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*
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* @note
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* C-style signature:
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* u32 XAxiDma_BdRingGetSr(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetSr(RingPtr) \
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XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET)
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/****************************************************************************/
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/**
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* Get error bits of a DMA channel
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*
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* @param RingPtr is the channel instance to operate on.
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*
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* @return Rrror bits in the status register, they should be interpreted
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* with XAXIDMA_ERR_*_MASK defined in xaxidma_hw.h
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*
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* @note
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* C-style signature:
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* u32 XAxiDma_BdRingGetError(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetError(RingPtr) \
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(XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
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& XAXIDMA_ERR_ALL_MASK)
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/****************************************************************************/
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/**
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* Check whether a DMA channel is started, meaning the channel is not halted.
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*
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* @param RingPtr is the channel instance to operate on.
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*
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* @return
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* - 1 if channel is started
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* - 0 otherwise
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingHwIsStarted(XAxiDma_BdRing* RingPtr)
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*
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*****************************************************************************/
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#define XAxiDma_BdRingHwIsStarted(RingPtr) \
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((XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
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& XAXIDMA_HALTED_MASK) ? FALSE : TRUE)
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/****************************************************************************/
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/**
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* Check if the current DMA channel is busy with a DMA operation.
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*
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* @param RingPtr is the channel instance to operate on.
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*
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* @return
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* - 1 if the DMA is busy.
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* - 0 otherwise
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*
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* @note
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* C-style signature:
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* int XAxiDma_BdRingBusy(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingBusy(RingPtr) \
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(XAxiDma_BdRingHwIsStarted(RingPtr) && \
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((XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
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& XAXIDMA_IDLE_MASK) ? FALSE : TRUE))
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/****************************************************************************/
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/**
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* Set interrupt enable bits for a channel. This operation will modify the
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* XAXIDMA_CR_OFFSET register.
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*
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* @param RingPtr is the channel instance to operate on.
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* @param Mask consists of the interrupt signals to enable.Bits not
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* specified in the mask are not affected.
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*
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* @note
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* C-style signature:
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* void XAxiDma_BdRingIntEnable(XAxiDma_BdRing* RingPtr, u32 Mask)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingIntEnable(RingPtr, Mask) \
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(XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET, \
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XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) \
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| ((Mask) & XAXIDMA_IRQ_ALL_MASK)))
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/****************************************************************************/
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/**
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* Get enabled interrupts of a channel. It is in XAXIDMA_CR_OFFSET register.
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*
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* @param RingPtr is the channel instance to operate on.
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* @return Enabled interrupts of a channel. Use XAXIDMA_IRQ_* defined in
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* xaxidma_hw.h to interpret this returned value.
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*
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* @note
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* C-style signature:
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* u32 XAxiDma_BdRingIntGetEnabled(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingIntGetEnabled(RingPtr) \
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(XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) \
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& XAXIDMA_IRQ_ALL_MASK)
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/****************************************************************************/
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/**
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* Clear interrupt enable bits for a channel. It modifies the
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* XAXIDMA_CR_OFFSET register.
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*
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* @param RingPtr is the channel instance to operate on.
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* @param Mask consists of the interrupt signals to disable.Bits not
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* specified in the Mask are not affected.
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*
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* @note
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* C-style signature:
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* void XAxiDma_BdRingIntDisable(XAxiDma_BdRing* RingPtr,
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* u32 Mask)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingIntDisable(RingPtr, Mask) \
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(XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET, \
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XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_CR_OFFSET) & \
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~((Mask) & XAXIDMA_IRQ_ALL_MASK)))
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/****************************************************************************/
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/**
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* Retrieve the contents of the channel's IRQ register XAXIDMA_SR_OFFSET. This
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* operation can be used to see which interrupts are pending.
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*
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* @param RingPtr is the channel instance to operate on.
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*
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* @return Current contents of the IRQ_OFFSET register. Use
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* XAXIDMA_IRQ_*** values defined in xaxidma_hw.h to interpret
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* the returned value.
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*
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* @note
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* C-style signature:
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* u32 XAxiDma_BdRingGetIrq(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingGetIrq(RingPtr) \
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(XAxiDma_ReadReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET) \
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& XAXIDMA_IRQ_ALL_MASK)
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/****************************************************************************/
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/**
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* Acknowledge asserted interrupts. It modifies XAXIDMA_SR_OFFSET register.
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* A mask bit set for an unasserted interrupt has no effect.
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*
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* @param RingPtr is the channel instance to operate on.
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* @param Mask are the interrupt signals to acknowledge
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*
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* @note
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* C-style signature:
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* void XAxiDma_BdRingAckIrq(XAxiDma_BdRing* RingPtr)
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* This function is used only when system is configured as SG mode
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*
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*****************************************************************************/
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#define XAxiDma_BdRingAckIrq(RingPtr, Mask) \
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XAxiDma_WriteReg((RingPtr)->ChanBase, XAXIDMA_SR_OFFSET,\
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(Mask) & XAXIDMA_IRQ_ALL_MASK)
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/************************* Function Prototypes ******************************/
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/*
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* Descriptor ring functions xaxidma_bdring.c
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*/
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int XAxiDma_StartBdRingHw(XAxiDma_BdRing* RingPtr);
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int XAxiDma_UpdateBdRingCDesc(XAxiDma_BdRing* RingPtr);
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int XAxiDma_BdRingCreate(XAxiDma_BdRing * RingPtr, u32 PhysAddr,
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u32 VirtAddr, u32 Alignment, int BdCount);
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int XAxiDma_BdRingClone(XAxiDma_BdRing * RingPtr, XAxiDma_Bd * SrcBdPtr);
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int XAxiDma_BdRingAlloc(XAxiDma_BdRing * RingPtr, int NumBd,
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XAxiDma_Bd ** BdSetPtr);
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int XAxiDma_BdRingUnAlloc(XAxiDma_BdRing * RingPtr, int NumBd,
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XAxiDma_Bd * BdSetPtr);
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int XAxiDma_BdRingToHw(XAxiDma_BdRing * RingPtr, int NumBd,
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XAxiDma_Bd * BdSetPtr);
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int XAxiDma_BdRingFromHw(XAxiDma_BdRing * RingPtr, int BdLimit,
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XAxiDma_Bd ** BdSetPtr);
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int XAxiDma_BdRingFree(XAxiDma_BdRing * RingPtr, int NumBd,
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XAxiDma_Bd * BdSetPtr);
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int XAxiDma_BdRingStart(XAxiDma_BdRing * RingPtr);
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int XAxiDma_BdRingSetCoalesce(XAxiDma_BdRing * RingPtr, u32 Counter, u32 Timer);
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void XAxiDma_BdRingGetCoalesce(XAxiDma_BdRing * RingPtr,
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u32 *CounterPtr, u32 *TimerPtr);
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/* The following functions are for debug only
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*/
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int XAxiDma_BdRingCheck(XAxiDma_BdRing * RingPtr);
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void XAxiDma_BdRingDumpRegs(XAxiDma_BdRing *RingPtr);
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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