2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
818 lines
22 KiB
C
Executable file
818 lines
22 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2006 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file xiic_eeprom_example.c
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*
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* This file consists of a Interrupt mode design example which uses the Xilinx
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* IIC device and XIic driver to exercise the EEPROM. The XIic driver uses the
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* complete FIFO functionality to transmit/receive data.
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*
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* This example writes/reads from the lower 256 bytes of the IIC EEPROMS. Please
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* refer to the datasheets of the IIC EEPROM's for details about the internal
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* addressing and page size of these devices.
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*
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* The XIic_MasterSend() API is used to transmit the data and
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* XIic_MasterRecv() API is used to receive the data.
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*
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* This example is tested on ML300/ML310/ML410/ML403/ML501/ML507/ML510/ML605/
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* SP601, SP605, KC705 , ZC702 and ZC706 Xilinx boards.
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*
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* The ML310/ML510/ML410 boards have a on-board 64 Kb serial IIC EEPROM
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* (Microchip 24LC64A). The WP pin of the IIC EEPROM is hardwired to ground on
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* this board.
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*
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* The ML300 board has an on-board 32 Kb serial IIC EEPROM(Microchip 24LC32A).
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* The WP pin of the IIC EEPROM has to be connected to ground for this example.
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* The WP is connected to pin Y3 of the FPGA.
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*
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* The ML403 board has an on-board 4 Kb serial IIC EEPROM(Microchip 24LC04A).
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* The WP pin of the IIC EEPROM is hardwired to ground on this board.
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*
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* The ML501/ML505/ML507/ML605/SP601/SP605/KC705/ZC702/ZC706 boards have an
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* on-board 8 Kb serial IIC EEPROM(STM M24C08). The WP pin of the IIC EEPROM is
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* hardwired to ground on these boards.
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*
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* The AddressType for ML300/ML310/ML410/ML510 boards should be u16 as the
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* address pointer in the on board EEPROM is 2 bytes.
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*
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* The AddressType for ML403/ML501/ML505/ML507/ML605/SP601/SP605/KC705/ZC702/
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* ZC706 boards should be u8 as the address pointer for the on board EEPROM
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* is 1 byte.
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*
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* The 7 bit IIC Slave address of the IIC EEPROM on the ML300/ML310/ML403/ML410/
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* ML501/ML505/ML507/ML510 boards is 0x50.
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* The 7 bit IIC Slave address of the IIC EEPROM on the ML605/SP601/SP605/KC705
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* /ZC702/ZC706 boards is 0x54.
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* Refer to the User Guide's of the respective boards for further information
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* about the IIC slave address of IIC EEPROM's.
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*
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* The define EEPROM_ADDRESS in this file needs to be changed depending on
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* the board on which this example is to be run. This is the IIC address of the
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* EEPROM.
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*
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* The define IIC_MUX_ADDRESS in this file needs to be changed depending on
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* the board on which this example is to be run. This is the IIC address of the
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* the MUX.
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*
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* The define IIC_MUX_ENABLE should be defined so that the IIC Mux initialization
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* is done for the boards on the which the EEPROM is connected to an IIC Mux.
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* The boards with a MUX are a KC705/ZC702/ZC706.
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*
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* The define IIC_EEPROM_CHANNEL needs to be changed depending on the Channel
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* number of EEPROM for IIC Mux. On KC705 it is 0x08 and ZC702 is 0x04. Please
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* refer the User Guide's of the respective boards for further information
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* about the Channel number to use EEPROM.
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*
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* This code assumes that no Operating System is being used.
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*
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*
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* @note
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*
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* None.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- ---------------------------------------------------------
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* 1.00a mta 02/24/06 Created.
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* 1.00a mta 04/05/07 Added support for microblaze.
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* 2.00a ktn 11/17/09 Updated to use the HAL APIs and replaced call to
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* XIic_Initialize API with XIic_LookupConfig and
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* XIic_CfgInitialize.
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* 2.01a ktn 03/17/10 Updated the information about the EEPROM's used on
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* ML605/SP601/SP605 boards. Updated the example so that it
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* can be used to access the entire IIC EEPROM for devices
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* like M24C04/M24C08 that use LSB bits of the IIC device
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* select code (IIC slave address) to specify the higher
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* address bits of the EEPROM internal address.
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* 2.02a bss 01/30/13 Updated for using the GIC in case of Zynq
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* 2.06a bss 02/14/13 Added MuxInit API to support Zynq and KC705 boards and
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* modified to use ScuGic in case of Zynq CR# 683509
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*
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "xiic.h"
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#include "xil_exception.h"
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#ifdef XPAR_INTC_0_DEVICE_ID
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#include "xintc.h"
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#else
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#include "xscugic.h"
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#endif
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/************************** Constant Definitions *****************************/
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/*
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* The following constants map to the XPAR parameters created in the
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* xparameters.h file. They are defined here such that a user can easily
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* change all the needed parameters in one place.
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*/
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#define IIC_DEVICE_ID XPAR_IIC_0_DEVICE_ID
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#ifdef XPAR_INTC_0_DEVICE_ID
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#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID
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#define IIC_INTR_ID XPAR_INTC_0_IIC_0_VEC_ID
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#define INTC XIntc
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#define INTC_HANDLER XIntc_InterruptHandler
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#else
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#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
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#define IIC_INTR_ID XPAR_FABRIC_IIC_0_VEC_ID
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#define INTC XScuGic
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#define INTC_HANDLER XScuGic_InterruptHandler
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#endif
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/*
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* The following constant defines the address of the IIC Slave device on the
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* IIC bus. Note that since the address is only 7 bits, this constant is the
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* address divided by 2.
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* The 7 bit IIC Slave address of the IIC EEPROM on the ML300/ML310/ML403/ML410/
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* ML501/ML505/ML507/ML510 boards is 0x50. The 7 bit IIC Slave address of the
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* IIC EEPROM on the ML605/SP601/SP605/KC705/ZC702/ZC706 boards is 0x54.
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* Please refer the User Guide's of the respective boards for further
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* information about the IIC slave address of IIC EEPROM's.
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*/
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#define EEPROM_ADDRESS 0x54 /* 0xA0 as an 8 bit number. */
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/*
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* The IIC_MUX_ADDRESS defines the address of the IIC MUX device on the
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* IIC bus. Note that since the address is only 7 bits, this constant is the
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* address divided by 2.
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* The IIC Slaves on the KC705/ZC702/ZC706 boards are connected to an
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* IIC MUX.
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* IIC_EEPROM_CHANNEL is the Channel number of EEPROM for IIC Mux. On KC705 it
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* is 0x08 and ZC702 is 0x04.Please refer the User Guide's of the respective
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* boards for further information about the Channel number to use EEPROM.
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*/
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#define IIC_MUX_ADDRESS 0x74
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#define IIC_EEPROM_CHANNEL 0x08
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/*
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* This define should be uncommented if there is IIC MUX on the board to which
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* this EEPROM is connected. The boards that have IIC MUX are KC705/ZC702/ZC706.
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*/
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/* #define IIC_MUX_ENABLE */
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/*
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* The page size determines how much data should be written at a time.
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* The ML310/ML300 board supports a page size of 32 and 16.
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* The write function should be called with this as a maximum byte count.
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*/
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#define PAGE_SIZE 16
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/*
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* The Starting address in the IIC EEPROM on which this test is performed.
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*/
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#define EEPROM_TEST_START_ADDRESS 128
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/**************************** Type Definitions *******************************/
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/*
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* The AddressType for ML300/ML310/ML410/ML510 boards should be u16 as the address
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* pointer in the on board EEPROM is 2 bytes.
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* The AddressType for ML403/ML501/ML505/ML507/ML605/SP601/SP605/KC705/ZC702
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* /ZC706 boards should be u8 as the address pointer in the on board EEPROM is
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* 1 bytes.
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*/
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typedef u8 AddressType;
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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int IicEepromExample();
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int EepromWriteData(u16 ByteCount);
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int EepromReadData(u8 *BufferPtr, u16 ByteCount);
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static int SetupInterruptSystem(XIic *IicInstPtr);
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static void SendHandler(XIic *InstancePtr);
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static void ReceiveHandler(XIic *InstancePtr);
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static void StatusHandler(XIic *InstancePtr, int Event);
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#ifdef IIC_MUX_ENABLE
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static int MuxInit(void);
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#endif
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/************************** Variable Definitions *****************************/
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XIic IicInstance; /* The instance of the IIC device. */
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INTC Intc; /* The instance of the Interrupt Controller Driver */
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/*
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* Write buffer for writing a page.
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*/
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u8 WriteBuffer[sizeof(AddressType) + PAGE_SIZE];
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u8 ReadBuffer[PAGE_SIZE]; /* Read buffer for reading a page. */
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volatile u8 TransmitComplete; /* Flag to check completion of Transmission */
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volatile u8 ReceiveComplete; /* Flag to check completion of Reception */
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u8 EepromIicAddr; /* Variable for storing Eeprom IIC address */
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/************************** Function Definitions *****************************/
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/*****************************************************************************/
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/**
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* Main function to call the High level EEPROM example.
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*
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* @param None.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note None.
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*
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******************************************************************************/
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int main(void)
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{
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int Status;
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/*
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* Run the EEPROM example.
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*/
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Status = IicEepromExample();
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* This function writes, reads, and verifies the data to the IIC EEPROM. It
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* does the write as a single page write, performs a buffered read.
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*
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* @param None.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note None.
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*
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******************************************************************************/
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int IicEepromExample()
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{
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u32 Index;
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int Status;
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XIic_Config *ConfigPtr; /* Pointer to configuration data */
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AddressType Address = EEPROM_TEST_START_ADDRESS;
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EepromIicAddr = EEPROM_ADDRESS;
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/*
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* Initialize the IIC driver so that it is ready to use.
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*/
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ConfigPtr = XIic_LookupConfig(IIC_DEVICE_ID);
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if (ConfigPtr == NULL) {
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return XST_FAILURE;
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}
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Status = XIic_CfgInitialize(&IicInstance, ConfigPtr,
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ConfigPtr->BaseAddress);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Setup the Interrupt System.
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*/
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Status = SetupInterruptSystem(&IicInstance);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Set the Handlers for transmit and reception.
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*/
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XIic_SetSendHandler(&IicInstance, &IicInstance,
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(XIic_Handler) SendHandler);
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XIic_SetRecvHandler(&IicInstance, &IicInstance,
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(XIic_Handler) ReceiveHandler);
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XIic_SetStatusHandler(&IicInstance, &IicInstance,
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(XIic_StatusHandler) StatusHandler);
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#ifdef IIC_MUX_ENABLE
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/*
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* Initialize the IIC MUX on the boards on which the EEPROM
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* are connected through the MUX.
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*/
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Status = MuxInit();
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#endif
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/*
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* Initialize the data to write and the read buffer.
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*/
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if (sizeof(Address) == 1) {
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WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS);
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EepromIicAddr |= (EEPROM_TEST_START_ADDRESS >> 8) & 0x7;
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} else {
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WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS >> 8);
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WriteBuffer[1] = (u8) (EEPROM_TEST_START_ADDRESS);
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ReadBuffer[Index] = 0;
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}
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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WriteBuffer[sizeof(Address) + Index] = 0xFF;
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ReadBuffer[Index] = 0;
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}
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/*
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* Set the Slave address.
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*/
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Status = XIic_SetAddress(&IicInstance, XII_ADDR_TO_SEND_TYPE,
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EepromIicAddr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Write to the EEPROM.
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*/
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Status = EepromWriteData(sizeof(Address) + PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Read from the EEPROM.
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*/
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Status = EepromReadData(ReadBuffer, PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Verify the data read against the data written.
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*/
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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if (ReadBuffer[Index] != WriteBuffer[Index + sizeof(Address)]) {
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return XST_FAILURE;
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}
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ReadBuffer[Index] = 0;
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}
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/*
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* Initialize the data to write and the read buffer.
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*/
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if (sizeof(Address) == 1) {
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WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS);
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} else {
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WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS >> 8);
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WriteBuffer[1] = (u8) (EEPROM_TEST_START_ADDRESS);
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ReadBuffer[Index] = 0;
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}
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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WriteBuffer[sizeof(Address) + Index] = Index;
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ReadBuffer[Index] = 0;
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}
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/*
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* Write to the EEPROM.
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*/
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Status = EepromWriteData(sizeof(Address) + PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Read from the EEPROM.
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*/
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Status = EepromReadData(ReadBuffer, PAGE_SIZE);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Verify the data read against the data written.
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*/
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for (Index = 0; Index < PAGE_SIZE; Index++) {
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if (ReadBuffer[Index] != WriteBuffer[Index + sizeof(Address)]) {
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return XST_FAILURE;
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}
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ReadBuffer[Index] = 0;
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}
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* This function writes a buffer of data to the IIC serial EEPROM.
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*
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* @param ByteCount contains the number of bytes in the buffer to be
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* written.
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*
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* @return XST_SUCCESS if successful else XST_FAILURE.
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*
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* @note The Byte count should not exceed the page size of the EEPROM as
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* noted by the constant PAGE_SIZE.
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*
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******************************************************************************/
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int EepromWriteData(u16 ByteCount)
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{
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int Status;
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/*
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* Set the defaults.
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*/
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TransmitComplete = 1;
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IicInstance.Stats.TxErrors = 0;
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/*
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* Start the IIC device.
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*/
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Status = XIic_Start(&IicInstance);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Send the Data.
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*/
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Status = XIic_MasterSend(&IicInstance, WriteBuffer, ByteCount);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/*
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* Wait till the transmission is completed.
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*/
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while ((TransmitComplete) || (XIic_IsIicBusy(&IicInstance) == TRUE)) {
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/*
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* This condition is required to be checked in the case where we
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* are writing two consecutive buffers of data to the EEPROM.
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* The EEPROM takes about 2 milliseconds time to update the data
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* internally after a STOP has been sent on the bus.
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* A NACK will be generated in the case of a second write before
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* the EEPROM updates the data internally resulting in a
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* Transmission Error.
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*/
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if (IicInstance.Stats.TxErrors != 0) {
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/*
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* Enable the IIC device.
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*/
|
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Status = XIic_Start(&IicInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
|
|
if (!XIic_IsIicBusy(&IicInstance)) {
|
|
/*
|
|
* Send the Data.
|
|
*/
|
|
Status = XIic_MasterSend(&IicInstance,
|
|
WriteBuffer,
|
|
ByteCount);
|
|
if (Status == XST_SUCCESS) {
|
|
IicInstance.Stats.TxErrors = 0;
|
|
}
|
|
else {
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Stop the IIC device.
|
|
*/
|
|
Status = XIic_Stop(&IicInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
return XST_SUCCESS;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This function reads data from the IIC serial EEPROM into a specified buffer.
|
|
*
|
|
* @param BufferPtr contains the address of the data buffer to be filled.
|
|
* @param ByteCount contains the number of bytes in the buffer to be read.
|
|
*
|
|
* @return XST_SUCCESS if successful else XST_FAILURE.
|
|
*
|
|
* @note None.
|
|
*
|
|
******************************************************************************/
|
|
int EepromReadData(u8 *BufferPtr, u16 ByteCount)
|
|
{
|
|
int Status;
|
|
AddressType Address = EEPROM_TEST_START_ADDRESS;
|
|
|
|
/*
|
|
* Set the Defaults.
|
|
*/
|
|
ReceiveComplete = 1;
|
|
|
|
/*
|
|
* Position the Pointer in EEPROM.
|
|
*/
|
|
if (sizeof(Address) == 1) {
|
|
WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS);
|
|
}
|
|
else {
|
|
WriteBuffer[0] = (u8) (EEPROM_TEST_START_ADDRESS >> 8);
|
|
WriteBuffer[1] = (u8) (EEPROM_TEST_START_ADDRESS);
|
|
}
|
|
|
|
Status = EepromWriteData(sizeof(Address));
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Start the IIC device.
|
|
*/
|
|
Status = XIic_Start(&IicInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Receive the Data.
|
|
*/
|
|
Status = XIic_MasterRecv(&IicInstance, BufferPtr, ByteCount);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Wait till all the data is received.
|
|
*/
|
|
while ((ReceiveComplete) || (XIic_IsIicBusy(&IicInstance) == TRUE)) {
|
|
|
|
}
|
|
|
|
/*
|
|
* Stop the IIC device.
|
|
*/
|
|
Status = XIic_Stop(&IicInstance);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
return XST_SUCCESS;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This function setups the interrupt system so interrupts can occur for the
|
|
* IIC device. The function is application-specific since the actual system may
|
|
* or may not have an interrupt controller. The IIC device could be directly
|
|
* connected to a processor without an interrupt controller. The user should
|
|
* modify this function to fit the application.
|
|
*
|
|
* @param IicInstPtr contains a pointer to the instance of the IIC device
|
|
* which is going to be connected to the interrupt controller.
|
|
*
|
|
* @return XST_SUCCESS if successful else XST_FAILURE.
|
|
*
|
|
* @note None.
|
|
*
|
|
******************************************************************************/
|
|
static int SetupInterruptSystem(XIic *IicInstPtr)
|
|
{
|
|
int Status;
|
|
|
|
#ifdef XPAR_INTC_0_DEVICE_ID
|
|
|
|
/*
|
|
* Initialize the interrupt controller driver so that it's ready to use.
|
|
*/
|
|
Status = XIntc_Initialize(&Intc, INTC_DEVICE_ID);
|
|
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Connect the device driver handler that will be called when an
|
|
* interrupt for the device occurs, the handler defined above performs
|
|
* the specific interrupt processing for the device.
|
|
*/
|
|
Status = XIntc_Connect(&Intc, IIC_INTR_ID,
|
|
(XInterruptHandler) XIic_InterruptHandler,
|
|
IicInstPtr);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Start the interrupt controller so interrupts are enabled for all
|
|
* devices that cause interrupts.
|
|
*/
|
|
Status = XIntc_Start(&Intc, XIN_REAL_MODE);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
/*
|
|
* Enable the interrupts for the IIC device.
|
|
*/
|
|
XIntc_Enable(&Intc, IIC_INTR_ID);
|
|
|
|
#else
|
|
|
|
XScuGic_Config *IntcConfig;
|
|
|
|
/*
|
|
* Initialize the interrupt controller driver so that it is ready to
|
|
* use.
|
|
*/
|
|
IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
|
|
if (NULL == IntcConfig) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
Status = XScuGic_CfgInitialize(&Intc, IntcConfig,
|
|
IntcConfig->CpuBaseAddress);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
XScuGic_SetPriorityTriggerType(&Intc, IIC_INTR_ID,
|
|
0xA0, 0x3);
|
|
|
|
/*
|
|
* Connect the interrupt handler that will be called when an
|
|
* interrupt occurs for the device.
|
|
*/
|
|
Status = XScuGic_Connect(&Intc, IIC_INTR_ID,
|
|
(Xil_InterruptHandler)XIic_InterruptHandler,
|
|
IicInstPtr);
|
|
if (Status != XST_SUCCESS) {
|
|
return Status;
|
|
}
|
|
|
|
/*
|
|
* Enable the interrupt for the IIC device.
|
|
*/
|
|
XScuGic_Enable(&Intc, IIC_INTR_ID);
|
|
|
|
#endif
|
|
|
|
/*
|
|
* Initialize the exception table and register the interrupt
|
|
* controller handler with the exception table
|
|
*/
|
|
Xil_ExceptionInit();
|
|
|
|
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
|
|
(Xil_ExceptionHandler)INTC_HANDLER, &Intc);
|
|
|
|
/* Enable non-critical exceptions */
|
|
Xil_ExceptionEnable();
|
|
|
|
|
|
|
|
return XST_SUCCESS;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This Send handler is called asynchronously from an interrupt
|
|
* context and indicates that data in the specified buffer has been sent.
|
|
*
|
|
* @param InstancePtr is not used, but contains a pointer to the IIC
|
|
* device driver instance which the handler is being called for.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note None.
|
|
*
|
|
******************************************************************************/
|
|
static void SendHandler(XIic *InstancePtr)
|
|
{
|
|
TransmitComplete = 0;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This Receive handler is called asynchronously from an interrupt
|
|
* context and indicates that data in the specified buffer has been Received.
|
|
*
|
|
* @param InstancePtr is not used, but contains a pointer to the IIC
|
|
* device driver instance which the handler is being called for.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note None.
|
|
*
|
|
******************************************************************************/
|
|
static void ReceiveHandler(XIic *InstancePtr)
|
|
{
|
|
ReceiveComplete = 0;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This Status handler is called asynchronously from an interrupt
|
|
* context and indicates the events that have occurred.
|
|
*
|
|
* @param InstancePtr is a pointer to the IIC driver instance for which
|
|
* the handler is being called for.
|
|
* @param Event indicates the condition that has occurred.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note None.
|
|
*
|
|
******************************************************************************/
|
|
static void StatusHandler(XIic *InstancePtr, int Event)
|
|
{
|
|
|
|
}
|
|
|
|
#ifdef IIC_MUX_ENABLE
|
|
/*****************************************************************************/
|
|
/**
|
|
* This function initializes the IIC MUX to select EEPROM.
|
|
*
|
|
* @param None.
|
|
*
|
|
* @return XST_SUCCESS if pass, otherwise XST_FAILURE.
|
|
*
|
|
* @note None.
|
|
*
|
|
****************************************************************************/
|
|
int MuxInit(void)
|
|
{
|
|
|
|
int Status;
|
|
/*
|
|
* Set the Slave address to the IIC MUC - PCA9543A.
|
|
*/
|
|
Status = XIic_SetAddress(&IicInstance, XII_ADDR_TO_SEND_TYPE,
|
|
IIC_MUX_ADDRESS);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
|
|
/*
|
|
* Enabling all the channels
|
|
*/
|
|
WriteBuffer[0] = IIC_EEPROM_CHANNEL;
|
|
|
|
Status = EepromWriteData(1);
|
|
if (Status != XST_SUCCESS) {
|
|
return XST_FAILURE;
|
|
}
|
|
|
|
return XST_SUCCESS;
|
|
}
|
|
#endif
|