b0b442a12e
This patch modifies the iicps driver according to MISRAC 2012 and it supports for both Zynq and Alto. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
413 lines
16 KiB
C
Executable file
413 lines
16 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xiicps.h
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*
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* This is an implementation of IIC driver in the PS block. The device can
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* be either a master or a slave on the IIC bus. This implementation supports
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* both interrupt mode transfer and polled mode transfer. Only 7-bit address
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* is used in the driver, although the hardware also supports 10-bit address.
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*
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* IIC is a 2-wire serial interface. The master controls the clock, so it can
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* regulate when it wants to send or receive data. The slave is under control of
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* the master, it must respond quickly since it has no control of the clock and
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* must send/receive data as fast or as slow as the master does.
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*
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* The higher level software must implement a higher layer protocol to inform
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* the slave what to send to the master.
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*
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* <b>Initialization & Configuration</b>
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*
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* The XIicPs_Config structure is used by the driver to configure itself. This
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* configuration structure is typically created by the tool-chain based on HW
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* build properties.
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*
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* To support multiple runtime loading and initialization strategies employed by
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* various operating systems, the driver instance can be initialized in the
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* following way:
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*
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* - XIicPs_LookupConfig(DeviceId) - Use the device identifier to find
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* the static configuration structure defined in xiicps_g.c. This is
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* setup by the tools. For some operating systems the config structure
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* will be initialized by the software and this call is not needed.
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*
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* - XIicPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
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* configuration structure provided by the caller. If running in a
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* system with address translation, the provided virtual memory base
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* address replaces the physical address in the configuration
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* structure.
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*
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* <b>Multiple Masters</b>
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*
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* More than one master can exist, bus arbitration is defined in the IIC
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* standard. Lost of arbitration causes arbitration loss interrupt on the device.
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*
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* <b>Multiple Slaves</b>
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*
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* Multiple slaves are supported by selecting them with unique addresses. It is
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* up to the system designer to be sure all devices on the IIC bus have
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* unique addresses.
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*
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* <b>Addressing</b>
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*
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* The IIC hardware can use 7 or 10 bit addresses. The driver provides the
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* ability to control which address size is sent in messages as a master to a
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* slave device.
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*
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* <b>FIFO Size </b>
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* The hardware FIFO is 32 bytes deep. The user must know the limitations of
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* other IIC devices on the bus. Some are only able to receive a limited number
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* of bytes in a single transfer.
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*
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* <b>Data Rates</b>
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*
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* The data rate is set by values in the control register. The formula for
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* determining the correct register values is:
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* Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1))
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*
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* When the device is configured as a slave, the slck setting controls the
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* sample rate and so must be set to be at least as fast as the fastest scl
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* expected to be seen in the system.
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*
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* <b>Polled Mode Operation</b>
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*
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* This driver supports polled mode transfers.
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*
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* <b>Interrupts</b>
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*
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* The user must connect the interrupt handler of the driver,
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* XIicPs_InterruptHandler to an interrupt system such that it will be called
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* when an interrupt occurs. This function does not save and restore the
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* processor context such that the user must provide this processing.
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*
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* The driver handles the following interrupts:
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* - Transfer complete
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* - More Data
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* - Transfer not Acknowledged
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* - Transfer Time out
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* - Monitored slave ready - master mode only
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* - Receive Overflow
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* - Transmit FIFO overflow
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* - Receive FIFO underflow
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* - Arbitration lost
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*
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* <b>Bus Busy</b>
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*
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* Bus busy is checked before the setup of a master mode device, to avoid
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* unnecessary arbitration loss interrupt.
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*
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* <b>RTOS Independence</b>
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*
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* This driver is intended to be RTOS and processor independent. It works with
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* physical addresses only. Any needs for dynamic memory management, threads or
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* thread mutual exclusion, virtual memory, or cache control must be satisfied by
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* the layer above this driver.
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*
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*<b>Repeated Start</b>
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*
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* The I2C controller does not indicate completion of a receive transfer if HOLD
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* bit is set. Due to this errata, repeated start cannot be used if a receive
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* transfer is followed by any other transfer.
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*
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* <pre> MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------ -------- -----------------------------------------------
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* 1.00a drg/jz 01/30/08 First release
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* 1.00a sdm 09/21/11 Fixed an issue in the XIicPs_SetOptions and
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* XIicPs_ClearOptions where the InstancePtr->Options
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* was not updated correctly.
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* Updated the InstancePtr->Options in the
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* XIicPs_CfgInitialize by calling XIicPs_GetOptions.
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* Updated the XIicPs_SetupMaster to not check for
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* Bus Busy condition when the Hold Bit is set.
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* Removed some unused variables.
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* 1.01a sg 03/30/12 Fixed an issue in XIicPs_MasterSendPolled where a
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* check for transfer completion is added, which indicates
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* the completion of current transfer.
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* 1.02a sg 08/29/12 Updated the logic to arrive at the best divisors
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* to achieve I2C clock with minimum error for
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* CR #674195
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* 1.03a hk 05/04/13 Initialized BestDivA and BestDivB to 0.
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* This is fix for CR#704398 to remove warning.
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* 2.0 hk 03/07/14 Added check for error status in the while loop that
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* checks for completion.
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* (XIicPs_MasterSendPolled function). CR# 762244, 764875.
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* Limited frequency set when 100KHz or 400KHz is
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* selected. This is a hardware limitation. CR#779290.
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* 2.1 hk 04/24/14 Fix for CR# 789821 to handle >14 byte transfers.
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* Explicitly reset CR and clear FIFO in Abort function
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* and state the same in the comments. CR# 784254.
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* Fix for CR# 761060 - provision for repeated start.
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* 2.2 hk 08/23/14 Slave monitor mode changes - clear FIFO, enable
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* read mode and clear transfer size register.
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* Disable NACK to avoid interrupts on each retry.
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* 2.3 sk 10/07/14 Repeated start feature deleted.
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* 2.4 sk 11/03/14 Modified TimeOut Register value to 0xFF
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* in XIicPs_Reset.
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* 12/06/14 Implemented Repeated start feature.
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*
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* </pre>
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*
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******************************************************************************/
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#ifndef XIICPS_H /* prevent circular inclusions */
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#define XIICPS_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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#include "xiicps_hw.h"
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/************************** Constant Definitions *****************************/
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/** @name Configuration options
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*
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* The following options may be specified or retrieved for the device and
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* enable/disable additional features of the IIC. Each of the options
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* are bit fields, so more than one may be specified.
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*
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* @{
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*/
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#define XIICPS_7_BIT_ADDR_OPTION 0x01U /**< 7-bit address mode */
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#define XIICPS_10_BIT_ADDR_OPTION 0x02U /**< 10-bit address mode */
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#define XIICPS_SLAVE_MON_OPTION 0x04U /**< Slave monitor mode */
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#define XIICPS_REP_START_OPTION 0x08U /**< Repeated Start */
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/*@}*/
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/** @name Callback events
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*
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* These constants specify the handler events that are passed to an application
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* event handler from the driver. These constants are bit masks such that
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* more than one event can be passed to the handler.
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*
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* @{
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*/
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#define XIICPS_EVENT_COMPLETE_SEND 0x0001U /**< Transmit Complete Event*/
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#define XIICPS_EVENT_COMPLETE_RECV 0x0002U /**< Receive Complete Event*/
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#define XIICPS_EVENT_TIME_OUT 0x0004U /**< Transfer timed out */
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#define XIICPS_EVENT_ERROR 0x0008U /**< Receive error */
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#define XIICPS_EVENT_ARB_LOST 0x0010U /**< Arbitration lost */
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#define XIICPS_EVENT_NACK 0x0020U /**< NACK Received */
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#define XIICPS_EVENT_SLAVE_RDY 0x0040U /**< Slave ready */
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#define XIICPS_EVENT_RX_OVR 0x0080U /**< RX overflow */
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#define XIICPS_EVENT_TX_OVR 0x0100U /**< TX overflow */
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#define XIICPS_EVENT_RX_UNF 0x0200U /**< RX underflow */
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/*@}*/
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/** @name Role constants
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*
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* These constants are used to pass into the device setup routines to
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* set up the device according to transfer direction.
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*/
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#define SENDING_ROLE 1 /**< Transfer direction is sending */
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#define RECVING_ROLE 0 /**< Transfer direction is receiving */
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/* Maximum transfer size */
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#define XIICPS_MAX_TRANSFER_SIZE (u32)(255U - 3U)
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/**************************** Type Definitions *******************************/
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/**
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* The handler data type allows the user to define a callback function to
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* respond to interrupt events in the system. This function is executed
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* in interrupt context, so amount of processing should be minimized.
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*
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* @param CallBackRef is the callback reference passed in by the upper
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* layer when setting the callback functions, and passed back to
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* the upper layer when the callback is invoked. Its type is
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* not important to the driver, so it is a void pointer.
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* @param StatusEvent indicates one or more status events that occurred.
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*/
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typedef void (*XIicPs_IntrHandler) (void *CallBackRef, u32 StatusEvent);
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/**
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* This typedef contains configuration information for the device.
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*/
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typedef struct {
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u16 DeviceId; /**< Unique ID of device */
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u32 BaseAddress; /**< Base address of the device */
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u32 InputClockHz; /**< Input clock frequency */
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} XIicPs_Config;
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/**
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* The XIicPs driver instance data. The user is required to allocate a
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* variable of this type for each IIC device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct {
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XIicPs_Config Config; /* Configuration structure */
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u32 IsReady; /* Device is initialized and ready */
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u32 Options; /* Options set in the device */
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u8 *SendBufferPtr; /* Pointer to send buffer */
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u8 *RecvBufferPtr; /* Pointer to recv buffer */
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s32 SendByteCount; /* Number of bytes still expected to send */
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s32 RecvByteCount; /* Number of bytes still expected to receive */
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s32 CurrByteCount; /* No. of bytes expected in current transfer */
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s32 UpdateTxSize; /* If tx size register has to be updated */
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s32 IsSend; /* Whether master is sending or receiving */
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s32 IsRepeatedStart; /* Indicates if user set repeated start */
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XIicPs_IntrHandler StatusHandler; /* Event handler function */
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void *CallBackRef; /* Callback reference for event handler */
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} XIicPs;
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/*
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*
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* Place one byte into the transmit FIFO.
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*
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* @param InstancePtr is the instance of IIC
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XIicPs_SendByte(XIicPs *InstancePtr)
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*
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*****************************************************************************/
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#define XIicPs_SendByte(InstancePtr) \
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{ \
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u8 Data; \
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Data = *((InstancePtr)->SendBufferPtr); \
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XIicPs_Out32((InstancePtr)->Config.BaseAddress \
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+ (u32)(XIICPS_DATA_OFFSET), \
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(u32)(Data)); \
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(InstancePtr)->SendBufferPtr += 1; \
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(InstancePtr)->SendByteCount -= 1;\
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}
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/****************************************************************************/
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/*
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*
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* Receive one byte from FIFO.
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*
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* @param InstancePtr is the instance of IIC
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*
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* @return None.
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*
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* @note C-Style signature:
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* u8 XIicPs_RecvByte(XIicPs *InstancePtr)
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*
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*****************************************************************************/
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#define XIicPs_RecvByte(InstancePtr) \
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{ \
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u8 *Data, Value; \
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Value = (u8)(XIicPs_In32((InstancePtr)->Config.BaseAddress \
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+ (u32)XIICPS_DATA_OFFSET)); \
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Data = &Value; \
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*(InstancePtr)->RecvBufferPtr = *Data; \
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(InstancePtr)->RecvBufferPtr += 1; \
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(InstancePtr)->RecvByteCount --; \
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}
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/************************** Function Prototypes ******************************/
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/*
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* Function for configuration lookup, in xiicps_sinit.c
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*/
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XIicPs_Config *XIicPs_LookupConfig(u16 DeviceId);
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/*
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* Functions for general setup, in xiicps.c
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*/
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s32 XIicPs_CfgInitialize(XIicPs *InstancePtr, XIicPs_Config * ConfigPtr,
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u32 EffectiveAddr);
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void XIicPs_Abort(XIicPs *InstancePtr);
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void XIicPs_Reset(XIicPs *InstancePtr);
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s32 XIicPs_BusIsBusy(XIicPs *InstancePtr);
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s32 TransmitFifoFill(XIicPs *InstancePtr);
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/*
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* Functions for interrupts, in xiicps_intr.c
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*/
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void XIicPs_SetStatusHandler(XIicPs *InstancePtr, void *CallBackRef,
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XIicPs_IntrHandler FunctionPtr);
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/*
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* Functions for device as master, in xiicps_master.c
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*/
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void XIicPs_MasterSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
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u16 SlaveAddr);
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void XIicPs_MasterRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
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u16 SlaveAddr);
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s32 XIicPs_MasterSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
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u16 SlaveAddr);
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s32 XIicPs_MasterRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount,
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u16 SlaveAddr);
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void XIicPs_EnableSlaveMonitor(XIicPs *InstancePtr, u16 SlaveAddr);
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void XIicPs_DisableSlaveMonitor(XIicPs *InstancePtr);
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void XIicPs_MasterInterruptHandler(XIicPs *InstancePtr);
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/*
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* Functions for device as slave, in xiicps_slave.c
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*/
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void XIicPs_SetupSlave(XIicPs *InstancePtr, u16 SlaveAddr);
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void XIicPs_SlaveSend(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
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void XIicPs_SlaveRecv(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
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s32 XIicPs_SlaveSendPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
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s32 XIicPs_SlaveRecvPolled(XIicPs *InstancePtr, u8 *MsgPtr, s32 ByteCount);
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void XIicPs_SlaveInterruptHandler(XIicPs *InstancePtr);
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/*
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* Functions for selftest, in xiicps_selftest.c
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*/
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s32 XIicPs_SelfTest(XIicPs *InstancePtr);
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/*
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* Functions for setting and getting data rate, in xiicps_options.c
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*/
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s32 XIicPs_SetOptions(XIicPs *InstancePtr, u32 Options);
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s32 XIicPs_ClearOptions(XIicPs *InstancePtr, u32 Options);
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u32 XIicPs_GetOptions(XIicPs *InstancePtr);
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s32 XIicPs_SetSClk(XIicPs *InstancePtr, u32 FsclHz);
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u32 XIicPs_GetSClk(XIicPs *InstancePtr);
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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