2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
346 lines
13 KiB
C
Executable file
346 lines
13 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xuartns550_l.h
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*
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* This header file contains identifiers and low-level driver functions (or
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* macros) that can be used to access the device. The user should refer to the
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* hardware device specification for more details of the device operation.
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* High-level driver functions are defined in xuartns550.h.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00b jhl 04/24/02 First release
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* 1.11a sv 03/20/07 Updated to use the new coding guidelines.
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* 1.11a rpm 11/13/07 Fixed bug in _EnableIntr
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* 2.00a ktn 10/20/09 Converted all register accesses to 32 bit access.
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* Updated to use HAL Processor APIs. _m is removed from the
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* name of all the macro definitions.
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* </pre>
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*
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******************************************************************************/
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#ifndef XUARTNS550_L_H /* prevent circular inclusions */
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#define XUARTNS550_L_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xil_io.h"
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/************************** Constant Definitions *****************************/
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/*
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* Offset from the device base address to the IP registers.
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*/
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#define XUN_REG_OFFSET 0x1000
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/** @name Register Map
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*
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* Register offsets for the 16450/16550 compatible UART device.
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* @{
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*/
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#define XUN_RBR_OFFSET (XUN_REG_OFFSET) /**< Receive buffer, read only */
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#define XUN_THR_OFFSET (XUN_REG_OFFSET) /**< Transmit holding register */
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#define XUN_IER_OFFSET (XUN_REG_OFFSET + 0x04) /**< Interrupt enable */
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#define XUN_IIR_OFFSET (XUN_REG_OFFSET + 0x08) /**< Interrupt id, read only */
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#define XUN_FCR_OFFSET (XUN_REG_OFFSET + 0x08) /**< Fifo control, write only */
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#define XUN_LCR_OFFSET (XUN_REG_OFFSET + 0x0C) /**< Line Control Register */
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#define XUN_MCR_OFFSET (XUN_REG_OFFSET + 0x10) /**< Modem Control Register */
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#define XUN_LSR_OFFSET (XUN_REG_OFFSET + 0x14) /**< Line Status Register */
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#define XUN_MSR_OFFSET (XUN_REG_OFFSET + 0x18) /**< Modem Status Register */
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#define XUN_DRLS_OFFSET (XUN_REG_OFFSET + 0x00) /**< Divisor Register LSB */
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#define XUN_DRLM_OFFSET (XUN_REG_OFFSET + 0x04) /**< Divisor Register MSB */
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/* @} */
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/*
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* The following constant specifies the size of the FIFOs, the size of the
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* FIFOs includes the transmitter and receiver such that it is the total number
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* of bytes that the UART can buffer
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*/
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#define XUN_FIFO_SIZE 16
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/**
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* @name Interrupt Enable Register (IER) mask(s)
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* @{
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*/
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#define XUN_IER_MODEM_STATUS 0x00000008 /**< Modem status interrupt */
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#define XUN_IER_RX_LINE 0x00000004 /**< Receive status interrupt */
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#define XUN_IER_TX_EMPTY 0x00000002 /**< Transmitter empty interrupt */
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#define XUN_IER_RX_DATA 0x00000001 /**< Receiver data available */
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/* @} */
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/**
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* @name Interrupt ID Register (INT_ID) mask(s)
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* @{
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*/
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#define XUN_INT_ID_MASK 0x0000000F /**< Only the interrupt ID */
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#define XUN_INT_ID_FIFOS_ENABLED 0x000000C0 /**< Only the FIFOs enable */
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/* @} */
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/**
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* @name FIFO Control Register mask(s)
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* @{
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*/
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#define XUN_FIFO_RX_TRIG_MSB 0x00000080 /**< Trigger level MSB */
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#define XUN_FIFO_RX_TRIG_LSB 0x00000040 /**< Trigger level LSB */
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#define XUN_FIFO_TX_RESET 0x00000004 /**< Reset the transmit FIFO */
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#define XUN_FIFO_RX_RESET 0x00000002 /**< Reset the receive FIFO */
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#define XUN_FIFO_ENABLE 0x00000001 /**< Enable the FIFOs */
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#define XUN_FIFO_RX_TRIGGER 0x000000C0 /**< Both trigger level bits */
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/* @} */
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/**
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* @name Line Control Register(LCR) mask(s)
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* @{
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*/
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#define XUN_LCR_DLAB 0x00000080 /**< Divisor latch access */
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#define XUN_LCR_SET_BREAK 0x00000040 /**< Cause a break condition */
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#define XUN_LCR_STICK_PARITY 0x00000020 /**< Stick Parity */
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#define XUN_LCR_EVEN_PARITY 0x00000010 /**< 1 = even, 0 = odd parity */
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#define XUN_LCR_ENABLE_PARITY 0x00000008 /**< 1 = Enable, 0 = Disable parity*/
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#define XUN_LCR_2_STOP_BITS 0x00000004 /**< 1= 2 stop bits,0 = 1 stop bit */
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#define XUN_LCR_8_DATA_BITS 0x00000003 /**< 8 Data bits selection */
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#define XUN_LCR_7_DATA_BITS 0x00000002 /**< 7 Data bits selection */
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#define XUN_LCR_6_DATA_BITS 0x00000001 /**< 6 Data bits selection */
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#define XUN_LCR_LENGTH_MASK 0x00000003 /**< Both length bits mask */
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#define XUN_LCR_PARITY_MASK 0x00000018 /**< Both parity bits mask */
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/* @} */
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/**
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* @name Mode Control Register(MCR) mask(s)
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* @{
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*/
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#define XUN_MCR_LOOP 0x00000010 /**< Local loopback */
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#define XUN_MCR_OUT_2 0x00000008 /**< General output 2 signal */
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#define XUN_MCR_OUT_1 0x00000004 /**< General output 1 signal */
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#define XUN_MCR_RTS 0x00000002 /**< RTS signal */
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#define XUN_MCR_DTR 0x00000001 /**< DTR signal */
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/* @} */
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/**
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* @name Line Status Register(LSR) mask(s)
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* @{
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*/
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#define XUN_LSR_RX_FIFO_ERROR 0x00000080 /**< An errored byte is in FIFO */
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#define XUN_LSR_TX_EMPTY 0x00000040 /**< Transmitter is empty */
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#define XUN_LSR_TX_BUFFER_EMPTY 0x00000020 /**< Transmit holding reg empty */
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#define XUN_LSR_BREAK_INT 0x00000010 /**< Break detected interrupt */
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#define XUN_LSR_FRAMING_ERROR 0x00000008 /**< Framing error on current byte */
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#define XUN_LSR_PARITY_ERROR 0x00000004 /**< Parity error on current byte */
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#define XUN_LSR_OVERRUN_ERROR 0x00000002 /**< Overrun error on receive FIFO */
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#define XUN_LSR_DATA_READY 0x00000001 /**< Receive data ready */
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#define XUN_LSR_ERROR_BREAK 0x0000001E /**< Errors except FIFO error and
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break detected */
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/* @} */
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#define XUN_DIVISOR_BYTE_MASK 0x000000FF
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/****************************************************************************/
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/**
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* Read a UART register.
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*
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* @param BaseAddress contains the base address of the device.
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* @param RegOffset contains the offset from the 1st register of the
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* device to select the specific register.
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*
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* @return The value read from the register.
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*
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* @note C-Style signature:
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* u32 XUartNs550_ReadReg(u32 BaseAddress, u32 RegOffset);
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*
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******************************************************************************/
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#define XUartNs550_ReadReg(BaseAddress, RegOffset) \
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Xil_In32((BaseAddress) + (RegOffset))
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/****************************************************************************/
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/**
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* Write to a UART register.
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*
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* @param BaseAddress contains the base address of the device.
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* @param RegOffset contains the offset from the 1st register of the
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* device to select the specific register.
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* @param RegisterValue is the value to be written to the regsiter.
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*
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* @return None.
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*
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* @note C-Style signature:
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* u32 XUartNs550_WriteReg(u32 BaseAddress, u32 RegOffset,
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* u32 RegisterValue);
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*
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******************************************************************************/
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#define XUartNs550_WriteReg(BaseAddress, RegOffset, RegisterValue) \
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Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))
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/****************************************************************************/
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/**
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* Get the UART Line Status Register.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return The value read from the register.
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*
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* @note C-Style signature:
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* u32 XUartNs550_GetLineStatusReg(u32 BaseAddress);
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*
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******************************************************************************/
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#define XUartNs550_GetLineStatusReg(BaseAddress) \
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XUartNs550_ReadReg((BaseAddress), XUN_LSR_OFFSET)
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/****************************************************************************/
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/**
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* Get the UART Line Status Register.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return The value read from the register.
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*
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* @note C-Style signature:
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* u32 XUartNs550_GetLineControlReg(u32 BaseAddress);
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*
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******************************************************************************/
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#define XUartNs550_GetLineControlReg(BaseAddress) \
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XUartNs550_ReadReg((BaseAddress), XUN_LCR_OFFSET)
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/****************************************************************************/
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/**
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* Set the UART Line Status Register.
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*
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* @param BaseAddress contains the base address of the device.
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* @param RegisterValue is the value to be written to the register.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XUartNs550_SetLineControlReg(u32 BaseAddress,
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* u32 RegisterValue);
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*
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******************************************************************************/
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#define XUartNs550_SetLineControlReg(BaseAddress, RegisterValue) \
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XUartNs550_WriteReg((BaseAddress), XUN_LCR_OFFSET, (RegisterValue))
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/****************************************************************************/
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/**
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* Enable the transmit and receive interrupts of the UART.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XUartNs550_EnableIntr(u32 BaseAddress);,
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*
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******************************************************************************/
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#define XUartNs550_EnableIntr(BaseAddress) \
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XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET, \
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XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) | \
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(XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
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/****************************************************************************/
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/**
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* Disable the transmit and receive interrupts of the UART.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XUartNs550_DisableIntr(u32 BaseAddress);,
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*
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******************************************************************************/
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#define XUartNs550_DisableIntr(BaseAddress) \
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XUartNs550_WriteReg((BaseAddress), XUN_IER_OFFSET, \
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XUartNs550_ReadReg((BaseAddress), XUN_IER_OFFSET) & \
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~(XUN_IER_RX_LINE | XUN_IER_TX_EMPTY | XUN_IER_RX_DATA))
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/****************************************************************************/
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/**
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* Determine if there is receive data in the receiver and/or FIFO.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return TRUE if there is receive data, FALSE otherwise.
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*
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* @note C-Style signature:
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* int XUartNs550_IsReceiveData(u32 BaseAddress);,
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*
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******************************************************************************/
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#define XUartNs550_IsReceiveData(BaseAddress) \
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(XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_DATA_READY)
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/****************************************************************************/
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/**
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* Determine if a byte of data can be sent with the transmitter.
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*
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* @param BaseAddress contains the base address of the device.
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*
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* @return TRUE if a byte can be sent, FALSE otherwise.
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*
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* @note C-Style signature:
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* int XUartNs550_IsTransmitEmpty(u32 BaseAddress);,
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*
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******************************************************************************/
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#define XUartNs550_IsTransmitEmpty(BaseAddress) \
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(XUartNs550_GetLineStatusReg(BaseAddress) & XUN_LSR_TX_BUFFER_EMPTY)
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/************************** Function Prototypes ******************************/
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void XUartNs550_SendByte(u32 BaseAddress, u8 Data);
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u8 XUartNs550_RecvByte(u32 BaseAddress);
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void XUartNs550_SetBaud(u32 BaseAddress, u32 InputClockHz, u32 BaudRate);
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/************************** Variable Definitions *****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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