a3ef256b4f
Use interrupt status register Tx empty bit instead of status register Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
839 lines
34 KiB
C
Executable file
839 lines
34 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2001 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xspi.h
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*
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* This component contains the implementation of the XSpi component. It is the
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* driver for an SPI master or slave device. It supports 8-bit, 16-bit and 32-bit
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* wide data transfers.
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*
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* SPI is a 4-wire serial interface. It is a full-duplex, synchronous bus that
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* facilitates communication between one master and one slave. The device is
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* always full-duplex, which means that for every byte sent, one is received, and
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* vice-versa. The master controls the clock, so it can regulate when it wants
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* to send or receive data. The slave is under control of the master, it must
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* respond quickly since it has no control of the clock and must send/receive
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* data as fast or as slow as the master does.
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*
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* The application software between master and slave must implement a higher
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* layer protocol so that slaves know what to transmit to the master and when.
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*
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* <b>Initialization & Configuration</b>
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*
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* The XSpi_Config structure is used by the driver to configure itself. This
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* configuration structure is typically created by the tool-chain based on HW
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* build properties.
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*
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* To support multiple runtime loading and initialization strategies employed
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* by various operating systems, the driver instance can be initialized in one
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* of the following ways:
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*
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* - XSpi_Initialize(InstancePtr, DeviceId) - The driver looks up its own
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* configuration structure created by the tool-chain based on an ID provided
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* by the tool-chain.
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*
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* - XSpi_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a
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* configuration structure provided by the caller. If running in a system
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* with address translation, the provided virtual memory base address
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* replaces the physical address present in the configuration structure.
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*
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* <b>Multiple Masters</b>
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*
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* More than one master can exist, but arbitration is the responsibility of the
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* higher layer software. The device driver does not perform any type of
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* arbitration.
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*
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* <b>Multiple Slaves</b>
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*
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* Multiple slaves are supported by adding additional slave select (SS) signals
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* to each device, one for each slave on the bus. The driver ensures that only
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* one slave can be selected at any one time.
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*
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* <b>FIFOs</b>
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*
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* The SPI hardware is parameterized such that it can be built with or without
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* FIFOs. When using FIFOs, both send and receive must have FIFOs. The driver
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* will not function correctly if one direction has a FIFO but the other
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* direction does not. The frequency of the interrupts which occur is
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* proportional to the data rate such that high data rates without the FIFOs
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* could cause the software to consume large amounts of processing time. The
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* driver is designed to work with or without the FIFOs.
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*
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* <b>Interrupts</b>
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*
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* The user must connect the interrupt handler of the driver,
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* XSpi_InterruptHandler to an interrupt system such that it will be called when
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* an interrupt occurs. This function does not save and restore the processor
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* context such that the user must provide this processing.
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*
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* The driver handles the following interrupts:
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* - Data Transmit Register/FIFO Empty
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* - Data Transmit FIFO Half Empty
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* - Data Transmit Register/FIFO Underrun
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* - Data Receive Register/FIFO Overrun
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* - Mode Fault Error
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* - Slave Mode Fault Error
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* - Slave Mode Select
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* - Data Receive FIFO not Empty
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*
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* The Data Transmit Register/FIFO Empty interrupt indicates that the SPI device
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* has transmitted all the data available to transmit, and now its data register
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* (or FIFO) is empty. The driver uses this interrupt to indicate progress while
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* sending data. The driver may have more data to send, in which case the data
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* transmit register (or FIFO) is filled for subsequent transmission. When this
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* interrupt arrives and all the data has been sent, the driver invokes the
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* status callback with a value of XST_SPI_TRANSFER_DONE to inform the upper
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* layer software that all data has been sent.
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*
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* The Data Transmit FIFO Half Empty interrupt indicates that the SPI device has
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* transmitted half of the data available, in the FIFO, to transmit. The driver
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* uses this interrupt to indicate progress while sending data. The driver may
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* have more data to send, in which case the data transmit FIFO is filled for
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* subsequent transmission. This interrupt is particualrly useful in slave mode,
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* while transfering more than FIFO_DEPTH number of bytes. In this case, the
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* driver ensures that the FIFO is never empty during a transfer and avoids
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* master receiving invalid data.
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*
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* The Data Transmit Register/FIFO Underrun interrupt indicates that, as slave,
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* the SPI device was required to transmit but there was no data available to
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* transmit in the transmit register (or FIFO). This may not be an error if the
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* master is not expecting data, but in the case where the master is expecting
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* data this serves as a notification of such a condition. The driver reports
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* this condition to the upper layer software through the status handler.
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*
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* The Data Receive Register/FIFO Overrun interrupt indicates that the SPI device
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* received data and subsequently dropped the data because the data receive
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* register (or FIFO) was full. The interrupt applies to both master and slave
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* operation. The driver reports this condition to the upper layer software
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* through the status handler. This likely indicates a problem with the higher
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* layer protocol, or a problem with the slave performance.
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*
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* The Mode Fault Error interrupt indicates that while configured as a master,
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* the device was selected as a slave by another master. This can be used by the
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* application for arbitration in a multimaster environment or to indicate a
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* problem with arbitration. When this interrupt occurs, the driver invokes the
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* status callback with a status value of XST_SPI_MODE_FAULT. It is up to the
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* application to resolve the conflict.
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*
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* The Slave Mode Fault Error interrupt indicates that a slave device was
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* selected as a slave by a master, but the slave device was disabled. This can
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* be used during system debugging or by the slave application to learn when the
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* slave application has not prepared for a master operation in a timely fashion.
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* This likely indicates a problem with the higher layer protocol, or a problem
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* with the slave performance.
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*
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* The Slave Mode Select interrupt indicates that the SPI device was selected as
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* a slave by a master. The driver reports this condition to the upper layer
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* software through the status handler.
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*
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* Data Receive FIFO not Empty interrupt indicates that the SPI device, in slave
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* mode, has received a data byte in the Data Receive FIFO, after the master has
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* started a transfer. The driver reports this condition to the upper layer
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* software through the status handler.
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*
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* <b>Polled Operation</b>
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*
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* This driver operates in polled mode operation too. To put the driver in polled
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* mode the Global Interrupt must be disabled after the Spi is Initialized and
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* Spi driver is started.
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*
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* Statistics are not updated in this mode of operation.
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*
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* <b>Device Busy</b>
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*
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* Some operations are disallowed when the device is busy. The driver tracks
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* whether a device is busy. The device is considered busy when a data transfer
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* request is outstanding, and is considered not busy only when that transfer
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* completes (or is aborted with a mode fault error). This applies to both
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* master and slave devices.
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*
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* <b>Device Configuration</b>
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*
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* The device can be configured in various ways during the FPGA implementation
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* process. Configuration parameters are stored in the xspi_g.c file or passed
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* in via _CfgInitialize(). A table is defined where each entry contains
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* configuration information for an SPI device. This information includes such
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* things as the base address of the memory-mapped device, the number of slave
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* select bits in the device, and whether the device has FIFOs and is configured
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* as slave-only.
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*
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* <b>RTOS Independence</b>
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*
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* This driver is intended to be RTOS and processor independent. It works
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* with physical addresses only. Any needs for dynamic memory management,
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* threads or thread mutual exclusion, virtual memory, or cache control must
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* be satisfied by the layer above this driver.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a rpm 10/11/01 First release
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* 1.00b jhl 03/14/02 Repartitioned driver for smaller files.
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* 1.01a jvb 12/14/05 I separated dependency on the static config table and
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* xparameters.h from the driver initialization by moving
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* _Initialize and _LookupConfig to _sinit.c. I also added
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* the new _CfgInitialize routine.
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* 1.11a wgr 03/22/07 Converted to new coding style.
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* 1.11a sv 02/22/08 Added the definition of LSB-MSB first option in xspi_l.h.
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* 1.12a sdm 03/22/08 Updated the code to support 16/32 bit transfer width and
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* polled mode of operation, removed the macros in xspi_l.h,
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* added macros in xspi.h file, moved the interrupt
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* register/bit definitions from xspi_i.h to xpsi_l.h.
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* Even for the polled mode of operation the Interrupt Logic
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* in the core should be included. The driver can be put in
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* polled mode of operation by disabling the Global Interrupt
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* after the Spi Initialization is completed and Spi is
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* started.
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* 2.00a sdm 07/30/08 Updated the code to support 16/32 bit transfer width and
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* polled mode of operation, removed the macros in xspi_l.h,
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* added macros in xspi.h file, moved the interrupt
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* register/bit definitions from xspi_i.h to xpsi_l.h.
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* Even for the polled mode of operation the Interrupt Logic
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* in the core should be included. The driver can be put in
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* polled mode of operation by disabling the Global Interrupt
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* after the Spi Initialization is completed and Spi is
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* started.
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* 2.01a sdm 08/22/08 Removed support for static interrupt handlers from the MDD
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* file
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* 2.01b sdm 04/08/09 Fixed an issue in the XSpi_Transfer function where the
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* Global Interrupt is being enabled in polled mode when a
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* slave is not selected.
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* 3.00a ktn 10/22/09 Converted all register accesses to 32 bit access.
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* Updated driver to use the HAL APIs/macros.
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* Removed the macro XSpi_mReset, XSpi_Reset API should be
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* used in its place.
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* The macros have been renamed to remove _m from the name
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* XSpi_mIntrGlobalEnable is renamed XSpi_IntrGlobalEnable,
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* XSpi_mIntrGlobalDisable is now XSpi_IntrGlobalDisable,
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* XSpi_mIsIntrGlobalEnabled is now XSpi_IsIntrGlobalEnabled,
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* XSpi_mIntrGetStatus is now XSpi_IntrGetStatus,
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* XSpi_mIntrClear is now XSpi_IntrClear,
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* XSpi_mIntrEnable is now XSpi_IntrEnable,
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* XSpi_mIntrDisable is now XSpi_IntrDisable,
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* XSpi_mIntrGetEnabled is now XSpi_IntrGetEnabled,
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* XSpi_mSetControlReg is now XSpi_SetControlReg,
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* XSpi_mGetControlReg is now XSpi_GetControlReg,
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* XSpi_mGetStatusReg is now XSpi_GetStatusReg,
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* XSpi_mSetSlaveSelectReg is now XSpi_SetSlaveSelectReg,
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* XSpi_mGetSlaveSelectReg is now XSpi_GetSlaveSelectReg,
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* XSpi_mEnable is now XSpi_Enable,
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* XSpi_mDisable is now XSpi_Disable.
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* 3.01a sdm 04/23/10 Updated the driver to handle new slave mode interrupts
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* and the DTR Half Empty interrupt.
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* 3.02a sdm 03/30/11 Updated to support axi_qspi.
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* 3.03a sdm 08/09/11 Updated the selftest to check for a correct default value
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* in the case of axi_qspi - CR 620502
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* Updated tcl to generate a config parameter for C_SPI_MODE
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* 3.04a bss 03/21/12 Updated XSpi_Config and XSpi instance structure to support
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* XIP Mode.
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* Updated XSpi_CfgInitialize to support XIP Mode
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* Added XIP Mode Register masks in xspi_l.h
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* Tcl Script changes:
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* Added C_TYPE_OF_AXI4_INTERFACE, C_AXI4_BASEADDR and
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* C_XIP_MODE to config structure.
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* Modified such that based on C_XIP_MODE and
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* C_TYPE_OF_AXI4_INTERFACE parameters C_BASEADDR will
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* be updated with C_AXI4_BASEADDR.
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* Modified such that C_FIFO_EXIST will be updated based
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* on C_FIFO_DEPTH for compatability of the driver with
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* Axi Spi.
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* 3.05a adk 18/04/13 Updated the code to avoid unused variable
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* warnings when compiling with the -Wextra -Wall flags
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* In the file xspi.c. CR:705005.
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* 3.06a adk 07/08/13 Added a dummy read in the CfgInitialize(), if startup
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* block is used in the h/w design (CR 721229).
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* 3.07a adk 11/10/13 Fixed CR:732962 Changes are made in the xspi.c file
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* 4.0 adk 19/12/13 Updated as per the New Tcl API's
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* 4.1 bss 08/07/14 Modified XSpi_Transfer in xspi.c and LoopbackTest in
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* xspi_selftest.c to check for Interrupt Status
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* register Tx Empty bit instead of Status register
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* CR#810294.
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*
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*
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* </pre>
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*
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******************************************************************************/
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#ifndef XSPI_H /* prevent circular inclusions */
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#define XSPI_H /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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#include "xspi_l.h"
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/************************** Constant Definitions *****************************/
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/** @name Configuration options
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*
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* The following options may be specified or retrieved for the device and
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* enable/disable additional features of the SPI. Each of the options
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* are bit fields, so more than one may be specified.
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*
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* @{
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*/
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/**
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* <pre>
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* The Master option configures the SPI device as a master. By default, the
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* device is a slave.
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*
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* The Active Low Clock option configures the device's clock polarity. Setting
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* this option means the clock is active low and the SCK signal idles high. By
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* default, the clock is active high and SCK idles low.
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*
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* The Clock Phase option configures the SPI device for one of two transfer
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* formats. A clock phase of 0, the default, means data if valid on the first
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* SCK edge (rising or falling) after the slave select (SS) signal has been
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* asserted. A clock phase of 1 means data is valid on the second SCK edge
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* (rising or falling) after SS has been asserted.
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*
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* The Loopback option configures the SPI device for loopback mode. Data is
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* looped back from the transmitter to the receiver.
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*
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* The Manual Slave Select option, which is default, causes the device not
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* to automatically drive the slave select. The driver selects the device
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* at the start of a transfer and deselects it at the end of a transfer.
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* If this option is off, then the device automatically toggles the slave
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* select signal between bytes in a transfer.
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* </pre>
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*/
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#define XSP_MASTER_OPTION 0x1
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#define XSP_CLK_ACTIVE_LOW_OPTION 0x2
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#define XSP_CLK_PHASE_1_OPTION 0x4
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#define XSP_LOOPBACK_OPTION 0x8
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#define XSP_MANUAL_SSELECT_OPTION 0x10
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/*@}*/
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/**************************** Type Definitions *******************************/
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/******************************************************************************/
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/**
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* The handler data type allows the user to define a callback function to
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* handle the asynchronous processing of the SPI driver. The application using
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* this driver is expected to define a handler of this type to support interrupt
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* driven mode. The handler executes in an interrupt context such that minimal
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* processing should be performed.
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*
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* @param CallBackRef A callback reference passed in by the upper layer when
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* setting the callback functions, and passed back to the
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* upper layer when the callback is invoked. Its type is
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* unimportant to the driver component, so it is a void
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* pointer.
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* @param StatusEvent Indicates one or more status events that occurred. See
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* the XSpi_SetStatusHandler() for details on the status
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* events that can be passed in the callback.
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* @param ByteCount Indicates how many bytes of data were successfully
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* transferred. This may be less than the number of bytes
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* requested if the status event indicates an error.
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*
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*******************************************************************************/
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typedef void (*XSpi_StatusHandler) (void *CallBackRef, u32 StatusEvent,
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unsigned int ByteCount);
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/**
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* XSpi statistics
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*/
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typedef struct {
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u32 ModeFaults; /**< Number of mode fault errors */
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u32 XmitUnderruns; /**< Number of transmit underruns */
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u32 RecvOverruns; /**< Number of receive overruns */
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u32 SlaveModeFaults; /**< Num of selects as slave while disabled */
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u32 BytesTransferred; /**< Number of bytes transferred */
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u32 NumInterrupts; /**< Number of transmit/receive interrupts */
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} XSpi_Stats;
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/**
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* This typedef contains configuration information for the device.
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*/
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typedef struct {
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u16 DeviceId; /**< Unique ID of device */
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u32 BaseAddress; /**< Base address of the device */
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int HasFifos; /**< Does device have FIFOs? */
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u32 SlaveOnly; /**< Is the device slave only? */
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u8 NumSlaveBits; /**< Num of slave select bits on the device */
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u8 DataWidth; /**< Data transfer Width */
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u8 SpiMode; /**< Standard/Dual/Quad mode */
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u8 AxiInterface; /**< AXI-Lite/AXI Full Interface */
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u32 AxiFullBaseAddress; /**< AXI Full Interface Base address of
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the device */
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u8 XipMode; /**< 0 if Non-XIP, 1 if XIP Mode */
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u8 Use_Startup; /**< 1 if Starup block is used in h/w */
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} XSpi_Config;
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/**
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* The XSpi driver instance data. The user is required to allocate a
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* variable of this type for every SPI device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct {
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XSpi_Stats Stats; /**< Statistics */
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u32 BaseAddr; /**< Base address of device (IPIF) */
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int IsReady; /**< Device is initialized and ready */
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int IsStarted; /**< Device has been started */
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int HasFifos; /**< Device is configured with FIFOs or not */
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u32 SlaveOnly; /**< Device is configured to be slave only */
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u8 NumSlaveBits; /**< Number of slave selects for this device */
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u8 DataWidth; /**< Data Transfer Width 8 or 16 or 32 */
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u8 SpiMode; /**< Standard/Dual/Quad mode */
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u32 SlaveSelectMask; /**< Mask that matches the number of SS bits */
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u32 SlaveSelectReg; /**< Slave select register */
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u8 *SendBufferPtr; /**< Buffer to send */
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u8 *RecvBufferPtr; /**< Buffer to receive */
|
|
unsigned int RequestedBytes; /**< Total bytes to transfer (state) */
|
|
unsigned int RemainingBytes; /**< Bytes left to transfer (state) */
|
|
int IsBusy; /**< A transfer is in progress (state) */
|
|
|
|
XSpi_StatusHandler StatusHandler; /**< Status Handler */
|
|
void *StatusRef; /**< Callback reference for status handler */
|
|
u32 FlashBaseAddr; /**< Used in XIP Mode */
|
|
u8 XipMode; /**< 0 if Non-XIP, 1 if XIP Mode */
|
|
} XSpi;
|
|
|
|
/***************** Macros (Inline Functions) Definitions *********************/
|
|
|
|
/******************************************************************************/
|
|
/**
|
|
*
|
|
* This macro writes to the global interrupt enable register to enable
|
|
* interrupts from the device.
|
|
*
|
|
* Interrupts enabled using XSpi_IntrEnable() will not occur until the global
|
|
* interrupt enable bit is set by using this function.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_IntrGlobalEnable(XSpi *InstancePtr);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrGlobalEnable(InstancePtr) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_DGIER_OFFSET, \
|
|
XSP_GINTR_ENABLE_MASK)
|
|
|
|
/******************************************************************************/
|
|
/**
|
|
*
|
|
* This macro disables all interrupts for the device by writing to the Global
|
|
* interrupt enable register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_IntrGlobalDisable(XSpi *InstancePtr);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrGlobalDisable(InstancePtr) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_DGIER_OFFSET, 0)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function determines if interrupts are enabled at the global level by
|
|
* reading the global interrupt register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return
|
|
* - TRUE if global interrupts are enabled.
|
|
* - FALSE if global interrupts are disabled.
|
|
*
|
|
* @note C-Style signature:
|
|
* int XSpi_IsIntrGlobalEnabled(XSpi *InstancePtr);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IsIntrGlobalEnabled(InstancePtr) \
|
|
(XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_DGIER_OFFSET) == \
|
|
XSP_GINTR_ENABLE_MASK)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function gets the contents of the Interrupt Status Register.
|
|
* This register indicates the status of interrupt sources for the device.
|
|
* The status is independent of whether interrupts are enabled such
|
|
* that the status register may also be polled when interrupts are not enabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return A status which contains the value read from the Interrupt
|
|
* Status Register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpi_IntrGetStatus(XSpi *InstancePtr);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrGetStatus(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_IISR_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function clears the specified interrupts in the Interrupt status
|
|
* Register. The interrupt is cleared by writing to this register with the bits
|
|
* to be cleared set to a one and all others bits to zero. Setting a bit which
|
|
* is zero within this register causes an interrupt to be generated.
|
|
*
|
|
* This function writes only the specified value to the register such that
|
|
* some status bits may be set and others cleared. It is the caller's
|
|
* responsibility to get the value of the register prior to setting the value
|
|
* to prevent an destructive behavior.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param ClearMask is the Bitmask for interrupts to be cleared.
|
|
* Bit positions of "1" clears the interrupt. Bit positions of 0
|
|
* will keep the previous setting. This mask is formed by OR'ing
|
|
* XSP_INTR_* bits defined in xspi_l.h.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_IntrClear(XSpi *InstancePtr, u32 ClearMask);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrClear(InstancePtr, ClearMask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_IISR_OFFSET, \
|
|
XSpi_IntrGetStatus(InstancePtr) | (ClearMask))
|
|
|
|
|
|
/******************************************************************************/
|
|
/**
|
|
*
|
|
* This function sets the contents of the Interrupt Enable Register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param EnableMask is the bitmask of the interrupts to be enabled.
|
|
* Bit positions of 1 will be enabled. Bit positions of 0 will
|
|
* keep the previous setting. This mask is formed by OR'ing
|
|
* XSP_INTR_* bits defined in xspi_l.h.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_IntrEnable(XSpi *InstancePtr, u32 EnableMask);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrEnable(InstancePtr, EnableMask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_IIER_OFFSET, \
|
|
(XSpi_ReadReg(((InstancePtr)->BaseAddr), \
|
|
XSP_IIER_OFFSET)) | (((EnableMask) & XSP_INTR_ALL )))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Disable the specified Interrupts in the Interrupt Enable Register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param DisableMask is the bitmask of the interrupts to be disabled.
|
|
* Bit positions of 1 will be disabled. Bit positions of 0 will
|
|
* keep the previous setting. This mask is formed by OR'ing
|
|
* XSP_INTR_* bits defined in xspi_l.h.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_IntrDisable(XSpi *InstancePtr, u32 DisableMask);
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrDisable(InstancePtr, DisableMask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_IIER_OFFSET, \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), \
|
|
XSP_IIER_OFFSET) & (~ ((DisableMask) & XSP_INTR_ALL )))
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function gets the contents of the Interrupt Enable Register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return The contents read from the Interrupt Enable Register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpi_IntrGetEnabled(XSpi *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XSpi_IntrGetEnabled(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_IIER_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the control register. Use the XSP_CR_* constants defined
|
|
* above to create the bit-mask to be written to the register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param Mask is the 32-bit value to write to the control register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_SetControlReg(XSpi *InstancePtr, u32 Mask);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_SetControlReg(InstancePtr, Mask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_CR_OFFSET, (Mask))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the control register. Use the XSP_CR_* constants defined
|
|
* above to interpret the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return A 32-bit value representing the contents of the control
|
|
* register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpi_GetControlReg(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_GetControlReg(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_CR_OFFSET)
|
|
|
|
/***************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the status register. Use the XSP_SR_* constants defined
|
|
* above to interpret the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return An 32-bit value representing the contents of the status
|
|
* register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u8 XSpi_GetStatusReg(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_GetStatusReg(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_SR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the XIP control register. Use the XSP_CR_XIP_* constants
|
|
* defined above to create the bit-mask to be written to the register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param Mask is the 32-bit value to write to the control register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_SetXipControlReg(XSpi *InstancePtr, u32 Mask);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_SetXipControlReg(InstancePtr, Mask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_CR_OFFSET, (Mask))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the XIP control register. Use the XSP_CR_XIP_* constants
|
|
* defined above to interpret the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return A 32-bit value representing the contents of the control
|
|
* register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpi_GetXipControlReg(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_GetXipControlReg(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_CR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the status register. Use the XSP_SR_XIP_* constants
|
|
* defined above to interpret the bit-mask returned.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return An 32-bit value representing the contents of the status
|
|
* register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u8 XSpi_GetXipStatusReg(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_GetXipStatusReg(InstancePtr) \
|
|
XSpi_ReadReg(((InstancePtr)->BaseAddr), XSP_SR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Set the contents of the slave select register. Each bit in the mask
|
|
* corresponds to a slave select line. Only one slave should be selected at
|
|
* any one time.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
* @param Mask is the 32-bit value to write to the slave select register.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_SetSlaveSelectReg(XSpi *InstancePtr, u32 Mask);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_SetSlaveSelectReg(InstancePtr, Mask) \
|
|
XSpi_WriteReg(((InstancePtr)->BaseAddr), XSP_SSR_OFFSET, (Mask))
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Get the contents of the slave select register. Each bit in the mask
|
|
* corresponds to a slave select line. Only one slave should be selected at
|
|
* any one time.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return The 32-bit value in the slave select register.
|
|
*
|
|
* @note C-Style signature:
|
|
* u32 XSpi_GetSlaveSelectReg(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_GetSlaveSelectReg(InstancePtr) \
|
|
XSpi_ReadReg((InstancePtr)->BaseAddr, XSP_SSR_OFFSET)
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Enable the device and uninhibit master transactions. Preserves the current
|
|
* contents of the control register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_Enable(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_Enable(InstancePtr) \
|
|
{ \
|
|
u16 Control; \
|
|
Control = XSpi_GetControlReg((InstancePtr)); \
|
|
Control |= XSP_CR_ENABLE_MASK; \
|
|
Control &= ~XSP_CR_TRANS_INHIBIT_MASK; \
|
|
XSpi_SetControlReg((InstancePtr), Control); \
|
|
}
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* Disable the device. Preserves the current contents of the control register.
|
|
*
|
|
* @param InstancePtr is a pointer to the XSpi instance to be worked on.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-Style signature:
|
|
* void XSpi_Disable(XSpi *InstancePtr);
|
|
*
|
|
*****************************************************************************/
|
|
#define XSpi_Disable(InstancePtr) \
|
|
XSpi_SetControlReg((InstancePtr), \
|
|
XSpi_GetControlReg((InstancePtr)) & ~XSP_CR_ENABLE_MASK)
|
|
|
|
/************************** Function Prototypes ******************************/
|
|
|
|
/*
|
|
* Initialization functions in xspi_sinit.c
|
|
*/
|
|
int XSpi_Initialize(XSpi *InstancePtr, u16 DeviceId);
|
|
XSpi_Config *XSpi_LookupConfig(u16 DeviceId);
|
|
|
|
/*
|
|
* Functions, in xspi.c
|
|
*/
|
|
int XSpi_CfgInitialize(XSpi *InstancePtr, XSpi_Config * Config,
|
|
u32 EffectiveAddr);
|
|
|
|
int XSpi_Start(XSpi *InstancePtr);
|
|
int XSpi_Stop(XSpi *InstancePtr);
|
|
|
|
void XSpi_Reset(XSpi *InstancePtr);
|
|
|
|
int XSpi_SetSlaveSelect(XSpi *InstancePtr, u32 SlaveMask);
|
|
u32 XSpi_GetSlaveSelect(XSpi *InstancePtr);
|
|
|
|
int XSpi_Transfer(XSpi *InstancePtr, u8 *SendBufPtr, u8 *RecvBufPtr,
|
|
unsigned int ByteCount);
|
|
|
|
void XSpi_SetStatusHandler(XSpi *InstancePtr, void *CallBackRef,
|
|
XSpi_StatusHandler FuncPtr);
|
|
void XSpi_InterruptHandler(void *InstancePtr);
|
|
|
|
|
|
/*
|
|
* Functions for selftest, in xspi_selftest.c
|
|
*/
|
|
int XSpi_SelfTest(XSpi *InstancePtr);
|
|
|
|
/*
|
|
* Functions for statistics, in xspi_stats.c
|
|
*/
|
|
void XSpi_GetStats(XSpi *InstancePtr, XSpi_Stats *StatsPtr);
|
|
void XSpi_ClearStats(XSpi *InstancePtr);
|
|
|
|
/*
|
|
* Functions for options, in xspi_options.c
|
|
*/
|
|
int XSpi_SetOptions(XSpi *InstancePtr, u32 Options);
|
|
u32 XSpi_GetOptions(XSpi *InstancePtr);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* end of protection macro */
|