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embeddedsw/XilinxProcessorIPLib/drivers/v_hscaler/src
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Rohit Consul 53ce20d940 v_hscaler: Coefficient register base address offset changed in IP 
Coefficient register base address offset changed in IP from 0x400 to
0x800 to accomodate all supported taps.
Split Phase and Coefficient programming logic in 2 independent
API's. For Bicubic and Bilinear scalers only Phase needs to be
programmed.

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
2015-08-24 23:09:19 +05:30
..
Makefile v_hscaler: Update dependency driver version 2015-08-10 14:14:18 +05:30
xv_hscaler.c v_hscaler: Updated driver to align with hip flow 2015-07-23 11:00:40 +05:30
xv_hscaler.h v_hscaler: Updated driver to align with hip flow 2015-07-23 11:00:40 +05:30
xv_hscaler_coeff.c v_hscaler: Added multiple pixel per clock support 2015-08-04 14:10:22 +05:30
xv_hscaler_g.c v_hscaler: Updated driver to align with hip flow 2015-07-23 11:00:40 +05:30
xv_hscaler_hw.h v_hscaler: Coefficient register base address offset changed in IP 2015-08-24 23:09:19 +05:30
xv_hscaler_l2.c v_hscaler: Coefficient register base address offset changed in IP 2015-08-24 23:09:19 +05:30
xv_hscaler_l2.h v_hscaler: Added multiple pixel per clock support 2015-08-04 14:10:22 +05:30
xv_hscaler_linux.c v_hscaler: Updated driver to align with hip flow 2015-07-23 11:00:40 +05:30
xv_hscaler_sinit.c v_hscaler: Updated driver to align with hip flow 2015-07-23 11:00:40 +05:30