embeddedsw/XilinxProcessorIPLib/drivers/v_vscaler
Rohit Consul a9740e3b93 v_vscaler: Coefficient register base address offset changed in IP
Coefficient register base address offset changed in IP from
0x400 to  0x800 to accomodate all supported taps.
Split Phase and Coefficient programming logic in 2 independent
API's. For Bicubic and Bilinear scalers only Phase needs to
be programmed.

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
2015-08-24 23:09:34 +05:30
..
data v_vscaler: Added multiple pixel per clock support 2015-08-04 14:10:51 +05:30
src v_vscaler: Coefficient register base address offset changed in IP 2015-08-24 23:09:34 +05:30