2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
95 lines
4.2 KiB
Text
Executable file
95 lines
4.2 KiB
Text
Executable file
xemacps_ieee1588_example_readme.txt
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-----------------------------------
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The examples in this directory are provided to give the user some idea of the
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following:
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- How the EmacPs and its driver are intended to be used.
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- How the protocol packets flow and processed for IEEE1588 (PTP).
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FILES
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Three files are provided to demonstrate the usage of EmacPs and the
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driver. They are:
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- xemacps_example.h - Top level include for the example.
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- xemacps_example_util.c - Provide various utilities for debugging, and
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ethernet frame construction.
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- xemacps_example_intr_dma.c - Implements the example that uses EmacPs internal
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DMA to send and receive packets in loopback mode. It uses interrupts.
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The user must include the above three files for building the binary to see how
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Ethernet packets are sent and received in PHY loopback mode..
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Three files are provided for demonstrating the IEEE1588 protocol. They are:
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- xemacps_ieee1588_example.c: The top level C file that has the programe
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entry "main". It also has initialization code for EmacPs, Timer etc.
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It has initialization code for PTP packets.
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- xemacps_ieee1588.h: Include file that contains all function prototypes,
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hash defines etc.
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- xemacps_ieee1588.c: The protocol packets are processed in this file.
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The user must include the above three files for building the binary to see
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how IEEE1588 (PTP) works.
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SYSTEM REQUIREMENTS
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The system containing the EmacPs should have the following capabilities:
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- An interrupt controller
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- A UART to display messages
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- A Timer that is used to send protocol packets at regular intervals
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For testing the example in xemacps_example_intr_dma.c which uses PHY loopback,
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a single hardware system is sufficient.
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To run and test the binary created for IEEE1588 (PTP), the user
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needs to have two EmacPs based hardware systems connected back-to-back.
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One would act as a Master and other as a slave.
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HOW THE IEEE1588 EXAMPLE WORKS
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- The example should be run between two boards, both having capability to
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time stamp the PTP packets. For example, it can be run between two Zynq
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boards, two PEEP boards, one Zynq and one PEEP board etc. Additionally
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this example is also tested between a Zynq/PEEP board and a ML605 board.
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However, on ML605 board we need to run a slightly modified AVB example
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(for AxiEthernet) available in Perforce for AxiEthernet driver.
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- To run the example on a PEEP board, please define the flag PEEP in
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xemacps_ieee1588.h (or with -DPEEP compile time option).
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- The example can be run in PTP MASTER mode or PTP SLAVE mode. To run it in
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PTP MASTER mode please define the flag IEEE1588_MASTER
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(with -DIEEE1588_MASTER) in the compiler options or just define it in
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xemacps_ieee1588.h. If this flag is defined then the software runs in
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MASTER mode or else in SLAVE mode.
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- The example by default initializes the PHY and GEM for 100 Mbps speed.
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Additionally autonegotiation can be used. To use autonegotiation, please
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define the flag PHY_AUTONEGOTIATION. However this feature is applicable
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only for Zynq boards.
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- ScuTimer is used to generate interrupts every 500 mseconds. This timer
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interrupt is used to send various protocol packets. For example, Sync/
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FollowUp packets are sent every 1 seconds. Announce frames are sent every
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5 seconds and PDelay packets are sent every 4 seconds.
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- In a typical test setup, 2 Zynq boards are connected back to back. Please
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build the SDK projects (with the above 3 files) in MASTER mode and download
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the elf to one Zynq board. Then build the SDK project in SLAVE mode and
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download and run it in the other board. You can start seeing the console
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messages.
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- There are two debug levels. By default debug level 1 is defined to see
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some of the important PTP messages. For example, the link delay and the
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time correction values. The other debug level can be defined to see the
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messages from ISR. It can be handy to debug issues if any. To define the
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1st debug level, define the flag DEBUG_XEMACPS_LEVEL1 in
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xemacps_ieee1588.h. To define the other debug level, define the flag
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DEBUG_LEVEL_TWO.
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- Signalling frames are not implemented. So at runtime, we cannot change
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mode between MASTER and SLAVE. Clock adjustment is implemented, but
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clock rate adjustment is not implemented.
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