b48c668c9a
This patch modifies the code as per the opensource git changes and updates the license information Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
65 lines
2.7 KiB
C
65 lines
2.7 KiB
C
/*
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* Copyright (c) 2015 Xilinx, Inc. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of Mentor Graphics Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef PLATFORM_H_
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#define PLATFORM_H_
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#include <stdio.h>
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#include "hil.h"
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/* ------------------------- Macros --------------------------*/
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/********************/
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/* Register offsets */
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/********************/
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/* -- FIX ME: ipi info is to be defined -- */
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struct ipi_info {
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uint32_t ipi_base_addr;
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uint32_t ipi_chn_mask;
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};
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/* IPC Device parameters */
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#define SHM_ADDR (void *)0x3ED08000
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#define SHM_SIZE 0x00200000
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#define IPI_BASEADDR 0xff310000
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#define IPI_CHN_BITMASK 0x00000001 /* IPI channel bit mask APU<->RPU0 */
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#define VRING0_IPI_INTR_VECT -1
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#define VRING1_IPI_INTR_VECT 65
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#define MASTER_CPU_ID 0
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#define REMOTE_CPU_ID 1
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int _enable_interrupt(struct proc_vring *vring_hw);
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void _reg_ipi_after_deinit(struct proc_vring *vring_hw);
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void _notify(int cpu_id, struct proc_intr *intr_info);
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int _boot_cpu(int cpu_id, unsigned int load_addr);
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void _shutdown_cpu(int cpu_id);
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void platform_isr(int vect_id, void *data);
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void deinit_isr(int vect_id, void *data);
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#endif /* PLATFORM_H_ */
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