208 lines
7.1 KiB
C
208 lines
7.1 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xaxis_switch.h
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* @addtogroup axis_switch_v1_0
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* @{
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* @details
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*
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* This is the main header file for Xilinx AXI4-Stream Switch Control Router
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* core. It is used for routing streams where masters in the system do not know
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* final destination address.
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*
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* <b>Core Features </b>
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*
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* For a full description of AXI4-Stream Switch Control Router, please see the
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* hardware specification.
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*
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* <b>Software Initialization & Configuration</b>
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*
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* The application needs to do following steps in order for preparing the
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* AXI4-Stream Switch Control Router core to be ready.
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*
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* - Call XAxisScr_LookupConfig using a device ID to find the core
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* configuration.
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* - Call XAxisScr_CfgInitialize to initialize the device and the driver
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* instance associated with it.
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*
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* <b>Interrupts </b>
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*
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* This driver does not have interrupt mechanism.
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*
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* <b> Virtual Memory </b>
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*
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* This driver supports Virtual Memory. The RTOS is responsible for calculating
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* the correct device base address in Virtual Memory space.
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*
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* <b> Threads </b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b> Asserts </b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b> Building the driver </b>
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*
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* The XAXI4-Stream Switch driver is composed of several source files. This
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* allows the user to build and link only those parts of the driver that are
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* necessary.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- --- -------- --------------------------------------------------
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* 1.00 sha 01/28/15 Initial release.
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* </pre>
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*
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******************************************************************************/
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#ifndef XAXIS_SWITCH_H_
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#define XAXIS_SWITCH_H_ /**< Prevent circular inclusions
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* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xaxis_switch_hw.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/**
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* This typedef contains configuration information for the AXI4-Stream Switch
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* core. Each AXI4-Stream Switch device should have a configuration structure
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* associated.
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*/
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typedef struct {
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u16 DeviceId; /**< DeviceId is the unique ID of the AXI4-
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* Stream Switch core */
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u32 BaseAddress; /**< BaseAddress is the physical base address
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* of the core's registers */
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u8 MaxNumSI; /**< Maximum number of Slave interfaces */
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u8 MaxNumMI; /**< Maximum number of Master interfaces */
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} XAxis_Switch_Config;
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/**
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* The AXI4-Stream Switch driver instance data. An instance must be allocated
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* for each core in use.
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*/
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typedef struct {
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XAxis_Switch_Config Config; /**< Hardware Configuration */
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u32 IsReady; /**< Core and the driver instance are
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* initialized */
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} XAxis_Switch;
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/***************** Macros (Inline Functions) Definitions *********************/
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/*****************************************************************************/
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/**
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*
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* This macro enables register updates.
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*
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* @param InstancePtr is a pointer to the XAxis_Switch core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XAxisScr_RegUpdateEnable(XAxis_Switch *InstancePtr)
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*
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******************************************************************************/
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#define XAxisScr_RegUpdateEnable(InstancePtr) \
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XAxisScr_WriteReg((InstancePtr)->Config.BaseAddress, \
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XAXIS_SCR_CTRL_OFFSET, \
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XAxisScr_ReadReg((InstancePtr)->Config.BaseAddress, \
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XAXIS_SCR_CTRL_OFFSET) | \
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XAXIS_SCR_CTRL_REG_UPDATE_MASK)
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/*****************************************************************************/
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/**
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*
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* This macro disables register updates.
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*
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* @param InstancePtr is a pointer to the XAxis_Switch core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XAxisScr_RegUpdateDisable(XAxis_Switch *InstancePtr)
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*
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******************************************************************************/
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#define XAxisScr_RegUpdateDisable(InstancePtr) \
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XAxisScr_WriteReg((InstancePtr)->Config.BaseAddress, \
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XAXIS_SCR_CTRL_OFFSET, \
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XAxisScr_ReadReg((InstancePtr)->Config.BaseAddress, \
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XAXIS_SCR_CTRL_OFFSET) & \
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(~XAXIS_SCR_CTRL_REG_UPDATE_MASK))
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/************************** Function Prototypes ******************************/
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/* Initialization function in xaxis_switch_sinit.c */
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XAxis_Switch_Config *XAxisScr_LookupConfig(u16 DeviceId);
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/* Initialization and control functions in xaxis_switch.c */
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s32 XAxisScr_CfgInitialize(XAxis_Switch *InstancePtr,
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XAxis_Switch_Config *CfgPtr, u32 EffectiveAddr);
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void XAxisScr_MiPortEnable(XAxis_Switch *InstancePtr, u8 MiIndex,
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u8 SiIndex);
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void XAxisScr_MiPortDisable(XAxis_Switch *InstancePtr, u8 MiIndex);
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s32 XAxisScr_IsMiPortEnabled(XAxis_Switch *InstancePtr, u8 MiIndex,
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u8 SiIndex);
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s32 XAxisScr_IsMiPortDisabled(XAxis_Switch *InstancePtr, u8 MiIndex);
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void XAxisScr_MiPortDisableAll(XAxis_Switch *InstancePtr);
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/* Self test function in xaxis_switch_selftest.c */
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s32 XAxisScr_SelfTest(XAxis_Switch *InstancePtr);
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/************************** Variable Declarations ****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* End of protection macro */
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/** @} */
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