
Acknowledge DMA transfer is complete by clearing DONE status. This will make sure that the next transfer doesn’t assume DONE when it isn’t. Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com> Acked-by: Krishna Chaitanya Patakamuri <kpataka@xilinx.com>
298 lines
9.6 KiB
C
298 lines
9.6 KiB
C
/******************************************************************************
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*
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* (c) Copyright 2014 Xilinx, Inc. All rights reserved.
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*
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* This file contains confidential and proprietary information of Xilinx, Inc.
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* and is protected under U.S. and international copyright and other
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* intellectual property laws.
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*
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* DISCLAIMER
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* This disclaimer is not a license and does not grant any rights to the
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* materials distributed herewith. Except as otherwise provided in a valid
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* license issued to you by Xilinx, and to the maximum extent permitted by
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* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
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* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
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* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE
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* and (2) Xilinx shall not be liable (whether in contract or tort, including
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* negligence, or under any other theory of liability) for any loss or damage
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* of any kind or nature related to, arising under or in connection with these
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* materials, including for any direct, or any indirect, special, incidental,
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* or consequential loss or damage (including loss of data, profits, goodwill,
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* or any type of loss or damage suffered as a result of any action brought by
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* a third party) even if such damage or loss was reasonably foreseeable or
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* Xilinx had been advised of the possibility of the same.
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*
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* CRITICAL APPLICATIONS
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* Xilinx products are not designed or intended to be fail-safe, or for use in
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* any application requiring fail-safe performance, such as life-support or
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* safety devices or systems, Class III medical devices, nuclear facilities,
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* applications related to the deployment of airbags, or any other applications
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* that could lead to death, personal injury, or severe property or
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* environmental damage (individually and collectively, "Critical
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* Applications"). Customer assumes the sole risk and liability of any use of
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* Xilinx products in Critical Applications, subject only to applicable laws
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* and regulations governing limitations on product liability.
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*
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* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
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* AT ALL TIMES.
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*
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*******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xsecure_sha.c
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*
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* This file contains the implementation of the interface functions for SHA
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* driver. Refer to the header file xsecure_sha.h for more detailed information.
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00 ba 08/10/14 Initial release
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*
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* </pre>
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*
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* @note
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xsecure_sha.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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/************************** Function Definitions *****************************/
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/****************************************************************************/
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/**
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*
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* Initializes a specific Xsecure_Sha3 instance so that it is ready to be used.
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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* @param CsuDmaPtr is the pointer to the XCsuDma instance.
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*
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* @return XST_SUCCESS if initialization was successful
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*
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* @note The base address is initialized directly with value from
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* xsecure_hw.h
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*
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*****************************************************************************/
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s32 XSecure_Sha3Initialize(XSecure_Sha3 *InstancePtr, XCsuDma* CsuDmaPtr)
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{
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/* Assert validates the input arguments */
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(CsuDmaPtr != NULL);
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InstancePtr->BaseAddress = XSECURE_CSU_SHA3_BASE;
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InstancePtr->Sha3Len = 0U;
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InstancePtr->CsuDmaPtr = CsuDmaPtr;
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* Generate padding for the SHA-3 engine
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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* @param Dst is the pointer to location where padding is to be applied
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* @param MsgLen is the length of padding in bytes
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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void XSecure_Sha3Padd(XSecure_Sha3 *InstancePtr, u8 *Dst, u32 MsgLen)
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{
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/* Assert validates the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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memset(Dst, 0, MsgLen);
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Dst[0] = 0x1U;
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Dst[MsgLen -1U] |= 0x80U;
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}
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/*****************************************************************************/
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/**
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*
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* Configure SSS and start the SHA-3 engine
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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void XSecure_Sha3Start(XSecure_Sha3 *InstancePtr)
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{
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/* Asserts validate the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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InstancePtr->Sha3Len = 0U;
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/* Reset SHA3 engine. */
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XSecure_WriteReg(InstancePtr->BaseAddress,
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XSECURE_CSU_SHA3_RESET_OFFSET,
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XSECURE_CSU_SHA3_RESET_RESET);
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XSecure_WriteReg(InstancePtr->BaseAddress,
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XSECURE_CSU_SHA3_RESET_OFFSET, 0U);
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/* Configure the SSS for SHA3 hashing. */
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XSecure_SssSetup(XSecure_SssInputSha3(XSECURE_CSU_SSS_SRC_SRC_DMA));
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/* Start SHA3 engine. */
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XSecure_WriteReg(InstancePtr->BaseAddress,
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XSECURE_CSU_SHA3_START_OFFSET,
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XSECURE_CSU_SHA3_START_START);
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}
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/*****************************************************************************/
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/**
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*
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* Update hash for new input data block
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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* @param Data is the pointer to the input data for hashing
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* @param Size of the input data in bytes
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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void XSecure_Sha3Update(XSecure_Sha3 *InstancePtr, const u8 *Data,
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const u32 Size)
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{
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/* Asserts validate the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(Size != (u32)0x00U);
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InstancePtr->Sha3Len += Size;
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XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
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(UINTPTR)Data, (u32)Size/4, 0);
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/* Checking the CSU DMA done bit should be enough. */
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XCsuDma_WaitForDone(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL);
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/* Acknowledge the transfer has completed */
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XCsuDma_IntrClear(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
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XCSUDMA_IXR_DONE_MASK);
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}
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/*****************************************************************************
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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void XSecure_Sha3WaitForDone(XSecure_Sha3 *InstancePtr)
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{
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/* Asserts validate the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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volatile u32 Status;
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do
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{
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Status = XSecure_ReadReg(InstancePtr->BaseAddress,
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XSECURE_CSU_SHA3_DONE_OFFSET);
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} while (XSECURE_CSU_SHA3_DONE_DONE !=
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((u32)Status & XSECURE_CSU_SHA3_DONE_DONE));
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}
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/*****************************************************************************/
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/**
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*
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* Sending the last data and padding when blocksize is not multiple of 104
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* bytes
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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* @param Hash is the pointer to location where resulting hash will be
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* written
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*
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* @return None
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*
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* @note None
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*
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*****************************************************************************/
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void XSecure_Sha3Finish(XSecure_Sha3 *InstancePtr, u8 *Hash)
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{
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/* Asserts validate the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(Hash != NULL);
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u32 *HashPtr = (u32 *)Hash;
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u32 PartialLen = InstancePtr->Sha3Len % XSECURE_SHA3_BLOCK_LEN;
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u8 XSecure_RsaSha3Array[512] = {0U};
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PartialLen = (PartialLen == 0U)?(XSECURE_SHA3_BLOCK_LEN) :
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(XSECURE_SHA3_BLOCK_LEN - PartialLen);
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XSecure_Sha3Padd(InstancePtr, XSecure_RsaSha3Array, PartialLen);
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XCsuDma_Transfer(InstancePtr->CsuDmaPtr, XCSUDMA_SRC_CHANNEL,
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(UINTPTR)XSecure_RsaSha3Array, PartialLen/4, 1);
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/* Check the SHA3 DONE bit. */
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XSecure_Sha3WaitForDone(InstancePtr);
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/* If requested, read out the Hash in reverse order. */
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if (Hash)
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{
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u32 Index = 0U;
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u32 Val = 0U;
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for (Index=0U; Index < 12U; Index++)
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{
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Val = XSecure_ReadReg(InstancePtr->BaseAddress,
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XSECURE_CSU_SHA3_DIGEST_0_OFFSET + (Index * 4));
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HashPtr[11U - Index] = Val;
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}
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}
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}
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/*****************************************************************************/
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/**
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*
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* Calculate SHA-3 Digest on the given input data
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*
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* @param InstancePtr is a pointer to the XSecure_Sha3 instance.
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* @param In is the pointer to the input data for hashing
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* @param Size of the input data
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* @param Out is the pointer to location where resulting hash will be
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* written.
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*
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* @return None
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*
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* @note None
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*
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******************************************************************************/
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void XSecure_Sha3Digest(XSecure_Sha3 *InstancePtr, const u8 *In, const u32 Size,
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u8 *Out)
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{
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/* Asserts validate the input arguments */
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(Size != (u32)0x00U);
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Xil_AssertVoid(Out != NULL);
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XSecure_Sha3Start(InstancePtr);
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XSecure_Sha3Update(InstancePtr, In, Size);
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XSecure_Sha3Finish(InstancePtr, Out);
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}
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