6a08b60322
This patch updates the doxygen for the drivers wdtps,wdttb,xadcps,usb,usbps to include .h files in the listof files provided in the index.html file. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
67 lines
3.9 KiB
HTML
Executable file
67 lines
3.9 KiB
HTML
Executable file
<html>
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<head>
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<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>
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Xilinx Driver wdttb v3_0: wdttb v3_0
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</title>
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<link href="doxygen_kalyanidocs/doc/css/driver_api_doxygen.css" rel="stylesheet" type="text/css">
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</head>
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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<hl>Software Drivers</hl>
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<hr class="whs1">
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<!-- Generated by Doxygen 1.6.1 -->
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<div class="navigation" id="top">
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<div class="tabs">
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<ul>
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<li class="current"><a href="index.html"><span>Main Page</span></a></li>
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<li><a href="annotated.html"><span>Classes</span></a></li>
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<li><a href="files.html"><span>Files</span></a></li>
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</ul>
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</div>
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</div>
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<div class="contents">
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<h1>wdttb v3_0</h1><p>The Xilinx watchdog timer/timebase component supports the Xilinx watchdog timer/timebase hardware. More detailed description of the driver operation for each function can be found in the <a class="el" href="xwdttb_8c.html">xwdttb.c</a> file.</p>
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<p>The Xilinx watchdog timer/timebase driver supports the following features:</p>
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<ul>
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<li>Polled mode</li>
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<li>enabling and disabling (if allowed by the hardware) the watchdog timer</li>
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<li>restarting the watchdog.</li>
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<li>reading the timebase.</li>
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</ul>
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<p>It is the responsibility of the application to provide an interrupt handler for the timebase and the watchdog and connect them to the interrupt system if interrupt driven mode is desired.</p>
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<p>The watchdog timer/timebase component ALWAYS generates an interrupt output when:</p>
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<ul>
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<li>the watchdog expires the first time</li>
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<li>the timebase rolls over</li>
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</ul>
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<p>and ALWAYS generates a reset output when the watchdog timer expires a second time. This is not configurable in any way from the software driver's perspective.</p>
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<p>The Timebase is reset to 0 when the Watchdog Timer is enabled.</p>
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<p>If the hardware interrupt signal is not connected, polled mode is the only option (using IsWdtExpired) for the watchdog. Reset output will occur for the second watchdog timeout regardless. Polled mode for the timebase rollover is just reading the contents of the register and seeing if the MSB has transitioned from 1 to 0.</p>
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<p>The IsWdtExpired function is used for polling the watchdog timer and it is also used to check if the watchdog was the cause of the last reset. In this situation, call Initialize then call WdtIsExpired. If the result is true watchdog timeout caused the last system reset. It is then acceptable to further initialize the component which will reset this bit.</p>
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<p>This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.</p>
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<pre>
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MODIFICATION HISTORY:</pre><pre> Ver Who Date Changes
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----- ---- -------- -----------------------------------------------
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1.00a ecm 08/16/01 First release
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1.00b jhl 02/21/02 Repartitioned driver for smaller files
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1.00b rpm 04/26/02 Made LookupConfig public and added <a class="el" href="struct_x_wdt_tb___config.html">XWdtTb_Config</a>
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1.10b mta 03/23/07 Updated to new coding style
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1.11a sdm 08/22/08 Removed support for static interrupt handlers from the MDD
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file
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2.00a ktn 22/10/09 The driver is updated to use HAL processor APIs/macros.
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The following macros defined in <a class="el" href="xwdttb__l_8h.html">xwdttb_l.h</a> file have been
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removed - XWdtTb_mEnableWdt, XWdtTb_mDisbleWdt,
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XWdtTb_mRestartWdt, XWdtTb_mGetTimebaseReg and
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XWdtTb_mHasReset.
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Added the XWdtTb_ReadReg and XWdtTb_WriteReg
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macros. User should XWdtTb_ReadReg/XWdtTb_WriteReg to
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acheive the desired functioanality of the macros that
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were removed.
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3.0 adk 19/12/13 Updated as per the New Tcl API's
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</pre> </div>
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<p class="Copyright">
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Copyright © 1995-2014 Xilinx, Inc. All rights reserved.
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</p>
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</body>
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</html>
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