Xilinx Embedded Software (embeddedsw) Development
d796348e29
- Changed the offset from type u8 to u16. - In order to accomodate offsets greater than 255, a segment pointer is used. - The I2C read funciton is now able to access blocks other than the block 0 and 1 at a given address. E.g., EDID extension blocks may now be accessed by reading from I2C address 0x50 (raw=0xA0/0xA1) and writing the appropriate segment pointer and offset. - Input offset=0. - EDID block 0: I2C read on offset=0 and segptr=0. - Input offset=128. - EDID block 1: I2C read on offset=128 and segptr=0. - Input offset=256. - EDID block 2: I2C read on offset=0 and segptr=1. - Input offset=384. - EDID block 3: I2C read on offset=128 and segptr=1. - etc. - Writing to the I2C address 0x30 (raw=0x60/0x61) sets the segment pointer. - Writing to an I2C address sets the offset that will be read from that address. E.g., a read of the EDID, starting at offset 128 would be done by writing 128 to 0x50, then reading from 0x50. - Offsets that cross a 256-byte boundary requiring increment of the segment pointer is also handled. E.g. A 16 byte read on input offset 500 results in the the returned 16 byte array having the first 11 bytes from segptr=1 (bytes 244-255) and the last 5 bytes from segptr=2 (bytes 0-4). Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com> |
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| lib | ||
| mcap/linux | ||
| ThirdParty/sw_services/lwip140 | ||
| XilinxProcessorIPLib/drivers | ||
| license.txt | ||
| README.txt | ||
embeddedsw.git - repo for standalone software All software is version less and divided into three directories - lib contains bsp, zynq fsbl and software services like xilisf - license.txt contains information about the various licenses and copyrights - XilinxProcessorIPLib contains all drivers - ThirdParty software from third party like light weight IP stack - mcap software for using MCAP interface on Ultra Scale boards to program 2nd level bitstream Every driver/lib/apps/services has these sub-directories 1. data - contains tcl, mdd, testapp tcl or header files used in SDK 2. doc - documentation of source code in form of pdf or html 3. examples - illustrating different use cases of driver 4. src - driver interface code implementing functionality of IP <repo> |-XilinxProcessorIPLib | |- drivers | |- uartps | |- data | |- src | |- doc | |- examples | |-lib | |- bsp | |- standalone | |- data | |- src | |- cortexa9 | |- microblaze | |- common | |- profile | |- doc | |- xilkernel | |- data | |- doc | |- src | |- sw_apps | |- zynq_fsbl [described below] | |- sw_services | |- xilffs | |- xilskey | |- xilmfs | |- xilrsa | |- xilflash | |- xilisf | | Note - All these are libraries and utilize drivers | |-ThirdParty | |- sw_services | |- lwip140 | |-mcap | |-linux Building FSBL from git: FSBL has 3 directories. 1. data - It contains files for SDK 2. src - It contains the FSBK source files 3. misc - It contains miscelanious files required to compile FSBL for zc702, zc706, zed and microzed boards. It also contains the ps7_init_gpl.[c/h] with gpl header in respective board directories. How to compile FSBL: 1.Go to the Fsbl src directory "lib/sw_apps/zynq_fsbl/src/" 2. make "BOARD=<>" "CC=<>" a. Values for BOARD are zc702, zc706, zed, microzed b. Value for CC is arm-xilinx-eabi-gcc. Default value is also same. 3.Give "make" to compile the fsbl with BSP. By default it is built for zc702 board with arm-xilinx-eabi-gcc compiler 4.Below are the examples for compiling for different options a. To generate Fsbl for zc706 board i.make "BOARD=zc706" b.To generate Fsbl for zc702 board with debug enable and RSA support i.make "BOARD=zc702" "CFLAGS=-DFSBL_DEBUG_INFO -DRSA_SUPPORT" c.To generate Fsbl for zc706 board and compile with arm-xilinx-eabi-gcc with MMC support i.make "BOARD=zc706" "CC=arm-xilinx-eabi-gcc" "CFLAGS=-DMMC_SUPPORT"