2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
127 lines
3.5 KiB
C
Executable file
127 lines
3.5 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xhwicap_clb_srinv.h
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*
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* This header file contains bit information about the CLB SRINV resource.
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* This header file can be used with the XHwIcap_GetClbBits() and
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* XHwIcap_SetClbBits() functions. This is only for Virtex4 devices.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.00a bjb 11/14/03 First release
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* 1.01a bjb 04/10/06 V4 Support
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* </pre>
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*
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*****************************************************************************/
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#ifndef XHWICAP_CLB_SRINV_H_ /* prevent circular inclusions */
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#define XHWICAP_CLB_SRINV_H_ /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/************************** Constant Definitions ****************************/
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/**************************** Type Definitions ******************************/
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#if XHI_FAMILY == XHI_DEV_FAMILY_V4 /* Virtex4 */
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typedef struct {
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/**
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* SRINV Resource values.
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*/
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const u8 SR_B[1]; /* Invert SR Line. */
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const u8 SR[1]; /* Do not Invert SR line. */
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/**
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* Configure the SRINV mux (SR_B or SR). This array indexed by
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* slice (0-3).
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*/
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const u8 RES[4][1][2];
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} XHwIcap_ClbSrinv;
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/***************** Macros (Inline Functions) Definitions ********************/
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/************************** Function Prototypes *****************************/
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/************************** Variable Definitions ****************************/
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/**
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* This structure defines the SRINV mux
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*/
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const XHwIcap_ClbSrinv XHI_CLB_SRINV =
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{
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/* SR_B*/
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{0},
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/* SR*/
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{1},
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/* RES*/
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{
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/* Slice 0. */
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{
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{24, 18}
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},
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/* Slice 1. */
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{
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{23, 18}
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},
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/* Slice 2. */
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{
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{26, 18}
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},
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/* Slice 3. */
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{
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{25, 18}
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}
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},
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};
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#else
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#error Unsupported FPGA Family
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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