2c8f92039d
Added initial support Xilinx Embedded Software. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
235 lines
8.2 KiB
C
Executable file
235 lines
8.2 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file xbram_intr.c
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*
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* Implements BRAM interrupt processing functions for the
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* XBram driver. See xbram.h for more information
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* about the driver.
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*
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* The functions in this file require the hardware device to be built with
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* interrupt capabilities. The functions will assert if called using hardware
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* that does not have interrupt capabilities.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a sa 05/11/10 Initial release
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* </pre>
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*
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*****************************************************************************/
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/***************************** Include Files ********************************/
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#include "xbram.h"
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/************************** Constant Definitions ****************************/
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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/************************** Variable Definitions ****************************/
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/************************** Function Prototypes *****************************/
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/****************************************************************************/
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/**
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* Enable interrupts. This function will assert if the hardware device has not
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* been built with interrupt capabilities.
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*
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* @param InstancePtr is the BRAM instance to operate on.
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* @param Mask is the mask to enable. Bit positions of 1 are enabled.
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* This mask is formed by OR'ing bits from XBRAM_IR*
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* bits which are contained in xbram_hw.h.
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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void XBram_InterruptEnable(XBram *InstancePtr, u32 Mask)
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{
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u32 Register;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
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/*
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* Read the interrupt enable register and only enable the specified
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* interrupts without disabling or enabling any others.
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*/
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Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET);
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XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET,
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Register | Mask);
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}
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/****************************************************************************/
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/**
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* Disable interrupts. This function allows each specific interrupt to be
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* disabled. This function will assert if the hardware device has not been
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* built with interrupt capabilities.
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*
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* @param InstancePtr is the BRAM instance to operate on.
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* @param Mask is the mask to disable. Bits set to 1 are disabled. This
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* mask is formed by OR'ing bits from XBRAM_IR* bits
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* which are contained in xbram_hw.h.
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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void XBram_InterruptDisable(XBram *InstancePtr, u32 Mask)
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{
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u32 Register;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
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/*
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* Read the interrupt enable register and only disable the specified
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* interrupts without enabling or disabling any others.
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*/
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Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET);
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XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET,
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Register & (~Mask));
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}
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/****************************************************************************/
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/**
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* Clear pending interrupts with the provided mask. This function should be
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* called after the software has serviced the interrupts that are pending.
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* This function will assert if the hardware device has not been built with
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* interrupt capabilities.
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*
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* @param InstancePtr is the BRAM instance to operate on.
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* @param Mask is the mask to clear pending interrupts for. Bit positions
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* of 1 are cleared. This mask is formed by OR'ing bits from
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* XBRAM_IR* bits which are contained in
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* xbram_hw.h.
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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void XBram_InterruptClear(XBram *InstancePtr, u32 Mask)
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{
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u32 Register;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid(InstancePtr->Config.CtrlBaseAddress != 0);
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/*
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* Read the interrupt status register and only clear the interrupts
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* that are specified without affecting any others. Since the register
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* is a toggle on write, make sure any bits to be written are already
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* set.
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*/
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Register = XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_STATUS_OFFSET);
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XBram_WriteReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_STATUS_OFFSET,
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Register & Mask);
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}
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/****************************************************************************/
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/**
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* Returns the interrupt enable mask. This function will assert if the
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* hardware device has not been built with interrupt capabilities.
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*
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* @param InstancePtr is the BRAM instance to operate on.
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*
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* @return A mask of bits made from XBRAM_IR* bits which
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* are contained in xbram_hw.h.
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*
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* @return None.
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*
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* @note None.
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*
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*****************************************************************************/
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u32 XBram_InterruptGetEnabled(XBram * InstancePtr)
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{
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(InstancePtr->Config.CtrlBaseAddress != 0);
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return XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET);
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}
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/****************************************************************************/
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/**
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* Returns the status of interrupt signals. Any bit in the mask set to 1
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* indicates that the channel associated with the bit has asserted an interrupt
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* condition. This function will assert if the hardware device has not been
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* built with interrupt capabilities.
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*
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* @param InstancePtr is the BRAM instance to operate on.
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*
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* @return A pointer to a mask of bits made from XBRAM_IR*
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* bits which are contained in xbram_hw.h.
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*
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* @note
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*
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* The interrupt status indicates the status of the device irregardless if
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* the interrupts from the devices have been enabled or not through
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* XBram_InterruptEnable().
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*
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*****************************************************************************/
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u32 XBram_InterruptGetStatus(XBram * InstancePtr)
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{
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertNonvoid(InstancePtr->Config.CtrlBaseAddress != 0);
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return XBram_ReadReg(InstancePtr->Config.CtrlBaseAddress,
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XBRAM_ECC_EN_IRQ_OFFSET);
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}
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