a8d64830d6
Signed-off-by: Nava kishore Manne <navam@xilinx.com> Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
487 lines
16 KiB
C
487 lines
16 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xdprxss.h
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* @addtogroup dprxss_v1_0
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* @{
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* @details
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*
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* This is the main header file for Xilinx DisplayPort Receiver Subsystem core.
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* It abstracts Subsystem cores and provides high level API's to application
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* developer.
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*
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* <b>Core Features</b>
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*
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* For a full description of DisplayPort Receiver Subsystem core, please
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* see the hardware specification.
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*
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* <b>Software Initialization & Configuration</b>
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*
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* The application needs to do following steps in order for preparing the
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* DisplayPort Receiver Subsystem core to be ready.
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*
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* - Call XDpRxSs_LookupConfig using a device ID to find the core
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* configuration.
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* - Call XDpRxSs_CfgInitialize to initialize the device and the driver
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* instance associated with it.
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*
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* <b>Interrupts</b>
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*
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* The DisplayPort RX Subsystem driver provides an interrupt handler
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* XDpRxSs_DpIntrHandler for handling the interrupt from the DisplayPort
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* sub-core. The users of this driver have to register this handler with
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* the interrupt system and provide the callback functions by using
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* XDpRxSs_SetCallBack API.
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*
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* <b>Virtual Memory</b>
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*
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* This driver supports Virtual Memory. The RTOS is responsible for calculating
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* the correct device base address in Virtual Memory space.
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*
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* <b>Threads</b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b>Asserts</b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b>Building the driver</b>
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*
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* The DisplayPort Receiver Subsystem driver is composed of several source
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* files. This allows the user to build and link only those parts of the driver
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* that are necessary.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ---- --- -------- -----------------------------------------------------
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* 1.00 sha 05/18/15 Initial release.
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* </pre>
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*
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******************************************************************************/
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#ifndef XDPRXSS_H_
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#define XDPRXSS_H_ /**< Prevent circular inclusions
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* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xdprxss_hw.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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/* Subsystem sub-cores header files */
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#include "xdprxss_dprx.h"
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#include "xdprxss_iic.h"
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#include "xdprxss_hdcp1x.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/**
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* These constants specify different types of handler and used to differentiate
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* interrupt requests from sub-cores.
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*/
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typedef enum {
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XDPRXSS_HANDLER_DP_VM_CHG_EVENT = 1, /**< Video mode change event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_PWR_CHG_EVENT = 2, /**< Power state change
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_NO_VID_EVENT = 3, /**< No video event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_VBLANK_EVENT = 4, /**< Vertical blanking event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_TLOST_EVENT = 5, /**< Training lost event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_VID_EVENT = 6, /**< Valid video event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_INFO_PKT_EVENT = 7, /**< Info packet event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_EXT_PKT_EVENT = 8, /**< Extension packet event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_TDONE_EVENT = 9, /**< Training done event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_BW_CHG_EVENT = 10, /**< Bandwidth change event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_DWN_REQ_EVENT = 11, /**< Down request event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_DWN_REP_EVENT = 12, /**< Down reply event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_AUD_OVRFLW_EVENT = 13, /**< Audio packet overflow
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* event interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_PAYLOAD_ALLOC_EVENT = 14, /**< Payload allocation
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_ACT_RX_EVENT = 15, /**< ACT sequence received
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* event interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_CRC_TEST_EVENT = 16, /**< CRC test start event
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* interrupt type for
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* DisplayPort core */
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XDPRXSS_HANDLER_DP_HDCP_DBG_WR_EVENT = 17, /**< HDCP debug
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* register write
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_HDCP_AKSV_WR_EVENT = 18, /**< HDCP AKSV MSB
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* register write
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_HDCP_AN_WR_EVENT = 19, /**< HDCP AN MSB
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* register write
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_HDCP_A_INFO_WR_EVENT = 20, /**< HDCP A info
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* register write
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_HDCP_RO_RD_EVENT = 21, /**< HDCP RO register
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* read event
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* interrupt type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_DP_HDCP_B_INFO_RD_EVENT = 22, /**< HDCP B info
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* register read
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* event interrupt
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* type for
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* DisplayPort
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* core */
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XDPRXSS_HANDLER_UNPLUG_EVENT = 23, /**< Unplug event type for
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* DisplayPort RX
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* Subsystem */
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XDPRXSS_HANDLER_LINKBW_EVENT = 24, /**< Link BW event type for
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* DisplayPort RX Subsystem
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*/
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XDPRXSS_HANDLER_PLL_RESET_EVENT = 25 /**< PLL reset event type for
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* DisplayPort RX Subsystem
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*/
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} XDpRxSs_HandlerType;
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/**
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* User input structure
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*/
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typedef struct {
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u8 Bpc; /**< Bits per color */
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u8 LaneCount; /**< Lane count */
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u8 LinkRate; /**< Link rate */
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u8 MstSupport; /**< Multi-stream transport (MST) support */
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u8 NumOfStreams; /**< The total number of MST streams */
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} XDpRxSs_UsrOpt;
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/**
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* DisplayPort Sub-core structure.
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*/
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typedef struct {
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u16 IsPresent; /**< Flag to hold the presence of DisplayPort
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* Receiver core. */
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XDp_Config DpConfig; /**< DisplayPort core configuration
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* information */
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} XDpRxSs_DpSubCore;
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/**
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* IIC Sub-core structure.
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*/
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typedef struct {
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u16 IsPresent; /**< Flag to hold the presence of DisplayPort
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* Receiver core. */
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XIic_Config IicConfig; /**< IIC core configuration
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* information */
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} XDpRxSs_IicSubCore;
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/**
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* High-Bandwidth Content Protection (HDCP) Sub-core structure.
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*/
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typedef struct {
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u16 IsPresent; /**< Flag to hold the presence of HDCP core. */
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XHdcp1x_Config Hdcp1xConfig; /**< HDCP core configuration
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* information */
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} XDpRxSs_Hdcp1xSubCore;
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/**
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* This typedef contains configuration information for the DisplayPort
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* Receiver Subsystem core. Each DisplayPort RX Subsystem core should have
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* a configuration structure associated.
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*/
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typedef struct {
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u16 DeviceId; /**< DeviceId is the unique ID of the
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* DisplayPort RX Subsystem core */
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u32 BaseAddress; /**< BaseAddress is the physical base address
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* of the core's registers */
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u8 SecondaryChEn; /**< This Subsystem core supports audio packets
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* being sent by the secondary channel. */
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u8 MaxNumAudioCh; /**< The total number of Audio channels
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* supported by this core instance. */
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u8 MaxBpc; /**< The maximum bits/color supported by this
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* Subsystem core */
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u8 HdcpEnable; /**< This Subsystem core supports digital
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* content protection. */
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u8 MaxLaneCount; /**< The maximum lane count supported by this
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* core instance. */
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u8 MstSupport; /**< Multi-stream transport (MST) mode is
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* enabled by this core instance. */
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u8 NumMstStreams; /**< The total number of MST streams supported
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* by this core instance. */
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u8 ColorFormat; /**< Type of color format supported by this
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* core instance. */
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XDpRxSs_DpSubCore DpSubCore; /**< DisplayPort Configuration */
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XDpRxSs_Hdcp1xSubCore Hdcp1xSubCore; /**< HDCP Configuration */
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XDpRxSs_IicSubCore IicSubCore; /**< IIC Configuration */
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} XDpRxSs_Config;
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/*****************************************************************************/
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/**
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*
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* Callback type which represents the handler for events.
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*
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* @param InstancePtr is a pointer to the XDpRxSs instance.
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*
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* @note None.
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*
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******************************************************************************/
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typedef void (*XDpRxSs_Callback)(void *InstancePtr);
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/**
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* The DisplayPort RX Subsystem driver instance data. An instance must be
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* allocated for each core in use.
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*/
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typedef struct {
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XDpRxSs_Config Config; /**< Hardware Configuration */
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u32 IsReady; /**< Core and the driver instance are
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* initialized */
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/* Sub-core instances */
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XDp *DpPtr; /**< DisplayPort sub-core instance */
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XIic *IicPtr; /**< IIC sub-core instance */
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/* Callback */
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XDpRxSs_Callback PllResetCallback; /**< Callback function for PLL
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* reset */
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void *PllResetRef; /**< A pointer to the user data passed
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* to the PLL reset callback
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* function */
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XDpRxSs_Callback LinkBwCallback; /**< Callback function for
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* link bandwidth */
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void *LinkBwRef; /**< A pointer to the user data passed
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* to the link bandwidth callback
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* function */
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XDpRxSs_Callback UnplugCallback; /**< Callback function for
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* unplug event */
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void *UnplugRef; /**< A pointer to the user data passed
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* to the unplug event callback
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* function */
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/* Vertical blank */
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u8 VBlankEnable; /**< Vertical Blank Enable */
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u8 VBlankCount; /**< Vertical Blank Count */
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/* User options */
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XDpRxSs_UsrOpt UsrOpt; /**< User Options structure */
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} XDpRxSs;
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/***************** Macros (Inline Functions) Definitions *********************/
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/**
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* Callback type which represents a custom timer wait handler.
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*/
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#define XDpRxSs_TimerHandler XDp_TimerHandler
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/*****************************************************************************/
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/**
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*
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* This function macro enables the display timing generator (DTG).
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_DtgEnable(XDpRxSs *InstancePtr)
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*
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******************************************************************************/
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#define XDpRxSs_DtgEnable(InstancePtr) XDp_RxDtgEn((InstancePtr)->DpPtr)
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/*****************************************************************************/
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/**
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*
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* This function macro disables the display timing generator (DTG).
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_DtgDisable(XDpRxSs *InstancePtr)
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*
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******************************************************************************/
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#define XDpRxSs_DtgDisable(InstancePtr) XDp_RxDtgDis((InstancePtr)->DpPtr)
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/*****************************************************************************/
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/**
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*
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* This function macro enables audio stream packets on the main link.
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_AudioEnable(XDpRxSs *InstancePtr)
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*
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******************************************************************************/
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#define XDpRxSs_AudioEnable(InstancePtr) \
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XDp_RxAudioEn((InstancePtr)->DpPtr)
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/*****************************************************************************/
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/**
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*
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* This function macro disables audio stream packets on the main link.
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_AudioDisable(XDpRxSs *InstancePtr)
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*
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******************************************************************************/
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#define XDpRxSs_AudioDisable(InstancePtr) \
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XDp_RxAudioDis((InstancePtr)->DpPtr)
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/*****************************************************************************/
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/**
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*
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* This function macro resets the reception of audio stream packets on the
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* main link.
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_AudioReset(XDpRxSs *InstancePtr)
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*
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******************************************************************************/
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#define XDpRxSs_AudioReset(InstancePtr) \
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XDp_RxAudioReset((InstancePtr)->DpPtr)
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/******************************************************************************/
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/**
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*
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* This function macro is the delay/sleep function for the XDpRxSs driver.
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*
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* @param InstancePtr is a pointer to the XDpRxSs core instance.
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* @param MicroSeconds is the number of microseconds to delay/sleep for.
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*
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* @return None.
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*
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* @note C-style signature:
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* void XDpRxSs_WaitUs(XDpRxSs *InstancePtr)
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*
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*******************************************************************************/
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#define XDpRxSs_WaitUs(InstancePtr, MicroSeconds) \
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XDp_WaitUs((InstancePtr)->DpPtr, MicroSeconds)
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/************************** Function Prototypes ******************************/
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/* Initialization function in xdprxss_sinit.c */
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XDpRxSs_Config* XDpRxSs_LookupConfig(u16 DeviceId);
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/* Initialization and control functions in xdprxss.c */
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u32 XDpRxSs_CfgInitialize(XDpRxSs *InstancePtr, XDpRxSs_Config *CfgPtr,
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u32 EffectiveAddr);
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u32 XDpRxSs_Start(XDpRxSs *InstancePtr);
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void XDpRxSs_Reset(XDpRxSs *InstancePtr);
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u32 XDpRxSs_SetLinkRate(XDpRxSs *InstancePtr, u8 LinkRate);
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u32 XDpRxSs_SetLaneCount(XDpRxSs *InstancePtr, u8 LaneCount);
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u32 XDpRxSs_ExposePort(XDpRxSs *InstancePtr, u8 Port);
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u32 XDpRxSs_CheckLinkStatus(XDpRxSs *InstancePtr);
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u32 XDpRxSs_HandleDownReq(XDpRxSs *InstancePtr);
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void XDpRxSs_SetUserPixelWidth(XDpRxSs *InstancePtr, u8 UserPixelWidth);
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void XDpRxSs_ReportCoreInfo(XDpRxSs *InstancePtr);
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void XDpRxSs_ReportLinkInfo(XDpRxSs *InstancePtr);
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void XDpRxSs_ReportMsaInfo(XDpRxSs *InstancePtr);
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void XDpRxSs_ReportDp159BitErrCount(XDpRxSs *InstancePtr);
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/* Self test function in xdprxss_selftest.c */
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u32 XDpRxSs_SelfTest(XDpRxSs *InstancePtr);
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/* Interrupt functions in xdprxss_intr.c */
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void XDpRxSs_DpIntrHandler(void *InstancePtr);
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u32 XDpRxSs_SetCallBack(XDpRxSs *InstancePtr, u32 HandlerType,
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void *CallbackFunc, void *CallbackRef);
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void XDpRxSs_SetUserTimerHandler(XDpRxSs *InstancePtr,
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XDpRxSs_TimerHandler CallbackFunc, void *CallbackRef);
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/************************** Variable Declarations ****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* End of protection macro */
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/** @} */
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