1086 lines
37 KiB
C
Executable file
1086 lines
37 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xusbps.h
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*
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* This file contains the implementation of the XUsbPs driver. It is the
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* driver for an USB controller in DEVICE or HOST mode.
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*
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* <h2>Introduction</h2>
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*
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* The Spartan-3AF Embedded Peripheral Block contains a USB controller for
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* communication with serial peripherals or hosts. The USB controller supports
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* Host, Device and On the Go (OTG) applications.
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*
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* <h2>USB Controller Features</h2>
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*
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* - Supports Low Speed USB 1.1 (1.5Mbps), Full Speed USB 1.1 (12Mbps), and
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* High Speed USB 2.0 (480Mbps) data speeds
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* - Supports Device, Host and OTG operational modes
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* - ULPI transceiver interface for USB 2.0 operation
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* - Integrated USB Full and Low speed serial transceiver interfaces for lowest
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* cost connections
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*
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* <h2>Initialization & Configuration</h2>
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*
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* The configuration of the USB driver happens in multiple stages:
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*
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* - (a) Configuration of the basic parameters:
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* In this stage the basic parameters for the driver are configured,
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* including the base address and the controller ID.
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*
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* - (b) Configuration of the DEVICE endpoints (if applicable):
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* If DEVICE mode is desired, the endpoints of the controller need to be
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* configured using the XUsbPs_DeviceConfig data structure. Once the
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* endpoint configuration is set up in the data structure, The user then
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* needs to allocate the required amount of DMAable memory and
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* finalize the configuration of the XUsbPs_DeviceConfig data structure,
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* e.g. setting the DMAMemVirt and DMAMemPhys members.
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*
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* - (c) Configuration of the DEVICE modes:
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* In the second stage the parameters for DEVICE are configured.
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* The caller only needs to configure the modes that are
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* actually used. Configuration is done with the:
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* XUsbPs_ConfigureDevice()
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* Configuration parameters are defined and passed
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* into these functions using the:
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* XUsbPs_DeviceConfig data structures.
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*
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*
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* <h2>USB Device Endpoints</h2>
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*
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* The USB core supports up to 4 endpoints. Each endpoint has two directions,
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* an OUT (RX) and an IN (TX) direction. Note that the direction is viewed from
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* the host's perspective. Endpoint 0 defaults to be the control endpoint and
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* does not need to be set up. Other endpoints need to be configured and set up
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* depending on the application. Only endpoints that are actuelly used by the
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* application need to be initialized.
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* See the example code (xusbps_intr_example.c) for more information.
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*
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*
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* <h2>Interrupt Handling</h2>
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*
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* The USB core uses one interrupt line to report interrupts to the CPU.
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* Interrupts are handled by the driver's interrupt handler function
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* XUsbPs_IntrHandler().
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* It has to be registered with the OS's interrupt subsystem. The driver's
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* interrupt handler divides incoming interrupts into two categories:
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*
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* - General device interrupts
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* - Endopint related interrupts
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*
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* The user (typically the adapter layer) can register general interrupt
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* handler fucntions and endpoint specific interrupt handler functions with the
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* driver to receive those interrupts by calling the
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* XUsbPs_IntrSetHandler()
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* and
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* XUsbPs_EpSetHandler()
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* functions respectively. Calling these functions with a NULL pointer as the
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* argument for the function pointer will "clear" the handler function.
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*
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* The user can register one handler function for the generic interrupts and
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* two handler functions for each endpoint, one for the RX (OUT) and one for
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* the TX (IN) direction. For some applications it may be useful to register a
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* single endpoint handler function for muliple endpoints/directions.
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*
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* When a callback function is called by the driver, parameters identifying the
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* type of the interrupt will be passed into the handler functions. For general
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* interrupts the interrupt mask will be passed into the handler function. For
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* endpoint interrupts the parameters include the number of the endpoint, the
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* direction (OUT/IN) and the type of the interrupt.
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*
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*
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* <h2>Data buffer handling</h2>
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*
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* Data buffers are sent to and received from endpoint using the
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* XUsbPs_EpBufferSend(), XUsbPs_EpBufferSendWithZLT()
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* and
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* XUsbPs_EpBufferReceive()
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* functions.
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*
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* User data buffer size is limited to 16 Kbytes. If the user wants to send a
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* data buffer that is bigger than this limit it needs to break down the data
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* buffer into multiple fragments and send the fragments individually.
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*
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* From the controller perspective Data buffers can be aligned at any boundary.
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* if the buffers are from cache region then the buffer and buffer size should
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* be aligned to cache line aligned
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*
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*
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* <h3>Zero copy</h3>
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*
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* The driver uses a zero copy mechanism which imposes certain restrictions to
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* the way the user can handle the data buffers.
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*
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* One restriction is that the user needs to release a buffer after it is done
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* processing the data in the buffer.
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*
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* Similarly, when the user sends a data buffer it MUST not re-use the buffer
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* until it is notified by the driver that the buffer has been transmitted. The
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* driver will notify the user via the registered endpoint interrupt handling
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* function by sending a XUSBPS_EP_EVENT_DATA_TX event.
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*
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*
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* <h2>DMA</h2>
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*
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* The driver uses DMA internally to move data from/to memory. This behaviour
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* is transparent to the user. Keeping the DMA handling hidden from the user
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* has the advantage that the same API can be used with USB cores that do not
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* support DMA.
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*
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- ----------------------------------------------------------
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* 1.00a wgr 10/10/10 First release
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* 1.02a wgr 05/16/12 Removed comments as they are showing up in SDK
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* Tabs for CR 657898
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* 1.03a nm 09/21/12 Fixed CR#678977. Added proper sequence for setup packet
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* handling.
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* 1.04a nm 10/23/12 Fixed CR# 679106.
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* 11/02/12 Fixed CR# 683931. Mult bits are set properly in dQH.
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* 2.00a kpc 04/03/14 Fixed CR#777763. Corrected the setup tripwire macro val.
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* 2.1 kpc 04/28/14 Removed unused function prototypes
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* 2.2 kpc 08/23/14 Exported XUsbPs_DeviceReset API as global for calling in
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* code coverage tests.
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* </pre>
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*
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******************************************************************************/
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#ifndef XUSBPS_H
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#define XUSBPS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xusbps_hw.h"
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#include "xil_types.h"
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#include "xstatus.h"
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/************************** Constant Definitions *****************************/
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/**
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* @name System hang prevention Timeout counter value.
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*
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* This value is used throughout the code to initialize a Timeout counter that
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* is used when hard polling a register. The ides is to initialize the Timeout
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* counter to a value that is longer than any expected Timeout but short enough
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* so the system will continue to work and report an error while the user is
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* still paying attention. A reasonable Timeout time would be about 10 seconds.
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* The XUSBPS_TIMEOUT_COUNTER value should be chosen so a polling loop would
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* run about 10 seconds before a Timeout is detected. For example:
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*
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* int Timeout = XUSBPS_TIMEOUT_COUNTER;
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* while ((XUsbPs_ReadReg(InstancePtr->Config.BaseAddress,
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* XUSBPS_CMD_OFFSET) &
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* XUSBPS_CMD_RST_MASK) && --Timeout) {
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* ;
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* }
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* if (0 == Timeout) {
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* return XST_FAILURE;
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* }
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*
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*/
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#define XUSBPS_TIMEOUT_COUNTER 1000000
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/**
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* @name Endpoint Direction (bitmask)
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* Definitions to be used with Endpoint related function that require a
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* 'Direction' parameter.
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*
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* NOTE:
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* The direction is always defined from the perspective of the HOST! This
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* means that an IN endpoint on the controller is used for sending data while
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* the OUT endpoint on the controller is used for receiving data.
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* @{
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*/
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#define XUSBPS_EP_DIRECTION_IN 0x01 /**< Endpoint direction IN. */
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#define XUSBPS_EP_DIRECTION_OUT 0x02 /**< Endpoint direction OUT. */
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/* @} */
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/**
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* @name Endpoint Type
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* Definitions to be used with Endpoint related functions that require a 'Type'
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* parameter.
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* @{
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*/
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#define XUSBPS_EP_TYPE_NONE 0 /**< Endpoint is not used. */
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#define XUSBPS_EP_TYPE_CONTROL 1 /**< Endpoint for Control Transfers */
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#define XUSBPS_EP_TYPE_ISOCHRONOUS 2 /**< Endpoint for isochronous data */
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#define XUSBPS_EP_TYPE_BULK 3 /**< Endpoint for BULK Transfers. */
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#define XUSBPS_EP_TYPE_INTERRUPT 4 /**< Endpoint for interrupt Transfers */
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/* @} */
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/**
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* Endpoint Max Packet Length in DeviceConfig is a coded value, ch9.6.6.
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*
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* @{
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*/
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#define ENDPOINT_MAXP_LENGTH 0x400
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#define ENDPOINT_MAXP_MULT_MASK 0xC00
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#define ENDPOINT_MAXP_MULT_SHIFT 10
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/* @} */
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/**
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* @name Field names for status retrieval
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* Definitions for the XUsbPs_GetStatus() function call 'StatusType'
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* parameter.
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* @{
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*/
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#define XUSBPS_EP_STS_ADDRESS 1 /**< Address of controller. */
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#define XUSBPS_EP_STS_CONTROLLER_STATE 2 /**< Current controller state. */
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/* @} */
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/**
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* @name USB Default alternate setting
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*
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* @{
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*/
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#define XUSBPS_DEFAULT_ALT_SETTING 0 /**< The default alternate setting is 0 */
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/* @} */
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/**
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* @name Endpoint event types
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* Definitions that are used to identify events that occur on endpoints. Passed
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* to the endpoint event handler functions registered with
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* XUsbPs_EpSetHandler().
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* @{
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*/
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#define XUSBPS_EP_EVENT_SETUP_DATA_RECEIVED 0x01
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/**< Setup data has been received on the enpoint. */
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#define XUSBPS_EP_EVENT_DATA_RX 0x02
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/**< Data frame has been received on the endpoint. */
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#define XUSBPS_EP_EVENT_DATA_TX 0x03
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/**< Data frame has been sent on the endpoint. */
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/* @} */
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/*
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* Maximum packet size for endpoint, 1024
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* @{
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*/
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#define XUSBPS_MAX_PACKET_SIZE 1024
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/**< Maximum value can be put into the queue head */
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/* @} */
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/**************************** Type Definitions *******************************/
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/******************************************************************************
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* This data type defines the callback function to be used for Endpoint
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* handlers.
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*
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* @param CallBackRef is the Callback reference passed in by the upper
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* layer when setting the handler, and is passed back to the upper
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* layer when the handler is called.
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* @param EpNum is the Number of the endpoint that caused the event.
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* @param EventType is the type of the event that occured on the endpoint.
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* @param Data is a pointer to user data pointer specified when callback
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* was registered.
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*/
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typedef void (*XUsbPs_EpHandlerFunc)(void *CallBackRef,
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u8 EpNum, u8 EventType, void *Data);
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/******************************************************************************
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* This data type defines the callback function to be used for the general
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* interrupt handler.
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*
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* @param CallBackRef is the Callback reference passed in by the upper
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* layer when setting the handler, and is passed back to the upper
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* layer when the handler is called.
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* @param IrqMask is the Content of the interrupt status register. This
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* value can be used by the callback function to distinguish the
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* individual interrupt types.
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*/
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typedef void (*XUsbPs_IntrHandlerFunc)(void *CallBackRef, u32 IrqMask);
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/******************************************************************************/
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/* The following type definitions are used for referencing Queue Heads and
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* Transfer Descriptors. The structures themselves are not used, however, the
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* types are used in the API to avoid using (void *) pointers.
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*/
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typedef u8 XUsbPs_dQH[XUSBPS_dQH_ALIGN];
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typedef u8 XUsbPs_dTD[XUSBPS_dTD_ALIGN];
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/**
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* The following data structures are used internally by the L0/L1 driver.
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* Their contents MUST NOT be changed by the upper layers.
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*/
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/**
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* The following data structure represents OUT endpoint.
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*/
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typedef struct {
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XUsbPs_dQH *dQH;
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/**< Pointer to the Queue Head structure of the endpoint. */
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XUsbPs_dTD *dTDs;
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/**< Pointer to the first dTD of the dTD list for this
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* endpoint. */
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XUsbPs_dTD *dTDCurr;
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/**< Buffer to the currently processed descriptor. */
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u8 *dTDBufs;
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/**< Pointer to the first buffer of the buffer list for this
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* endpoint. */
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XUsbPs_EpHandlerFunc HandlerFunc;
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/**< Handler function for this endpoint. */
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void *HandlerRef;
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/**< User data reference for the handler. */
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} XUsbPs_EpOut;
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/**
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* The following data structure represents IN endpoint.
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*/
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typedef struct {
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XUsbPs_dQH *dQH;
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/**< Pointer to the Queue Head structure of the endpoint. */
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XUsbPs_dTD *dTDs;
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/**< List of pointers to the Transfer Descriptors of the
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* endpoint. */
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XUsbPs_dTD *dTDHead;
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/**< Buffer to the next available descriptor in the list. */
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XUsbPs_dTD *dTDTail;
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/**< Buffer to the last unsent descriptor in the list*/
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XUsbPs_EpHandlerFunc HandlerFunc;
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/**< Handler function for this endpoint. */
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void *HandlerRef;
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/**< User data reference for the handler. */
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} XUsbPs_EpIn;
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/**
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* The following data structure represents an endpoint used internally
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* by the L0/L1 driver.
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*/
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typedef struct {
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/* Each endpoint has an OUT and an IN component.
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*/
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XUsbPs_EpOut Out; /**< OUT endpoint structure */
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XUsbPs_EpIn In; /**< IN endpoint structure */
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} XUsbPs_Endpoint;
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/**
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* The following structure is used by the user to receive Setup Data from an
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* endpoint. Using this structure simplifies the process of interpreting the
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* setup data in the core's data fields.
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*
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* The naming scheme for the members of this structure is different from the
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* naming scheme found elsewhere in the code. The members of this structure are
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* defined in the Chapter 9 USB reference guide. Using this naming scheme makes
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* it easier for people familiar with the standard to read the code.
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*/
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typedef struct {
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u8 bmRequestType; /**< bmRequestType in setup data */
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u8 bRequest; /**< bRequest in setup data */
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u16 wValue; /**< wValue in setup data */
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u16 wIndex; /**< wIndex in setup data */
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u16 wLength; /**< wLength in setup data */
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}
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XUsbPs_SetupData;
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/**
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* Data structures used to configure endpoints.
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*/
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typedef struct {
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u32 Type;
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/**< Endpoint type:
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- XUSBPS_EP_TYPE_CONTROL
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- XUSBPS_EP_TYPE_ISOCHRONOUS
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- XUSBPS_EP_TYPE_BULK
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- XUSBPS_EP_TYPE_INTERRUPT */
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u32 NumBufs;
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/**< Number of buffers to be handled by this endpoint. */
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u32 BufSize;
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/**< Buffer size. Only relevant for OUT (receive) Endpoints. */
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u16 MaxPacketSize;
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/**< Maximum packet size for this endpoint. This number will
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* define the maximum number of bytes sent on the wire per
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* transaction. Range: 0..1024 */
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} XUsbPs_EpSetup;
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/**
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* Endpoint configuration structure.
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*/
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typedef struct {
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XUsbPs_EpSetup Out; /**< OUT component of endpoint. */
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XUsbPs_EpSetup In; /**< IN component of endpoint. */
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} XUsbPs_EpConfig;
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|
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/**
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* The XUsbPs_DeviceConfig structure contains the configuration information to
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* configure the USB controller for DEVICE mode. This data structure is used
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* with the XUsbPs_ConfigureDevice() function call.
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*/
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typedef struct {
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u8 NumEndpoints; /**< Number of Endpoints for the controller.
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This number depends on the runtime
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configuration of driver. The driver may
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configure fewer endpoints than are available
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in the core. */
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XUsbPs_EpConfig EpCfg[XUSBPS_MAX_ENDPOINTS];
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/**< List of endpoint configurations. */
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u32 DMAMemPhys; /**< Physical base address of DMAable memory
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allocated for the driver. */
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/* The following members are used internally by the L0/L1 driver. They
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* MUST NOT be accesses and/or modified in any way by the upper layers.
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*
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* The reason for having these members is that we generally try to
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* avoid allocating memory in the L0/L1 driver as we want to be OS
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* independent. In order to avoid allocating memory for this data
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* structure wihin L0/L1 we put it into the XUsbPs_DeviceConfig
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* structure which is allocated by the caller.
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*/
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XUsbPs_Endpoint Ep[XUSBPS_MAX_ENDPOINTS];
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/**< List of endpoint metadata structures. */
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u32 PhysAligned; /**< 64 byte aligned base address of the DMA
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memory block. Will be computed and set by
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the L0/L1 driver. */
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} XUsbPs_DeviceConfig;
|
|
|
|
|
|
/**
|
|
* The XUsbPs_Config structure contains configuration information for the USB
|
|
* controller.
|
|
*
|
|
* This structure only contains the basic configuration for the controller. The
|
|
* caller also needs to initialize the controller for the DEVICE mode
|
|
* using the XUsbPs_DeviceConfig data structures with the
|
|
* XUsbPs_ConfigureDevice() function call
|
|
*/
|
|
typedef struct {
|
|
u16 DeviceID; /**< Unique ID of controller. */
|
|
u32 BaseAddress; /**< Core register base address. */
|
|
} XUsbPs_Config;
|
|
|
|
|
|
/**
|
|
* The XUsbPs driver instance data. The user is required to allocate a
|
|
* variable of this type for every USB controller in the system. A pointer to a
|
|
* variable of this type is then passed to the driver API functions.
|
|
*/
|
|
typedef struct {
|
|
XUsbPs_Config Config; /**< Configuration structure */
|
|
|
|
int CurrentAltSetting; /**< Current alternative setting of interface */
|
|
|
|
void *UserDataPtr; /**< Data pointer to be used by upper layers to
|
|
store application dependent data structures.
|
|
The upper layers are responsible to allocated
|
|
and free the memory. The driver will not
|
|
mofidy this data pointer. */
|
|
|
|
/**
|
|
* The following structures hold the configuration for DEVICE mode
|
|
* of the controller. They are initialized using the
|
|
* XUsbPs_ConfigureDevice() function call.
|
|
*/
|
|
XUsbPs_DeviceConfig DeviceConfig;
|
|
/**< Configuration for the DEVICE mode. */
|
|
|
|
XUsbPs_IntrHandlerFunc HandlerFunc;
|
|
/**< Handler function for the controller. */
|
|
void *HandlerRef;
|
|
/**< User data reference for the handler. */
|
|
u32 HandlerMask;
|
|
/**< User interrupt mask. Defines which interrupts will cause
|
|
* the callback to be called. */
|
|
} XUsbPs;
|
|
|
|
|
|
/***************** Macros (Inline Functions) Definitions *********************/
|
|
|
|
/******************************************************************************
|
|
*
|
|
* USB CONTROLLER RELATED MACROS
|
|
*
|
|
******************************************************************************/
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro returns the current frame number.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
*
|
|
* @return The current frame number.
|
|
*
|
|
* @note C-style signature:
|
|
* u32 XUsbPs_GetFrameNum(const XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_GetFrameNum(InstancePtr) \
|
|
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, XUSBPS_FRAME_OFFSET)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro starts the USB engine.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_Start(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_Start(InstancePtr) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro stops the USB engine.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_Stop(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_Stop(InstancePtr) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro forces the USB engine to be in Full Speed (FS) mode.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_ForceFS(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_ForceFS(InstancePtr) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
|
|
XUSBPS_PORTSCR_PFSC_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro starts the USB Timer 0, with repeat option for period of
|
|
* one second.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param Interval is the interval for Timer0 to generate an interrupt
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_StartTimer0(XUsbPs *InstancePtr, u32 Interval)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_StartTimer0(InstancePtr, Interval) \
|
|
{ \
|
|
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XUSBPS_TIMER0_LD_OFFSET, (Interval)); \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
|
|
XUSBPS_TIMER_RUN_MASK | \
|
|
XUSBPS_TIMER_RESET_MASK | \
|
|
XUSBPS_TIMER_REPEAT_MASK); \
|
|
} \
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro stops Timer 0.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_StopTimer0(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_StopTimer0(InstancePtr) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
|
|
XUSBPS_TIMER_RUN_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro reads Timer 0.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_ReadTimer0(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_ReadTimer0(InstancePtr) \
|
|
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XUSBPS_TIMER0_CTL_OFFSET) & \
|
|
XUSBPS_TIMER_COUNTER_MASK
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro force remote wakeup on host
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_RemoteWakeup(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_RemoteWakeup(InstancePtr) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
|
|
XUSBPS_PORTSCR_FPR_MASK)
|
|
|
|
|
|
/******************************************************************************
|
|
*
|
|
* ENDPOINT RELATED MACROS
|
|
*
|
|
******************************************************************************/
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro enables the given endpoint for the given direction.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
* @param EpNum is number of the endpoint to enable.
|
|
* @param Dir is direction of the endpoint (bitfield):
|
|
* - XUSBPS_EP_DIRECTION_OUT
|
|
* - XUSBPS_EP_DIRECTION_IN
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_EpEnable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_EpEnable(InstancePtr, EpNum, Dir) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
|
|
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
|
|
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro disables the given endpoint for the given direction.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
* @param EpNum is the number of the endpoint to disable.
|
|
* @param Dir is the direction of the endpoint (bitfield):
|
|
* - XUSBPS_EP_DIRECTION_OUT
|
|
* - XUSBPS_EP_DIRECTION_IN
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_EpDisable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_EpDisable(InstancePtr, EpNum, Dir) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
|
|
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
|
|
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro stalls the given endpoint for the given direction, and flush
|
|
* the buffers.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
* @param EpNum is number of the endpoint to stall.
|
|
* @param Dir is the direction of the endpoint (bitfield):
|
|
* - XUSBPS_EP_DIRECTION_OUT
|
|
* - XUSBPS_EP_DIRECTION_IN
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_EpStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_EpStall(InstancePtr, EpNum, Dir) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
|
|
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
|
|
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro unstalls the given endpoint for the given direction.
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
* @param EpNum is the Number of the endpoint to unstall.
|
|
* @param Dir is the Direction of the endpoint (bitfield):
|
|
* - XUSBPS_EP_DIRECTION_OUT
|
|
* - XUSBPS_EP_DIRECTION_IN
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_EpUnStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_EpUnStall(InstancePtr, EpNum, Dir) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
|
|
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
|
|
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro flush an endpoint upon interface disable
|
|
*
|
|
* @param InstancePtr is a pointer to the XUsbPs instance of the
|
|
* controller.
|
|
* @param EpNum is the number of the endpoint to flush.
|
|
* @param Dir is the direction of the endpoint (bitfield):
|
|
* - XUSBPS_EP_DIRECTION_OUT
|
|
* - XUSBPS_EP_DIRECTION_IN
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_EpFlush(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_EpFlush(InstancePtr, EpNum, Dir) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_EPFLUSH_OFFSET, \
|
|
EpNum << ((Dir) & XUSBPS_EP_DIRECTION_OUT ? \
|
|
XUSBPS_EPFLUSH_RX_SHIFT:XUSBPS_EPFLUSH_TX_SHIFT)) \
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro enables the interrupts defined by the bit mask.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param IntrMask is the Bit mask of interrupts to be enabled.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_IntrEnable(XUsbPs *InstancePtr, u32 IntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_IntrEnable(InstancePtr, IntrMask) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This function disables the interrupts defined by the bit mask.
|
|
*
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param IntrMask is a Bit mask of interrupts to be disabled.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_IntrDisable(XUsbPs *InstancePtr, u32 IntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_IntrDisable(InstancePtr, IntrMask) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro enables the endpoint NAK interrupts defined by the bit mask.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be
|
|
* enabled.
|
|
* @note C-style signature:
|
|
* void XUsbPs_NakIntrEnable(XUsbPs *InstancePtr, u32 NakIntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_NakIntrEnable(InstancePtr, NakIntrMask) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro disables the endpoint NAK interrupts defined by the bit mask.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param NakIntrMask is a Bit mask of endpoint NAK interrupts to be
|
|
* disabled.
|
|
*
|
|
* @note
|
|
* C-style signature:
|
|
* void XUsbPs_NakIntrDisable(XUsbPs *InstancePtr, u32 NakIntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_NakIntrDisable(InstancePtr, NakIntrMask) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This function clears the endpoint NAK interrupts status defined by the
|
|
* bit mask.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param NakIntrMask is the Bit mask of endpoint NAK interrupts to be cleared.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_NakIntrClear(XUsbPs *InstancePtr, u32 NakIntrMask)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_NakIntrClear(InstancePtr, NakIntrMask) \
|
|
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XUSBPS_EPNAKISR_OFFSET, NakIntrMask)
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro sets the Interrupt Threshold value in the control register
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param Threshold is the Interrupt threshold to be set.
|
|
* Allowed values:
|
|
* - XUSBPS_CMD_ITHRESHOLD_0 - Immediate interrupt
|
|
* - XUSBPS_CMD_ITHRESHOLD_1 - 1 Frame
|
|
* - XUSBPS_CMD_ITHRESHOLD_2 - 2 Frames
|
|
* - XUSBPS_CMD_ITHRESHOLD_4 - 4 Frames
|
|
* - XUSBPS_CMD_ITHRESHOLD_8 - 8 Frames
|
|
* - XUSBPS_CMD_ITHRESHOLD_16 - 16 Frames
|
|
* - XUSBPS_CMD_ITHRESHOLD_32 - 32 Frames
|
|
* - XUSBPS_CMD_ITHRESHOLD_64 - 64 Frames
|
|
*
|
|
* @note
|
|
* C-style signature:
|
|
* void XUsbPs_SetIntrThreshold(XUsbPs *InstancePtr, u8 Threshold)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_SetIntrThreshold(InstancePtr, Threshold) \
|
|
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
XUSBPS_CMD_OFFSET, (Threshold))\
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro sets the Tripwire bit in the USB command register.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_SetTripwire(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_SetSetupTripwire(InstancePtr) \
|
|
XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, \
|
|
XUSBPS_CMD_SUTW_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro clears the Tripwire bit in the USB command register.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_ClrTripwire(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_ClrSetupTripwire(InstancePtr) \
|
|
XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, \
|
|
XUSBPS_CMD_SUTW_MASK)
|
|
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
* This macro checks if the Tripwire bit in the USB command register is set.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
*
|
|
* @return
|
|
* - TRUE: The tripwire bit is still set.
|
|
* - FALSE: The tripwire bit has been cleared.
|
|
*
|
|
* @note C-style signature:
|
|
* int XUsbPs_TripwireIsSet(XUsbPs *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XUsbPs_SetupTripwireIsSet(InstancePtr) \
|
|
(XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XUSBPS_CMD_OFFSET) & \
|
|
XUSBPS_CMD_SUTW_MASK ? TRUE : FALSE)
|
|
|
|
|
|
/******************************************************************************
|
|
*
|
|
* GENERAL REGISTER / BIT MANIPULATION MACROS
|
|
*
|
|
******************************************************************************/
|
|
/****************************************************************************/
|
|
/**
|
|
* This macro sets the given bit mask in the register.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param RegOffset is the register offset to be written.
|
|
* @param Bits is the Bits to be set in the register
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note C-style signature:
|
|
* void XUsbPs_SetBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
|
|
*
|
|
*****************************************************************************/
|
|
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits) \
|
|
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
|
|
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
RegOffset) | (Bits));
|
|
|
|
|
|
/****************************************************************************/
|
|
/**
|
|
*
|
|
* This macro clears the given bits in the register.
|
|
*
|
|
* @param InstancePtr is a pointer to XUsbPs instance of the controller.
|
|
* @param RegOffset is the register offset to be written.
|
|
* @param Bits are the bits to be cleared in the register
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note
|
|
* C-style signature:
|
|
* void XUsbPs_ClrBits(u32 BaseAddress, u32 RegOffset, u32 Bits)
|
|
*
|
|
*****************************************************************************/
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#define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits) \
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XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
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XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
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RegOffset) & ~(Bits));
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/************************** Function Prototypes ******************************/
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/**
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* Setup / Initialize functions.
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*
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* Implemented in file xusbps.c
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*/
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int XUsbPs_CfgInitialize(XUsbPs *InstancePtr,
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const XUsbPs_Config *ConfigPtr, u32 BaseAddress);
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int XUsbPs_ConfigureDevice(XUsbPs *InstancePtr,
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const XUsbPs_DeviceConfig *CfgPtr);
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/**
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* Common functions used for DEVICE/HOST mode.
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*/
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int XUsbPs_Reset(XUsbPs *InstancePtr);
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void XUsbPs_DeviceReset(XUsbPs *InstancePtr);
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/**
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* DEVICE mode specific functions.
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*/
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int XUsbPs_BusReset(XUsbPs *InstancePtr);
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int XUsbPs_SetDeviceAddress(XUsbPs *InstancePtr, u8 Address);
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/**
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* Handling Suspend and Resume.
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*
|
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* Implemented in xusbps.c
|
|
*/
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int XUsbPs_Suspend(const XUsbPs *InstancePtr);
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int XUsbPs_Resume(const XUsbPs *InstancePtr);
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int XUsbPs_RequestHostResume(const XUsbPs *InstancePtr);
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/*
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* Functions for managing Endpoints / Transfers
|
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*
|
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* Implemented in file xusbps_endpoint.c
|
|
*/
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int XUsbPs_EpBufferSend(XUsbPs *InstancePtr, u8 EpNum,
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const u8 *BufferPtr, u32 BufferLen);
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int XUsbPs_EpBufferSendWithZLT(XUsbPs *InstancePtr, u8 EpNum,
|
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const u8 *BufferPtr, u32 BufferLen);
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int XUsbPs_EpBufferReceive(XUsbPs *InstancePtr, u8 EpNum,
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u8 **BufferPtr, u32 *BufferLenPtr, u32 *Handle);
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void XUsbPs_EpBufferRelease(u32 Handle);
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|
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int XUsbPs_EpSetHandler(XUsbPs *InstancePtr, u8 EpNum, u8 Direction,
|
|
XUsbPs_EpHandlerFunc CallBackFunc,
|
|
void *CallBackRef);
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|
int XUsbPs_EpGetSetupData(XUsbPs *InstancePtr, int EpNum,
|
|
XUsbPs_SetupData *SetupDataPtr);
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|
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int XUsbPs_EpPrime(XUsbPs *InstancePtr, u8 EpNum, u8 Direction);
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|
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int XUsbPs_ReconfigureEp(XUsbPs *InstancePtr, XUsbPs_DeviceConfig *CfgPtr,
|
|
int EpNum, unsigned short NewDirection, int DirectionChanged);
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|
|
/*
|
|
* Interrupt handling functions
|
|
*
|
|
* Implemented in file xusbps_intr.c
|
|
*/
|
|
void XUsbPs_IntrHandler(void *InstancePtr);
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|
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int XUsbPs_IntrSetHandler(XUsbPs *InstancePtr,
|
|
XUsbPs_IntrHandlerFunc CallBackFunc,
|
|
void *CallBackRef, u32 Mask);
|
|
/*
|
|
* Helper functions for static configuration.
|
|
* Implemented in xusbps_sinit.c
|
|
*/
|
|
XUsbPs_Config *XUsbPs_LookupConfig(u16 DeviceId);
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|
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#ifdef __cplusplus
|
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}
|
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#endif
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|
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#endif /* XUSBPS_H */
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