
To follow the IP documentation. Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
347 lines
12 KiB
C
347 lines
12 KiB
C
/*******************************************************************************
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*
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* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdptx_example_common.c
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*
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* Contains a design example using the XDptx driver. It performs a self test on
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* the DisplayPort TX core by training the main link at the maximum common
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* capabilities between the TX and RX and checking the lane status.
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*
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* @note The DisplayPort TX core does not work alone - video/audio
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* sources need to be set up in the system correctly, as well as
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* setting up the output path (for example, configuring the
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* hardware system with the DisplayPort TX core output to an FMC
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* card with DisplayPort output capabilities. Some platform
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* initialization will need to happen prior to calling XDptx driver
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* functions. See XAPP1178 as a reference.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.0 als 06/17/14 Initial creation.
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* </pre>
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*
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*******************************************************************************/
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/******************************* Include Files ********************************/
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#include "xdptx_example_common.h"
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#include "xstatus.h"
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/**************************** Function Prototypes *****************************/
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static void Dptx_StartVideoStream(XDptx *InstancePtr);
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/**************************** Function Definitions ****************************/
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/******************************************************************************/
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/**
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* This function will configure and establish a link with the receiver device,
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* afterwards, a video stream will start to be sent over the main link.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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* @param LaneCount is the number of lanes to use over the main link.
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* @param LinkRate is the link rate to use over the main link.
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*
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* @return
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* - XST_SUCCESS if main link was successfully established.
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* - XST_FAILURE otherwise.
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*
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* @note None.
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*
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*******************************************************************************/
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u32 Dptx_Run(XDptx *InstancePtr)
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{
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u32 Status;
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/* Configure and establish a link. */
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Status = Dptx_StartLink(InstancePtr);
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if (Status == XST_SUCCESS) {
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/* Start the video stream. */
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Dptx_StartVideoStream(InstancePtr);
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} else {
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xil_printf("<-- Failed to establish/train the link.\n");
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function will setup and initialize the DisplayPort TX core. The core's
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* configuration parameters will be retrieved based on the configuration
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* to the DisplayPort TX core instance with the specified device ID.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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* @param DeviceId is the unique device ID of the DisplayPort TX core
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* instance.
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*
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* @return
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* - XST_SUCCESS if the device configuration was found and obtained
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* and if the main link was successfully established.
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* - XST_FAILURE otherwise.
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*
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* @note None.
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*
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*******************************************************************************/
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u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId)
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{
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XDptx_Config *ConfigPtr;
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u32 Status;
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/* Obtain the device configuration for the DisplayPort TX core. */
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ConfigPtr = XDptx_LookupConfig(DeviceId);
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if (!ConfigPtr) {
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return XST_FAILURE;
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}
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/* Copy the device configuration into the InstancePtr's Config
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* structure. */
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XDptx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
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/* Initialize the DisplayPort TX core. */
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Status = XDptx_InitializeTx(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function will configure and establish a link with the receiver device.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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*
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* @return
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* - XST_SUCCESS the if main link was successfully established.
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* - XST_FAILURE otherwise.
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*
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* @note None.
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*
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*******************************************************************************/
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u32 Dptx_StartLink(XDptx *InstancePtr)
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{
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u32 VsLevelTx;
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u32 PeLevelTx;
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u32 Status;
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u8 LaneCount;
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u8 LinkRate;
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/* Obtain the capabilities of the RX device by reading the monitor's
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* DPCD. */
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Status = XDptx_GetRxCapabilities(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#if (TRAIN_USE_MAX_LINK == 1)
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LaneCount = InstancePtr->LinkConfig.MaxLaneCount;
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LinkRate = InstancePtr->LinkConfig.MaxLinkRate;
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#else
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LaneCount = TRAIN_USE_LANE_COUNT;
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LinkRate = TRAIN_USE_LINK_RATE;
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#endif
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/* Check if the link is already trained */
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Status = XDptx_CheckLinkStatus(InstancePtr, LaneCount);
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if (Status == XST_SUCCESS) {
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xil_printf("-> Link is already trained on %d lanes.\n",
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LaneCount);
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if (XDptx_ReadReg(InstancePtr->Config.BaseAddr,
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XDPTX_LINK_BW_SET) == LinkRate) {
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xil_printf("-> Link needs to be re-trained %d Mbps.\n",
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(270 * LinkRate));
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}
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else {
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xil_printf("-> Link is already trained at %d Mbps.\n",
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(270 * LinkRate));
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return XST_SUCCESS;
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}
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}
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else if (Status == XST_FAILURE) {
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xil_printf("-> Needs training.\n");
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}
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else {
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/* Either a connection does not exist or the supplied lane count
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* is invalid. */
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xil_printf("-> Error checking link status.\n");
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return XST_FAILURE;
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}
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XDptx_SetEnhancedFrameMode(InstancePtr, 1);
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XDptx_SetDownspread(InstancePtr, 0);
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#if (TRAIN_USE_MAX_LINK == 1)
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/* Configure the main link based on the maximum common capabilities of
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* the DisplayPort TX core and the receiver device. */
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Status = XDptx_CfgMainLinkMax(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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#else
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XDptx_SetLinkRate(InstancePtr, LinkRate);
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XDptx_SetLaneCount(InstancePtr, LaneCount);
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#endif
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/* Train the link. */
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xil_printf("******************************************\n");
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Status = XDptx_EstablishLink(InstancePtr);
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if (Status != XST_SUCCESS) {
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xil_printf("!!! Training failed !!!\n");
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xil_printf("******************************************\n");
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return XST_FAILURE;
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}
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VsLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
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XDPTX_PHY_VOLTAGE_DIFF_LANE_0);
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PeLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
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XDPTX_PHY_POSTCURSOR_LANE_0);
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xil_printf("!!! Training passed at LR:0x%02lx LC:%d !!!\n",
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InstancePtr->LinkConfig.LinkRate,
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InstancePtr->LinkConfig.LaneCount);
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xil_printf("VS:%d (TX:%d) PE:%d (TX:%d)\n",
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InstancePtr->LinkConfig.VsLevel, VsLevelTx,
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InstancePtr->LinkConfig.PeLevel, PeLevelTx);
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xil_printf("******************************************\n");
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return XST_SUCCESS;
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}
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/******************************************************************************/
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/**
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* This function will start sending a video stream over the main link. The
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* settings to be used are as follows:
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* - 8 bits per color.
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* - Video timing and screen resolution used:
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* - The connected monitor's preferred timing is used to determine the
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* video resolution (and associated timings) for the stream.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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*
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* @return None.
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*
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* @note The Dptx_StreamSrc* are intentionally left for the user to
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* implement since configuration of the stream source is
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* application-specific.
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* @note The Extended Display Identification Data (EDID) is read in order
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* to obtain the video resolution and timings. If this read fails,
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* a resolution of 640x480 is used at a refresh rate of 60Hz.
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*
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*******************************************************************************/
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static void Dptx_StartVideoStream(XDptx *InstancePtr)
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{
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u32 Status;
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u8 Edid[XDPTX_EDID_BLOCK_SIZE];
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/* Set the bits per color. If not set, the default is 6. */
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XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID1, 8);
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/* Set synchronous clock mode. */
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XDptx_CfgMsaEnSynchClkMode(InstancePtr, XDPTX_STREAM_ID1, 1);
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XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID1);
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XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID2);
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XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID3);
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XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID4);
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/* Choose a method for selecting the video mode. There are 3 ways to do this:
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* 1) Use the preferred timing from the monitor's EDID:
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* u8 Edid[XDPTX_EDID_BLOCK_SIZE];
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* XDptx_GetEdid(InstancePtr, Edid);
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* XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr, XDPTX_STREAM_ID1, Edid);
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*
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* 2) Use a standard video timing mode (see mode_table.h):
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* XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID1,
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XVIDC_VM_640x480_60_P);
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*
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* 3) Use a custom configuration for the main stream attributes (MSA):
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* XDptx_MainStreamAttributes MsaConfigCustom;
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* MsaConfigCustom.Dmt.HResolution = 1280;
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* MsaConfigCustom.Dmt.VResolution = 1024;
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* MsaConfigCustom.Dmt.PixelClkKhz = 108000;
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* MsaConfigCustom.Dmt.HSyncPolarity = 0;
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* MsaConfigCustom.Dmt.VSyncPolarity = 0;
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* MsaConfigCustom.Dmt.HFrontPorch = 48;
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* MsaConfigCustom.Dmt.HSyncPulseWidth = 112;
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* MsaConfigCustom.Dmt.HBackPorch = 248;
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* MsaConfigCustom.Dmt.VFrontPorch = 1;
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* MsaConfigCustom.Dmt.VSyncPulseWidth = 3;
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* MsaConfigCustom.Dmt.VBackPorch = 38;
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* XDptx_CfgMsaUseCustom(InstancePtr, XDPTX_STREAM_ID1,
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* &MsaConfigCustom, 1);
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*
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* To override the user pixel width:
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* InstancePtr->MsaConfig[_STREAM#_].OverrideUserPixelWidth = 1;
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* InstancePtr->MsaConfig[_STREAM#_].UserPixelWidth = _DESIRED_VALUE_;
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* Then, use one of the methods above to calculate the rest of the MSA.
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*/
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Status = XDptx_GetEdid(InstancePtr, Edid);
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if (Status == XST_SUCCESS) {
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XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr,
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XDPTX_STREAM_ID1, Edid);
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}
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else {
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XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID1,
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XVIDC_VM_640x480_60_P);
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}
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/* Disable MST for this example. */
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XDptx_MstDisable(InstancePtr);
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/* Disable main stream to force sending of IDLE patterns. */
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XDptx_DisableMainLink(InstancePtr);
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/* Reset the transmitter. */
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
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XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
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XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
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/* Set the DisplayPort TX video mode. */
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XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID1);
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/* Configure video stream source or generator here. These function need
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* to be implemented in order for video to be displayed and is hardware
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* system specific. It is up to the user to implement these
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* functions. */
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Dptx_StreamSrcSetup(InstancePtr);
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Dptx_StreamSrcConfigure(InstancePtr);
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Dptx_StreamSrcSync(InstancePtr);
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/*********************************/
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XDptx_EnableMainLink(InstancePtr);
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}
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