698f4909b7
This patch updates the copy right information for the below drivers can canps spi trafgen srio uartlite uartns550 gpio llfifo emc and xilkernel bsp. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
165 lines
6 KiB
C
Executable file
165 lines
6 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2002 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file xgpio_extra.c
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*
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* The implementation of the XGpio driver's advanced discrete functions.
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* See xgpio.h for more information about the driver.
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*
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* @note
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*
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* These APIs can only be used if the GPIO_IO ports in the IP are used for
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* connecting to the external output ports.
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*
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a rmm 02/04/02 First release
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* 2.00a jhl 12/16/02 Update for dual channel and interrupt support
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* 2.11a mta 03/21/07 Updated to new coding style
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* 3.00a sv 11/21/09 Updated to use HAL Processor APIs. Renamed the macros
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* XGpio_mWriteReg to XGpio_WriteReg, and XGpio_mReadReg
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* to XGpio_ReadReg.
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* </pre>
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*
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*****************************************************************************/
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/***************************** Include Files ********************************/
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#include "xgpio.h"
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#include "xgpio_i.h"
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/************************** Constant Definitions ****************************/
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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/************************** Variable Definitions ****************************/
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/************************** Function Prototypes *****************************/
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/****************************************************************************/
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/**
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* Set output discrete(s) to logic 1 for the specified GPIO channel.
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*
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* @param InstancePtr is a pointer to an XGpio instance to be worked on.
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* @param Channel contains the channel of the GPIO (1 or 2) to operate on.
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* @param Mask is the set of bits that will be set to 1 in the discrete
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* data register. All other bits in the data register are
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* unaffected.
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*
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* @return None.
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*
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* @note
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*
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* The hardware must be built for dual channels if this function is used
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* with any channel other than 1. If it is not, this function will assert.
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*
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* This API can only be used if the GPIO_IO ports in the IP are used for
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* connecting to the external output ports.
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*
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*****************************************************************************/
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void XGpio_DiscreteSet(XGpio * InstancePtr, unsigned Channel, u32 Mask)
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{
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u32 Current;
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unsigned DataOffset;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid((Channel == 1) ||
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((Channel == 2) && (InstancePtr->IsDual == TRUE)));
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/*
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* Calculate the offset to the data register of the GPIO once
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*/
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DataOffset = ((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_DATA_OFFSET;
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/*
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* Read the contents of the data register, merge in Mask and write
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* back results
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*/
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Current = XGpio_ReadReg(InstancePtr->BaseAddress, DataOffset);
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Current |= Mask;
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XGpio_WriteReg(InstancePtr->BaseAddress, DataOffset, Current);
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}
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/****************************************************************************/
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/**
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* Set output discrete(s) to logic 0 for the specified GPIO channel.
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*
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* @param InstancePtr is a pointer to an XGpio instance to be worked on.
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* @param Channel contains the channel of the GPIO (1 or 2) to operate on.
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* @param Mask is the set of bits that will be set to 0 in the discrete
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* data register. All other bits in the data register are
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* unaffected.
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*
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* @return None.
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*
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* @note
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*
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* The hardware must be built for dual channels if this function is used
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* with any channel other than 1. If it is not, this function will assert.
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*
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* This API can only be used if the GPIO_IO ports in the IP are used for
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* connecting to the external output ports.
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*
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*****************************************************************************/
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void XGpio_DiscreteClear(XGpio * InstancePtr, unsigned Channel, u32 Mask)
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{
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u32 Current;
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unsigned DataOffset;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Xil_AssertVoid((Channel == 1) ||
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((Channel == 2) && (InstancePtr->IsDual == TRUE)));
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/*
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* Calculate the offset to the data register of the GPIO once
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*/
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DataOffset = ((Channel - 1) * XGPIO_CHAN_OFFSET) + XGPIO_DATA_OFFSET;
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/*
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* Read the contents of the data register, merge in Mask and write
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* back results
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*/
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Current = XGpio_ReadReg(InstancePtr->BaseAddress, DataOffset);
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Current &= ~Mask;
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XGpio_WriteReg(InstancePtr->BaseAddress, DataOffset, Current);
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}
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