![]() Add support for recognizing processor A53 or R5 to work for Zynq Ultrascale MPSoC Signed-off-by: Harini Katakam <harinik@xilinx.com> Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com> |
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lwip_echo_server.mss | ||
lwip_echo_server.tcl |
![]() Add support for recognizing processor A53 or R5 to work for Zynq Ultrascale MPSoC Signed-off-by: Harini Katakam <harinik@xilinx.com> Reviewed-by: Anirudha Sarangi <anirudh@xilinx.com> |
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.. | ||
lwip_echo_server.mss | ||
lwip_echo_server.tcl |