d8a32edad9
Removed support for families older than 7 series. Modified driver tcl not to generate family.h Removed IDCODE lookup logic. Removed xhwicap_ff.h and xhwicap_lut.h examples. Removed xhwicap_clb_ff.h, xhwicap_clb_lut.h and xhwicap_clb_srinv.h. Signed-off-by: Subbaraya Sundeep Bhatta <sbhatta@xilinx.com> Acked-by: Srikanth Vemula <svemula@xilinx.com>
216 lines
7.8 KiB
C
Executable file
216 lines
7.8 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright (C) 2007 - 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xhwicap_l.h
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*
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* This header file contains identifiers and basic driver functions (or
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* macros) that can be used to access the device. Other driver functions
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* are defined in xhwicap.h.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 2.00a sv 09/28/07 First release for the FIFO mode
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* 3.00a sv 11/28/08 Added Abort bit definition in the Control Register
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* Removed XHI_WFO_MAX_VACANCY and XHI_RFO_MAX_OCCUPANCY
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* definitions.
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* 3.01a sv 10/21/09 Corrected the IDCODE definitions for some of the
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* V5 FX parts.
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* 4.00a hvm 11/30/09 Added support for V6 and updated with HAL phase 1
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* modifications
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* 5.00a hvm 02/04/10 Added S6 Support
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* 5.03a hvm 15/4/11 Updated with V6 CXT device definitions.
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* 6.00a hvm 08/01/11 Updated with K7 device Ids.
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* 7.00a bss 03/14/12 Added EOS mask and Hang mask CR CR 637538
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* Added Virtex 7 and Zynq Idcodes - CR 647140, CR 643295
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*
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* 8.00a bss 06/20/12 Deleted Hang mask definition as per CR 656162
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* 9.0 bss 02/20/14 Added Kintex 8 and Virtex72000T device Idcodes.
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* 10.0 bss 6/24/14 Removed support for families older than 7 series
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*
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* </pre>
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*
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*****************************************************************************/
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#ifndef XHWICAP_L_H_ /* prevent circular inclusions */
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#define XHWICAP_L_H_ /* by using protection macros */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files ********************************/
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#include <xil_types.h>
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#include <xil_assert.h>
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#include "xil_io.h"
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/************************** Constant Definitions ****************************/
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/******************************************************************/
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/** @name Register Map
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*
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* Register offsets for the XHwIcap device.
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* @{
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*/
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#define XHI_GIER_OFFSET 0x1C /**< Device Global Interrupt Enable Reg */
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#define XHI_IPISR_OFFSET 0x20 /**< Interrupt Status Register */
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#define XHI_IPIER_OFFSET 0x28 /**< Interrupt Enable Register */
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#define XHI_WF_OFFSET 0x100 /**< Write FIFO */
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#define XHI_RF_OFFSET 0x104 /**< Read FIFO */
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#define XHI_SZ_OFFSET 0x108 /**< Size Register */
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#define XHI_CR_OFFSET 0x10C /**< Control Register */
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#define XHI_SR_OFFSET 0x110 /**< Status Register */
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#define XHI_WFV_OFFSET 0x114 /**< Write FIFO Vacancy Register */
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#define XHI_RFO_OFFSET 0x118 /**< Read FIFO Occupancy Register */
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/* @} */
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/** @name Device Global Interrupt Enable Register (GIER) bit definitions
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*
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* @{
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*/
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#define XHI_GIER_GIE_MASK 0x80000000 /**< Global Interrupt enable Mask */
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/* @} */
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/** @name HwIcap Device Interrupt Status/Enable Registers
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*
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* <b> Interrupt Status Register (IPISR) </b>
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*
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* This register holds the interrupt status flags for the device. These
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* bits are toggle on write.
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*
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* <b> Interrupt Enable Register (IPIER) </b>
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*
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* This register is used to enable interrupt sources for the device.
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* Writing a '1' to a bit in this register enables the corresponding Interrupt.
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* Writing a '0' to a bit in this register disables the corresponding Interrupt.
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*
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* IPISR/IPIER registers have the same bit definitions and are only defined
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* once.
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* @{
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*/
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#define XHI_IPIXR_RFULL_MASK 0x00000008 /**< Read FIFO Full */
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#define XHI_IPIXR_WEMPTY_MASK 0x00000004 /**< Write FIFO Empty */
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#define XHI_IPIXR_RDP_MASK 0x00000002 /**< Read FIFO half full */
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#define XHI_IPIXR_WRP_MASK 0x00000001 /**< Write FIFO half full */
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#define XHI_IPIXR_ALL_MASK 0x0000000F /**< Mask of all interrupts */
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/* @} */
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/** @name Control Register (CR)
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*
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* @{
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*/
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#define XHI_CR_SW_ABORT_MASK 0x00000010 /**< Abort current ICAP Read/Write */
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#define XHI_CR_SW_RESET_MASK 0x00000008 /**< SW Reset Mask */
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#define XHI_CR_FIFO_CLR_MASK 0x00000004 /**< FIFO Clear Mask */
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#define XHI_CR_READ_MASK 0x00000002 /**< Read from ICAP to FIFO */
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#define XHI_CR_WRITE_MASK 0x00000001 /**< Write from FIFO to ICAP */
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/* @} */
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/** @name Status Register (SR)
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*
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* @{
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*/
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#define XHI_SR_CFGERR_N_MASK 0x00000100 /**< Config Error Mask */
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#define XHI_SR_DALIGN_MASK 0x00000080 /**< Data Alignment Mask */
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#define XHI_SR_RIP_MASK 0x00000040 /**< Read back Mask */
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#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /**< Select Map Abort Mask */
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#define XHI_SR_DONE_MASK 0x00000001 /**< Done bit Mask */
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#define XHI_SR_EOS_MASK 0x00000004 /**< EOS bit Mask */
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/* @} */
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/**************************** Type Definitions ******************************/
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/***************** Macros (Inline Functions) Definitions ********************/
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#define XHwIcap_In32 Xil_In32
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#define XHwIcap_Out32 Xil_Out32
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/****************************************************************************/
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/**
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*
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* Read from the specified HwIcap device register.
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*
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* @param BaseAddress contains the base address of the device.
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* @param RegOffset contains the offset from the 1st register of the
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* device to select the specific register.
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*
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* @return The value read from the register.
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*
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* @note C-Style signature:
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* u32 XHwIcap_ReadReg(u32 BaseAddress, u32 RegOffset);
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*
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******************************************************************************/
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#define XHwIcap_ReadReg(BaseAddress, RegOffset) \
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XHwIcap_In32((BaseAddress) + (RegOffset))
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/***************************************************************************/
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/**
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*
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* Write to the specified HwIcap device register.
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*
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* @param BaseAddress contains the base address of the device.
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* @param RegOffset contains the offset from the 1st register of the
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* device to select the specific register.
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* @param RegisterValue is the value to be written to the register.
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*
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* @return None.
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*
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* @note C-Style signature:
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* void XHwIcap_WriteReg(u32 BaseAddress, u32 RegOffset,
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* u32 RegisterValue);
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******************************************************************************/
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#define XHwIcap_WriteReg(BaseAddress, RegOffset, RegisterValue) \
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XHwIcap_Out32((BaseAddress) + (RegOffset), (RegisterValue))
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* end of protection macro */
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