146 lines
3.7 KiB
C
146 lines
3.7 KiB
C
/*
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* Copyright 2010 Stefan Lankes, Chair for Operating Systems,
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* RWTH Aachen University
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* This file is part of MetalSVM.
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*/
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#include <metalsvm/stdio.h>
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#include <metalsvm/errno.h>
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#include <metalsvm/processor.h>
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#include <metalsvm/errno.h>
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#include <asm/io.h>
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#include <asm/RCCE_lib.h>
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#include <asm/SCC_API.h>
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#ifdef CONFIG_ROCKCREEK
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#define CCR_INTR_ACTIVE 0x02
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//scc_info_t scc_info;
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static char* rcce_argv[] = {"MetalSVM", "1", "533", "0"};
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static int rcce_argc = 4;
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/*
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* This is a modified MPB program, which is part of the RCCE distribution (src/mpb.c).
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*/
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static int scc_reset(void)
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{
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int tmp, x, y, z, offset;
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// Initialize API
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InitAPI(0);
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// Find out who I am...
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tmp=ReadConfigReg(CRB_OWN+MYTILEID);
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x=(tmp>>3) & 0x0f; // bits 06:03
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y=(tmp>>7) & 0x0f; // bits 10:07
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z=(tmp ) & 0x07; // bits 02:00
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// Allocate Message Passing Buffer
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t_vcharp MPB;
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MPBalloc(&MPB, x, y, z, 1);
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if (!MPB) {
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kprintf("Unable to allocate MPB for core %d of Tile x=%d, y= %d! Exiting.\n", z, x, y);
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return 255;
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}
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// zap own MPB
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for (offset=0; offset < 0x2000; offset+=8)
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*(volatile unsigned long long int*)(MPB+offset) = 0;
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// Clear test&set register write. Next read-access will read "1" (lock granted).
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SetConfigReg(CRB_ADDR(x,y)+((z)?LOCK1:LOCK0), 1);
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return 0;
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}
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int scc_init(void)
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{
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// uint32_t x, y, z;
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// uint32_t tmp;
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int num_ranks;
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int my_rank;
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return 0;
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kprintf("Initialize Rock Creek!\n");
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if (RCCE_init(&rcce_argc, &rcce_argv) != RCCE_SUCCESS)
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return -ENODEV;
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my_rank = RCCE_ue();
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num_ranks = RCCE_num_ues();
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kprintf("Got rank %d of %d ranks\n", my_rank, num_ranks);
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/* synchronize before starting MetalSVM: */
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RCCE_barrier(&RCCE_COMM_WORLD);
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/*tmp = *((uint32_t*) (CRB_OWN+MYTILEID));
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x=(tmp>>3) & 0x0f; // bits 06:03
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y=(tmp>>7) & 0x0f; // bits 10:07
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z=(tmp ) & 0x07; // bits 02:00
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scc_info.pid = PID(x, y, z);
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kprintf("SCC Processor Id: %u (%u,%u,%u)\n", scc_info.pid, x, y, z);
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*/
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/* default values for 16 GB system */
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/*scc_info.private_mem[0].low = 0x00;
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scc_info.private_mem[0].high = 0x13FFFFFF;
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scc_info.private_mem[1].low = 0xFF000000;
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scc_info.private_mem[1].high = 0xFFFFFFFF;
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*/
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// tmp = *((uint32_t*) (CRB_OWN+GCBCFG));
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// tmp = (tmp & 0x3FFFFFF) >> 7;
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//kprintf("Own GCBCFG is 0x%x\n", tmp);
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/* if (tmp == 0x70E1) {
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scc_info.tile_frequency = 800;
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scc_info.router_frequency = 1600;
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} else {
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scc_info.tile_frequency = 533;
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scc_info.router_frequency = 800;
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}
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*/
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/* kprintf("The default tile frequency is %u MHz\nThe default router frequency is %u MHz\n",
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scc_info.tile_frequency, scc_info.router_frequency);
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if (z == 0)
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tmp = *((uint32_t*) (CRB_OWN+GLCFG0));
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else if (z == 1)
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tmp = *((uint32_t*) (CRB_OWN+GLCFG1));
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else
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tmp = 0;
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*/
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/* set INTR to enable maskable interrupts */
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/* tmp = tmp | CCR_INTR_ACTIVE;
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if (z == 0)
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*((uint32_t*) (CRB_OWN+GLCFG0)) = tmp;
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else if (z == 1)
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*((uint32_t*) (CRB_OWN+GLCFG1)) = tmp;
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*/
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/* reload core configuration */
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/* tmp = 0;
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if (z == 0)
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tmp = *((uint32_t*) (CRB_OWN+GLCFG0));
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else if (z == 1)
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tmp = *((uint32_t*) (CRB_OWN+GLCFG1));
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kprintf("Core Configuration %u: 0x%x\n", z, tmp);
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*/
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kputs("Now, the SCC is initialized!\n");
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return 0;
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}
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#endif
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