f0e4a2b833
=> seesection "10.1.2 Internal Cache Changes" of SCC External Architecture Specification (R1.1)
105 lines
2.7 KiB
C
105 lines
2.7 KiB
C
/*
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* Copyright 2010 Stefan Lankes, Chair for Operating Systems,
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* RWTH Aachen University
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* This file is part of MetalSVM.
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*/
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#include <metalsvm/stdio.h>
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#include <metalsvm/errno.h>
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#include <metalsvm/processor.h>
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#include <metalsvm/errno.h>
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#include <asm/io.h>
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#include <asm/RCCE_lib.h>
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#include <asm/SCC_API.h>
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#ifdef CONFIG_ROCKCREEK
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/* PSE bit for Pentium+ equals MPE (message buffer enable) flag in RCK! So, use it to create _PAGE_MPB symbol... */
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#define _CR4_MPE 0x00000800
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/*
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* Workaround to create a suitable argv array
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*/
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static char* argv_strings[] = {"MetalSVM", "1", "533", "0"};
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static char* argv[4] = {[0 ... 3] = NULL};
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static char** rcce_argv = argv;
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static int rcce_argc = 4;
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/*
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* This is the modified MPB program, which is part of the RCCE distribution (src/mpb.c).
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*
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* This function clears the local MPB and resets the test&set register.
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*/
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static int scc_clear(void)
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{
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int tmp, x, y, z, offset;
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// Find out who I am...
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tmp=ReadConfigReg(CRB_OWN+MYTILEID);
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x=(tmp>>3) & 0x0f; // bits 06:03
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y=(tmp>>7) & 0x0f; // bits 10:07
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z=(tmp ) & 0x07; // bits 02:00
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// Allocate Message Passing Buffer
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t_vcharp MPB;
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MPBalloc(&MPB, x, y, z, 1);
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if (!MPB) {
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kprintf("Unable to allocate MPB for core %d of Tile x=%d, y= %d! Exiting.\n", z, x, y);
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return 255;
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}
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// zap own MPB
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for (offset=0; offset < 0x2000; offset+=8)
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*(volatile unsigned long long int*)(MPB+offset) = 0;
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// Clear test&set register write. Next read-access will read "1" (lock granted).
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SetConfigReg(CRB_ADDR(x,y)+((z)?LOCK1:LOCK0), 1);
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return 0;
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}
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int scc_init(void)
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{
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int num_ranks;
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int i, my_rank;
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kprintf("Initialize Rock Creek!\n");
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for(i=0; i<rcce_argc; i++)
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argv[i] = argv_strings[i];
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if (RCCE_init(&rcce_argc, &rcce_argv) != RCCE_SUCCESS)
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return -ENODEV;
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my_rank = RCCE_ue();
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num_ranks = RCCE_num_ues();
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kprintf("Got rank %d of %d ranks\n", my_rank, num_ranks);
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/* Enable Messagepassing in CR4 */
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uint32_t cr4 = read_cr4();
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cr4 = cr4 | _CR4_MPE;
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write_cr4(cr4);
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i = ReadConfigReg(CRB_OWN+GLCFG0);
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kprintf("glcfg0 0x%x\n", i);
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/* synchronize before starting MetalSVM: */
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//RCCE_barrier(&RCCE_COMM_WORLD);
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kputs("Now, the SCC is initialized!\n");
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return 0;
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}
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#endif
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