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3 commits
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Clifford Wolf
50f22ff30c
Renamed some of the test cases in tests/simple to avoid name collisions
2014-07-25 13:01:45 +02:00
Clifford Wolf
3af7c69d1e
added tests for new verilog features
2014-06-07 12:26:11 +02:00
Clifford Wolf
c82db39935
Added tests/simple/repwhile.v
2014-06-06 17:47:20 +02:00