Ruben Undheim
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178ff3e7f6
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Added support for SystemVerilog packages with localparam definitions
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2016-06-18 10:53:55 +02:00 |
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Clifford Wolf
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766032c5f8
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Fixed procedural assignments to non-unique lvalues, e.g. {y,y} = {a,b}
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2016-05-27 17:55:03 +02:00 |
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Clifford Wolf
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ee071586c5
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Fixed access-after-delete bug in mem2reg code
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2016-05-27 17:25:33 +02:00 |
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Clifford Wolf
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e9ceec26ff
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fixed typos in error messages
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2016-05-27 16:37:36 +02:00 |
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Clifford Wolf
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570014800a
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Include <cmath> in yosys.h
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2016-05-08 10:50:39 +02:00 |
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Clifford Wolf
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0bc95f1e04
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Added "yosys -D" feature
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2016-04-21 23:28:37 +02:00 |
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Clifford Wolf
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5a09fa4553
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Fixed handling of parameters and const functions in casex/casez pattern
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2016-04-21 15:31:54 +02:00 |
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Clifford Wolf
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5328a85149
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Do not set "nosync" on task outputs, fixes #134
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2016-03-24 12:16:47 +01:00 |
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Clifford Wolf
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4f0d4899ce
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Added support for $stop system task
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2016-03-21 16:19:51 +01:00 |
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Clifford Wolf
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e5d42ebb4d
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Added $display %m support, fixed mem leak in $display, fixes #128
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2016-03-19 11:51:13 +01:00 |
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Clifford Wolf
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ef4207d5ad
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Fixed localparam signdness, fixes #127
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2016-03-18 12:15:00 +01:00 |
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Clifford Wolf
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b6d08f39ba
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Set "nosync" attribute on internal task/function wires
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2016-03-18 10:53:29 +01:00 |
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Clifford Wolf
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bcc873b805
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Fixed some visual studio warnings
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2016-02-13 17:31:24 +01:00 |
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Rick Altherr
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34969d4140
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genrtlil: avoid converting SigSpec to set<SigBit> when going through removeSignalFromCaseTree()
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2016-01-31 09:20:16 -08:00 |
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Clifford Wolf
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c86fbae3d1
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Fixed handling of re-declarations of wires in tasks and functions
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2015-11-23 17:09:57 +01:00 |
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Clifford Wolf
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7ae3d1b5a9
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More bugfixes in handling of parameters in tasks and functions
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2015-11-12 13:02:36 +01:00 |
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Clifford Wolf
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34f2b84fb6
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Fixed handling of parameters and localparams in functions
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2015-11-11 10:54:35 +01:00 |
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Clifford Wolf
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207736b4ee
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Import more std:: stuff into Yosys namespace
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2015-10-25 19:30:49 +01:00 |
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Clifford Wolf
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e51dcc83d0
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Fixed complexity of assigning to vectors in constant functions
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2015-10-01 12:15:35 +02:00 |
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Clifford Wolf
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9caeadf797
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Fixed detection of unconditional $readmem[hb]
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2015-09-30 15:46:51 +02:00 |
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Clifford Wolf
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f9d7df0869
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Bugfixes in $readmem[hb]
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2015-09-25 13:49:48 +02:00 |
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Clifford Wolf
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b2544cfcf7
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Fixed segfault in AstNode::asReal
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2015-09-25 12:38:01 +02:00 |
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Clifford Wolf
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924d9d6e86
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Added read-enable to memory model
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2015-09-25 12:23:11 +02:00 |
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Clifford Wolf
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1b8cb9940e
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Fixed AstNode::mkconst_bits() segfault on zero-sized constant
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2015-09-24 11:21:20 +02:00 |
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Clifford Wolf
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089c1e176f
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Bugfix in handling of multi-dimensional memories
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2015-09-23 07:56:17 +02:00 |
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Clifford Wolf
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559929e341
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Warning for $display/$write outside initial block
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2015-09-23 07:16:03 +02:00 |
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Clifford Wolf
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6176f4d081
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Fixed multi-level prefix resolving
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2015-09-22 20:52:02 +02:00 |
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Andrew Zonenberg
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c469f22144
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Improvements to $display system task
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2015-09-19 10:33:37 +02:00 |
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Clifford Wolf
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9db05d17fe
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Added AST_INITIAL checks for $finish and $display
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2015-09-18 09:50:57 +02:00 |
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Andrew Zonenberg
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7141f65533
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Initial implementation of $display()
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2015-09-18 09:36:46 +02:00 |
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Andrew Zonenberg
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e446e651cb
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Initial implementation of $finish()
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2015-09-18 09:30:25 +02:00 |
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Clifford Wolf
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eb38722e98
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Fixed handling of memory read without address
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2015-08-22 14:46:42 +02:00 |
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Larry Doolittle
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6c00704a5e
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Another block of spelling fixes
Smaller this time
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2015-08-14 23:27:05 +02:00 |
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Larry Doolittle
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022f570563
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Keep gcc from complaining about uninitialized variables
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2015-08-14 23:26:49 +02:00 |
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Clifford Wolf
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84bf862f7c
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Spell check (by Larry Doolittle)
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2015-08-14 10:56:05 +02:00 |
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Clifford Wolf
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8d6d5c30d9
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Added WORDS parameter to $meminit
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2015-07-31 10:40:09 +02:00 |
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Clifford Wolf
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4513ff1b85
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Fixed nested mem2reg
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2015-07-29 16:37:08 +02:00 |
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Clifford Wolf
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6c84341f22
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Fixed trailing whitespaces
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2015-07-02 11:14:30 +02:00 |
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Clifford Wolf
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13983e8318
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Fixed handling of parameters with reversed range
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2015-06-08 14:03:06 +02:00 |
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Clifford Wolf
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99b8746d27
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Fixed signedness of genvar expressions
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2015-05-29 20:08:00 +02:00 |
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Clifford Wolf
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422794c584
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Const-fold parameter defs on-demand in AstNode::detectSignWidthWorker()
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2015-03-01 11:20:22 +01:00 |
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Clifford Wolf
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1f1deda888
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Added non-std verilog assume() statement
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2015-02-26 18:47:39 +01:00 |
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Clifford Wolf
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d5ce9a32ef
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Added deep recursion warning to AST simplify
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2015-02-20 10:33:20 +01:00 |
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Clifford Wolf
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dc1a0f06fc
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Parser support for complex delay expressions
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2015-02-20 10:21:36 +01:00 |
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Clifford Wolf
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c2ba4fb2fd
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Convert floating point cell parameters to strings
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2015-02-18 23:35:23 +01:00 |
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Clifford Wolf
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e9368a1d7e
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Various fixes for memories with offsets
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2015-02-14 14:21:15 +01:00 |
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Clifford Wolf
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7f1a1759d7
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Added "read_verilog -nomeminit" and "nomeminit" attribute
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2015-02-14 11:21:12 +01:00 |
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Clifford Wolf
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a8e9d37c14
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Creating $meminit cells in verilog front-end
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2015-02-14 10:49:30 +01:00 |
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Clifford Wolf
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cd919abdf1
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Added AstNode::simplify() recursion counter
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2015-02-13 12:33:12 +01:00 |
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Clifford Wolf
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234a45a3d5
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Ignore explicit assignments to constants in HDL code
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2015-02-08 00:58:03 +01:00 |
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