2023-09-08 11:35:18 +02:00
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/* Global include for tests.
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2018-06-25 17:03:09 +02:00
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*
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2023-01-07 17:20:15 +01:00
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* Author: Steffen Vogel <post@steffenvogel.de>
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2023-01-07 17:32:48 +01:00
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* SPDX-FileCopyrightText: 2017 Steffen Vogel <post@steffenvogel.de>
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2023-01-07 17:20:15 +01:00
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* SPDX-License-Identifier: Apache-2.0
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2023-09-08 11:35:18 +02:00
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*/
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2018-06-25 17:03:09 +02:00
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2018-01-31 11:16:02 +01:00
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#pragma once
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#include <cstdlib>
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2023-12-12 11:40:12 +01:00
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#include <villas/fpga/card.hpp>
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2018-01-31 11:16:02 +01:00
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class FpgaState {
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public:
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2024-02-29 19:34:27 +01:00
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// List of all available FPGA cards, only first will be tested at the moment
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2023-12-12 11:40:12 +01:00
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std::list<std::shared_ptr<villas::fpga::Card>> cards;
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2018-01-31 11:16:02 +01:00
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};
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2022-08-30 12:01:47 -04:00
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// Global state to be shared by unittests
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2018-01-31 11:16:02 +01:00
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extern FpgaState state;
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