Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity

fpga: default Dino rate should be 20kHz

Browse source 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
Niklas Eiling 2024-03-01 14:10:19 +01:00 • committed by pipeacosta
parent 214e45c636
commit 06201c94fa
1 changed files with 1 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
fpga/lib/ips/register.cpp
View file

@ -43,8 +43,7 @@ bool Register::check() {
}
// This is Dino specific for now - we should possibly move this to Dino in the future
// setRegister(0, static_cast<uint32_t>(1000)); // set Dino to a rate of 20 kHz
setRegister(0, static_cast<uint32_t>(100000)); // set Dino to a rate of 20 kHz
setRegister(0, static_cast<uint32_t>(1000)); // set Dino to a rate of 20 kHz
setRegister(1, -0.001615254F);
setRegister(2, 10.8061F);
uint32_t rate = getRegister(0);