mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-30 00:00:11 +01:00
115 lines
3.6 KiB
C++
115 lines
3.6 KiB
C++
/* Driver for register interface 'registerif'
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*
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* Author: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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* SPDX-FileCopyrightText: 2024 Niklas Eiling
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <xilinx/xil_io.h>
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#include <villas/fpga/ips/register.hpp>
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using namespace villas::fpga::ip;
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#define REGISTER_RESET (512)
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#define REGISTER_OUT(NUM) (4 * NUM)
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Register::Register() : Node() {}
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bool Register::init() { return true; }
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bool Register::check() {
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logger->debug("Checking register interface: Base address: 0x{:08x}",
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getBaseAddr(registerMemory));
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uint32_t buf;
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// we shouldn't change the rate register, because this can lead to hardware fault, so start at 1
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for (size_t i = 1; i < registerNum; i++) {
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setRegister(i, static_cast<uint32_t>(i));
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}
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for (size_t i = 1; i < registerNum; i++) {
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buf = getRegister(i);
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if (buf != i) {
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logger->error("Register {}: 0x{:08x} != 0x{:08x}", i, buf, i);
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return false;
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}
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}
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resetAllRegisters();
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for (size_t i = 0; i < registerNum; i++) {
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logger->debug("Register {}: 0x{:08x}", i, getRegister(i));
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}
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// This is Dino specific for now - we should possibly move this to Dino in the future
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setRegister(0, static_cast<uint32_t>(1000)); // set Dino to a rate of 20 kHz
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setRegister(1, -0.001615254F);
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setRegister(2, 10.8061F);
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uint32_t rate = getRegister(0);
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float scale = getRegisterFloat(1);
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float offset = getRegisterFloat(2);
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logger->info("Check: Register configuration: Rate: {}, Scale: {}, Offset: {}",
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rate, scale, offset);
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return true;
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}
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void Register::setRegister(size_t reg, uint32_t value) {
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if (reg >= registerNum) {
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logger->error("Register index out of range: {}/{}", reg, registerNum);
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throw std::out_of_range("Register index out of range");
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}
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Xil_Out32(getBaseAddr(registerMemory) + REGISTER_OUT(reg), value);
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}
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void Register::setRegister(size_t reg, float value) {
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if (reg >= registerNum) {
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logger->error("Register index out of range: {}/{}", reg, registerNum);
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throw std::out_of_range("Register index out of range");
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}
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wstrict-aliasing"
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Xil_Out32(getBaseAddr(registerMemory) + REGISTER_OUT(reg),
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reinterpret_cast<uint32_t &>(value));
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#pragma GCC diagnostic pop
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}
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uint32_t Register::getRegister(size_t reg) {
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if (reg >= registerNum) {
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logger->error("Register index out of range: {}/{}", reg, registerNum);
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throw std::out_of_range("Register index out of range");
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}
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return Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
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}
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float Register::getRegisterFloat(size_t reg) {
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if (reg >= registerNum) {
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logger->error("Register index out of range: {}/{}", reg, registerNum);
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throw std::out_of_range("Register index out of range");
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}
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uint32_t value = Xil_In32(getBaseAddr(registerMemory) + REGISTER_OUT(reg));
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wstrict-aliasing"
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return reinterpret_cast<float &>(value);
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#pragma GCC diagnostic pop
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}
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void Register::resetRegister(size_t reg) {
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if (reg >= registerNum) {
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logger->error("Register index out of range: {}/{}", reg, registerNum);
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throw std::out_of_range("Register index out of range");
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}
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Xil_Out32(getBaseAddr(registerMemory) + REGISTER_RESET, (1 << reg));
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}
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void Register::resetAllRegisters() {
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Xil_Out32(getBaseAddr(registerMemory) + REGISTER_RESET, 0xFFFFFFFF);
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}
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Register::~Register() {}
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static char n[] = "register";
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static char d[] = "Register interface VHDL module 'registerif'";
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static char v[] = "xilinx.com:module_ref:registerif:";
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static CorePlugin<Register, n, d, v> f;
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