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fpga: remove dead code and improve comments in Dino IP
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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1 changed files with 5 additions and 3 deletions
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@ -153,12 +153,14 @@ void DinoAdc::setRegisterConfig(std::shared_ptr<Register> reg,
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reg->setRegister(
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dinoRegisterTimer,
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dinoTimerVal); // Timer value for generating ADC trigger signal
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// The following are calibration values for the ADC and DAC. Scale
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// sets an factor to be multiplied with the input value. This is the
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// raw 16 bit ADC value for the ADC and the float value from VILLAS for
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// the DAC. Offset is a value to be added to the result of the multiplication.
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// All values are IEE 754 single precision floating point values.
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reg->setRegister(dinoRegisterAdcScale,
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-0.001615254F); // Scale factor for ADC value
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reg->setRegister(dinoRegisterAdcOffset, 10.8061F); // Offset for ADC value
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// reg->setRegister(dinoRegisterDacScale,
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// 3276.75F); // Scale factor for DAC value
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reg->setRegister(dinoRegisterDacScale,
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3448.53852516F); // Scale factor for DAC value
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reg->setRegister(dinoRegisterDacOffset, 32767.5F); // Offset for DAC value
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