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https://git.rwth-aachen.de/acs/public/villas/node/
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lib/card: remove unused C code
This commit is contained in:
daniel-k
parent
f987c29d71
commit
82204990cd
1 changed files with 1 additions and 299 deletions
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@ -182,306 +182,8 @@ bool fpga::PCIeCard::init()
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}
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}
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/* Initialize IP cores */
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// for (size_t j = 0; j < list_length(&ips); j++) {
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// struct fpga_ip *i = (struct fpga_ip *) list_at(&ips, j);
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// ret = fpga_ip_start(i);
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// if (ret)
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// error("Failed to initalize FPGA IP core: %s (%u)", i->name, ret);
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// }
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return 0;
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return true;
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}
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#if 0
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int fpga_card_init(struct fpga_card *c, struct pci *pci, struct vfio_container *vc)
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{
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assert(c->state == STATE_DESTROYED);
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c->vfio_container = vc;
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c->pci = pci;
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list_init(&c->ips);
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/* Default values */
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c->filter.id.vendor = FPGA_PCI_VID_XILINX;
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c->filter.id.device = FPGA_PCI_PID_VFPGA;
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c->affinity = 0;
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c->do_reset = 0;
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c->state = STATE_INITIALIZED;
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return 0;
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}
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int fpga_card_parse(struct fpga_card *c, json_t *cfg, const char *name)
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{
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int ret;
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json_t *json_ips;
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json_t *json_slot = NULL;
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json_t *json_id = NULL;
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json_error_t err;
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c->name = strdup(name);
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ret = json_unpack_ex(cfg, &err, 0, "{ s?: i, s?: b, s?: o, s?: o, s: o }",
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"affinity", &c->affinity,
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"do_reset", &c->do_reset,
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"slot", &json_slot,
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"id", &json_id,
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"ips", &json_ips
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);
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if (ret)
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jerror(&err, "Failed to parse FPGA vard configuration");
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if (json_slot) {
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const char *err, *slot;
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slot = json_string_value(json_slot);
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if (slot) {
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ret = pci_device_parse_slot(&c->filter, slot, &err);
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if (ret)
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error("Failed to parse PCI slot: %s", err);
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}
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else
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error("PCI slot must be a string");
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}
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if (json_id) {
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const char *err, *id;
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id = json_string_value(json_id);
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if (id) {
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ret = pci_device_parse_id(&c->filter, (char*) id, &err);
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if (ret)
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error("Failed to parse PCI id: %s", err);
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}
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else
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error("PCI ID must be a string");
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}
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if (!json_is_object(json_ips))
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error("FPGA card IPs section must be an object");
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const char *name_ip;
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json_t *json_ip;
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json_object_foreach(json_ips, name_ip, json_ip) {
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const char *vlnv;
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struct fpga_ip_type *vt;
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struct fpga_ip *ip = (struct fpga_ip *) alloc(sizeof(struct fpga_ip));
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ip->card = c;
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ret = json_unpack_ex(json_ip, &err, 0, "{ s: s }", "vlnv", &vlnv);
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if (ret)
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error("Failed to parse FPGA IP '%s' of card '%s'", name_ip, name);
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vt = fpga_ip_type_lookup(vlnv);
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if (!vt)
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error("FPGA IP core VLNV identifier '%s' is invalid", vlnv);
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ret = fpga_ip_init(ip, vt);
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if (ret)
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error("Failed to initalize FPGA IP core");
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ret = fpga_ip_parse(ip, json_ip, name_ip);
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if (ret)
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error("Failed to parse FPGA IP core");
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list_push(&c->ips, ip);
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}
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c->state = STATE_PARSED;
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return 0;
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}
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int fpga_card_parse_list(struct list *cards, json_t *cfg)
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{
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int ret;
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if (!json_is_object(cfg))
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error("FPGA card configuration section must be a JSON object");
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const char *name;
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json_t *json_fpga;
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json_object_foreach(cfg, name, json_fpga) {
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struct fpga_card *c = (struct fpga_card *) alloc(sizeof(struct fpga_card));
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ret = ::fpga_card_parse(c, json_fpga, name);
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if (ret)
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error("Failed to parse FPGA card configuration");
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list_push(cards, c);
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}
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return 0;
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}
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int fpga_card_start(struct fpga_card *c)
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{
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int ret;
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struct pci_device *pdev;
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assert(c->state == STATE_INITIALIZED);
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/* Search for FPGA card */
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pdev = pci_lookup_device(c->pci, &c->filter);
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if (!pdev)
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error("Failed to find PCI device");
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/* Attach PCIe card to VFIO container */
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ret = vfio_pci_attach(&c->vfio_device, c->vfio_container, pdev);
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if (ret)
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error("Failed to attach VFIO device");
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/* Map PCIe BAR */
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c->map = (char*) vfio_map_region(&c->vfio_device, VFIO_PCI_BAR0_REGION_INDEX);
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if (c->map == MAP_FAILED)
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serror("Failed to mmap() BAR0");
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/* Enable memory access and PCI bus mastering for DMA */
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ret = vfio_pci_enable(&c->vfio_device);
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if (ret)
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serror("Failed to enable PCI device");
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/* Reset system? */
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if (c->do_reset) {
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/* Reset / detect PCI device */
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ret = vfio_pci_reset(&c->vfio_device);
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if (ret)
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serror("Failed to reset PCI device");
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ret = fpga_card_reset(c);
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if (ret)
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error("Failed to reset FGPA card");
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}
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/* Initialize IP cores */
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for (size_t j = 0; j < list_length(&c->ips); j++) {
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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ret = fpga_ip_start(i);
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if (ret)
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error("Failed to initalize FPGA IP core: %s (%u)", i->name, ret);
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}
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c->state = STATE_STARTED;
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return 0;
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}
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int fpga_card_stop(struct fpga_card *c)
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{
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int ret;
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assert(c->state == STATE_STOPPED);
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for (size_t j = 0; j < list_length(&c->ips); j++) {
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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ret = fpga_ip_stop(i);
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if (ret)
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error("Failed to stop FPGA IP core: %s (%u)", i->name, ret);
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}
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c->state = STATE_STOPPED;
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return 0;
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}
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void fpga_card_dump(struct fpga_card *c)
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{
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info("VILLASfpga card:");
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{ INDENT
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info("Slot: %04x:%02x:%02x.%d", c->vfio_device.pci_device->slot.domain, c->vfio_device.pci_device->slot.bus, c->vfio_device.pci_device->slot.device, c->vfio_device.pci_device->slot.function);
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info("Vendor ID: %04x", c->vfio_device.pci_device->id.vendor);
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info("Device ID: %04x", c->vfio_device.pci_device->id.device);
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info("Class ID: %04x", c->vfio_device.pci_device->id.class_code);
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info("BAR0 mapped at %p", c->map);
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info("IP blocks:");
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for (size_t j = 0; j < list_length(&c->ips); j++) { INDENT
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struct fpga_ip *i = (struct fpga_ip *) list_at(&c->ips, j);
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fpga_ip_dump(i);
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}
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}
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vfio_dump(c->vfio_device.group->container);
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}
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int fpga_card_check(struct fpga_card *c)
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{
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assert(c->state == STATE_PARSED);
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/* Check FPGA configuration */
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struct fpga_vlnv vlnv_reset = { "xilinx.com", "ip", "axi_gpio", NULL };
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c->reset = fpga_vlnv_lookup(&c->ips, &vlnv_reset);
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if (!c->reset)
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error("FPGA is missing a reset controller");
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struct fpga_vlnv vlnv_intc = { "acs.eonerc.rwth-aachen.de", "user", "axi_pcie_intc", NULL };
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c->intc = fpga_vlnv_lookup(&c->ips, &vlnv_intc);
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if (!c->intc)
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error("FPGA is missing a interrupt controller");
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struct fpga_vlnv vlnv_sw = { "xilinx.com", "ip", "axis_interconnect", NULL };
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c->sw = fpga_vlnv_lookup(&c->ips, &vlnv_sw);
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if (!c->sw)
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warn("FPGA is missing an AXI4-Stream switch");
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return 0;
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}
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int fpga_card_destroy(struct fpga_card *c)
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{
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list_destroy(&c->ips, (dtor_cb_t) fpga_ip_destroy, true);
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return 0;
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}
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int fpga_card_reset(struct fpga_card *c)
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{
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int ret;
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char state[4096];
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/* Save current state of PCI configuration space */
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ret = pread(c->vfio_device.fd, state, sizeof(state), (off_t) VFIO_PCI_CONFIG_REGION_INDEX << 40);
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if (ret != sizeof(state))
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return -1;
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uint32_t *rst_reg = (uint32_t *) (c->map + c->reset->baseaddr);
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debug(3, "FPGA: reset");
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rst_reg[0] = 1;
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usleep(100000);
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/* Restore previous state of PCI configuration space */
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ret = pwrite(c->vfio_device.fd, state, sizeof(state), (off_t) VFIO_PCI_CONFIG_REGION_INDEX << 40);
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if (ret != sizeof(state))
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return -1;
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/* After reset the value should be zero again */
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if (rst_reg[0])
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return -2;
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c->state = STATE_INITIALIZED;
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return 0;
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}
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#endif
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} // namespace fpga
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} // namespace villas
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