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https://git.rwth-aachen.de/acs/public/villas/node/
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fpga: make FPGA support sending and receiving integers
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
This commit is contained in:
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0582a27ee0
commit
9b79c16fb3
2 changed files with 18 additions and 15 deletions
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@ -15,6 +15,7 @@
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#include <villas/node/config.hpp>
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#include <villas/timing.hpp>
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#include <stdint.h>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/node.hpp>
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@ -61,7 +62,9 @@ protected:
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std::shared_ptr<fpga::Card> card;
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std::shared_ptr<villas::fpga::ip::Dma> dma;
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std::shared_ptr<villas::MemoryBlock> blockRx;
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std::shared_ptr<MemoryAccessor<uint32_t>> accessorRx;
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std::shared_ptr<villas::MemoryBlock> blockTx;
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std::shared_ptr<MemoryAccessor<uint32_t>> accessorTx;
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// Non-public methods
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virtual int fastRead(Sample *smps[], unsigned cnt);
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@ -14,6 +14,7 @@
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#include <villas/exceptions.hpp>
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#include <villas/log.hpp>
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#include <villas/memory.hpp>
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#include <villas/nodes/fpga.hpp>
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#include <villas/sample.hpp>
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#include <villas/super_node.hpp>
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@ -36,7 +37,8 @@ static std::shared_ptr<kernel::vfio::Container> vfioContainer;
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FpgaNode::FpgaNode(const uuid_t &id, const std::string &name)
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: Node(id, name), cardName(""), connectStrings(), lowLatencyMode(false),
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timestep(10e-3), card(nullptr), dma(), blockRx(), blockTx() {}
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timestep(10e-3), card(nullptr), dma(), blockRx(), accessorRx(nullptr),
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blockTx(), accessorTx(nullptr) {}
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FpgaNode::~FpgaNode() {}
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@ -90,8 +92,8 @@ int FpgaNode::prepare() {
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blockRx = alloc.allocateBlock(0x200 * sizeof(float));
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blockTx = alloc.allocateBlock(0x200 * sizeof(float));
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villas::MemoryAccessor<float> memRx = *blockRx;
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villas::MemoryAccessor<float> memTx = *blockTx;
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accessorRx = std::make_shared<MemoryAccessor<uint32_t>>(*blockRx);
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accessorTx = std::make_shared<MemoryAccessor<uint32_t>>(*blockTx);
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dma->makeAccesibleFromVA(blockRx);
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dma->makeAccesibleFromVA(blockTx);
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@ -219,16 +221,18 @@ int FpgaNode::fastWrite(Sample *smps[], unsigned cnt) {
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assert(cnt == 1 && smps != nullptr && smps[0] != nullptr);
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auto mem = MemoryAccessor<float>(*blockTx);
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for (unsigned i = 0; i < smp->length; i++) {
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if (smp->signals->getByIndex(i)->type == SignalType::FLOAT) {
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mem[i] = static_cast<float>(smp->data[i].f);
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float f = static_cast<float>(smp->data[i].f);
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(*accessorTx)[i] = *reinterpret_cast<uint32_t *>(&f);
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} else {
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mem[i] = static_cast<float>(smp->data[i].i);
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(*accessorTx)[i] = static_cast<uint32_t>(smp->data[i].i);
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}
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}
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// logger->info("Writing sample: {}, {}, {:#x}", smp->data[0].f,
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// signalTypeToString(smp->signals->getByIndex(0)->type),
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// smp->data[0].i);
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dma->writeScatterGatherFast();
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auto written = dma->writeScatterGatherPoll() /
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sizeof(float); // The number of samples written
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@ -253,7 +257,7 @@ int FpgaNode::fastRead(Sample *smps[], unsigned cnt) {
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size_t to_read = in.signals->size() * sizeof(uint32_t);
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size_t read;
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do {
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dma->readScatterGatherFast();
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dma->readScatterGatherFast();
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read = dma->readScatterGatherPoll(true);
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if (read < to_read) {
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logger->warn("Read only {} bytes, but {} were expected", read, to_read);
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@ -267,14 +271,10 @@ int FpgaNode::fastRead(Sample *smps[], unsigned cnt) {
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smp->length = 0;
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for (unsigned i = 0; i < MIN(read / sizeof(uint32_t), smp->capacity); i++) {
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if (in.signals->getByIndex(i)->type == SignalType::INTEGER) {
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auto mem = MemoryAccessor<uint32_t>(*blockRx);
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smp->data[i].i = static_cast<int64_t>(mem[i]);
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logger->info("Reading sample: {}, {}, {:#x}, i: {}", smp->data[i].i,
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signalTypeToString(smp->signals->getByIndex(i)->type),
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smp->data[i].i, i);
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smp->data[i].i = static_cast<int64_t>((*accessorRx)[i]);
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} else {
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auto mem = MemoryAccessor<float>(*blockRx);
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smp->data[i].f = static_cast<double>(mem[i]);
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smp->data[i].f =
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static_cast<double>(*reinterpret_cast<float *>(&(*accessorRx)[i]));
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}
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smp->length++;
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}
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