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25 commits

Author SHA1 Message Date
2b583c8196 replace last occurences of #ifndefs with #pragma once 2017-06-28 15:05:31 +02:00
Georg Reinke
1d011e6d8f some include / format error fixes 2017-06-08 12:42:46 +02:00
49054eef9f cleanup: removed trailing whitespaces in code 2017-05-05 19:24:16 +00:00
5be1853649 added GPL license to file headers 2017-04-27 12:56:43 +02:00
3eb629d9d5 various bug fixes from todays debugging session 2017-03-29 04:25:30 +02:00
644352538d move checks into *_check(), set default values in _init() 2017-03-27 12:57:41 +02:00
1bb91ce8af added _vd and _vt members for struct fpga_ip (now in line with nodes, hooks, models, etc..) 2017-03-25 21:10:25 +01:00
b676897545 fix search & replace mistake 2017-03-12 23:17:48 -03:00
2757011e1b several smaller fixes and documentation updates 2017-03-12 17:13:37 -03:00
cdd5a2ca90 refactoring: unified states of common objects: nodes, paths, node-types, plugins, hooks, etc.. 2017-03-11 23:50:30 -03:00
e27f0b699f several fixes for clean compilation 2017-03-03 20:21:33 -04:00
3e7c855526 updated licence and copyright info in file headers 2017-03-03 20:20:13 -04:00
7ec6aee288 Merge remote-tracking branch 'rwth/develop' into feature-curlio 2017-02-18 11:05:11 -05:00
7de25683d7 fpga: refactored VILLASfpga node type 2017-02-18 10:43:58 -05:00
90cad8e829 refactored FPGA VLNV parser / comparison code 2017-02-15 17:57:45 -03:00
3ebfaf287c remove obsolete preprocessor macros 2017-02-15 17:57:03 -03:00
e7bf4e3f03 fix header include guard macros include full name 2017-02-12 14:04:22 -03:00
1dba01a8ae Re-license source code to LGPLv2.1 (closes #56) 2016-11-22 11:14:25 -05:00
3f012c8575 finished FPGA stuff 2016-07-08 13:32:18 +02:00
88157a3023 improved AXI4 switch configuration 2016-07-08 13:01:40 +02:00
ac389a76ff added DMA memory managment functions 2016-07-08 12:59:09 +02:00
68f2dbea76 major changes in the VILLASfpga code. Lots of smaller improvements and fixed 2016-06-26 15:22:25 +02:00
c67af15a2c fixed all major bugs in FPGA code 2016-06-19 19:30:00 +02:00
98fb370e85 first steps towards flexible and configurable VILLASfpga / VILLASnode integration 2016-06-15 20:05:09 +02:00
bffb47dca8 added VILLASfpga code 2016-06-14 01:23:44 +02:00