Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity
6329 commits 171 branches 31 tags 76 MiB
Commit graph

6329 commits

This branch
This branch
All branches
Author SHA1 Message Date
Niklas Eiling
8b95182b08 automatically configure and test Dino based on hwdef json 
this currently requires manually adding the mapping of Dinos to i2c
buses in the fpga json.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
b5682290c2 I2c: use Switch::selfTest to check i2c bus 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d4a868ae7c Dino: add debug output for direction registers of io extender 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
db062f08bd Dino: overload operator>> for IoextPorts 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
60c65c2880 verify more assumptions in i2c 
add selftest to I2c and readback Dino configuration to verify it was
actually set

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
335dd2c0ce fix bug where Dino IP always read 0 from i2c. Add hardware mutex to I2c 
and to I2c::Switch

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
acaa4dd9de improve i2c IP 
more code reuse, add function for reading from a register i.e. combined
write and read

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
08b666a548 make I2c destructor call to I2c::reset explicit 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
dbe4e4e472 add i2c configuration logic to dino IP 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
810b1259f8 fix double start of i2c bus driver and move channel map to header 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
48846ace39 i2c: add handling of BusNotBusy interrupt on reads. add retrying of 
channel reads in case inconsistent state was detected.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
f086c325c2 link with stdc++fs to avoid compiler error on newer gcc versions 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
57177c074e fix several issues with i2c implementation and add support for 
interacting with i2c switches

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
2d51deea0c remove vfio container intitialization from setupFPGACard 
this lead to double creation of the vfio container

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
3e74c0d7a4 remove linking to libjansson from libvillas-fpga because this is already 
included in libvillas-common.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
1578a26915 i2c: fix missing getMemoryBlocks method leading to unmapped memory 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d34ab182e4 fix unmapped ring buffers in dma.cpp leading to segfault 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
e93b8e998d fix IPs without stream port causing an error and fix formatting in 
node.cpp

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
bd1f32da7b fix fomatting in core.cpp 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
64d5a6ba42 fpgas.json: switch to new json per default and fix the same 
use fpga definition that includes dino and i2c controller to use the
latest bitstream (vc707-xbar-pcie-dino).
Fix the json for that bitstream to also include the interrupt
controller.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
3e64e5d238 hwdef-parse.py: add interrupt controller added as module_ref to 
whitelist

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
7e07da6e60 add i2c ip draft 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
0138119bff copy new editorconf from node 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d61337023e add draft for i2c drvier implementation 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:17:26 +01:00
Niklas Eiling
ba71f6384f hwdef-parse.py: add SPDX compliant license info 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:11:26 +01:00
Niklas Eiling
4f4312127d add json for vc707-xbar-pcie-dino 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:11:26 +01:00
Niklas Eiling
ada7cac017 hwdef-parse.py: whitelist iic and DINO IPs 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:11:26 +01:00
Niklas Eiling
e2382c643b add hwdef-parse script from hardware repo 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:11:26 +01:00
Niklas Eiling
2967fb8ac9 fix fpga.cpp unit test failing due to changed DeviceList interface 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-12 14:08:34 +01:00
Niklas Eiling
654ee84e9e make FPGA device interface agnostic 
remove explicit mentioning of PCIe in the use of Device as a preparation
for integrating platform devices. auto formatted some files.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-12 14:08:34 +01:00
Niklas Eiling
7ce1ee5a6c make villas-fpga-ctrl accept multiple connect strings 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-12 14:08:34 +01:00
Niklas Eiling
804f3eea29 update common subrepo 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-12 14:08:34 +01:00
Philipp Jungkamp
c3d991b23e python: Add digest-hook fifo format parsing 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-29 11:09:27 +02:00
Philipp Jungkamp
b90c5d9c77 Update submodules 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-26 17:59:39 +02:00
Philipp Jungkamp
9adf7931f1 src: Suppress cppcheck false positive 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-26 17:59:39 +02:00
Philipp Jungkamp
b1e9407f83 packaging-nix: Update inputs 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-26 17:59:39 +02:00
Philipp Jungkamp
33cd6165df Fix fmt 10.0.0 related formatting errors. 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-26 17:59:39 +02:00
Philipp Jungkamp
e2c2ec2c8b Fix fmt 10.0.0 related formatting errors. 
Signed-off-by: Philipp Jungkamp <p.jungkamp@gmx.net>
 2023-09-26 17:00:31 +02:00
Philipp Jungkamp
86bba9c5e8 python: Always use UTC time when handling Timestamps 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-21 14:46:54 +02:00
Philipp Jungkamp
396dd7642e ci: Check Python code with black and mypy 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-21 14:46:54 +02:00
Philipp Jungkamp
44b5a12171 python: Rework Python Sample and Format interfaces 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-21 14:46:54 +02:00
Philipp Jungkamp
fabedbcc73 editorconfig: Cover more files. 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-21 14:46:54 +02:00
Philipp Jungkamp
c863089e4b packaging-nix: Add villas-python package 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-21 14:46:54 +02:00
Philipp Jungkamp
f9853f52c7 hook-digest: Add integration test 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
7623af56c7 hook-frame: Add integration test 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
25601efa54 hook-reorder_ts: Add integration test 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
54d3f51afb format-villas.human: Add NEW_FRAME flag to format 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
c49e339ad1 Don't overwrite sample flags during path sample muxing. 
Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
b70704f2d4 format-json: Include flags in serialization. 
Include the SampleFlags::NEW_FRAME and NEW_SIMULATION flags in the
JSON serialization of samples.

Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00
Philipp Jungkamp
043ff81eb5 Fix SampleFlags HAS_ALL and NEW_FRAME 
SampleFlags::HAS_ALL was not including the NEW_* style flags.
The NEW_SIMULATION flag is now independent from the NEW_FRAME flag,
since the dependency made checking that flag unnecessarily difficult.

Checking a composite flag like this

 if ((smp->flags & SampleFlags::NEW_SIMULATION) == SampleFlags::NEW_SIMULATION);

is more verbose than checking a simple flag like

 if (smp->flags & SampleFlags::NEW_SIMULATION);

Signed-off-by: Philipp Jungkamp <Philipp.Jungkamp@opal-rt.com>
 2023-09-19 19:07:22 +02:00