9b27c31b9c
fixup copyright texts
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693
relicense project to Apache 2.0
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The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
53ddbe4e10
refactor registration of IP core drivers to be aligned with registration of VILLASnode formats and node-types
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-05 14:21:20 +01:00
Pascal Bauer
c77d124682
fixed allocation order
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
a2b8b2942e
fixed memory leak (missing deletes before return)
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Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:35 +01:00
dee5b2d81f
update Steffens mail address
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-14 17:44:17 +01:00
fb824a82f9
cleanup of comments
2022-08-30 12:21:46 -04:00
e5545aa17e
emc: add initial code to flash FPGA bitstream via PCIe
2020-07-08 17:16:43 +02:00
08114652d6
emc: add stub IP
2020-07-08 15:20:05 +02:00
