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VILLASnode/etc/fpga
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Niklas Eiling 16b6a21512 fpga: make hwdef-parse.py correctly detect interrupt on zynq designs 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2025-01-24 10:32:57 +01:00
..
alveo-xbar-pcie fpga: add configurations for alveo FPGA 2024-03-14 16:07:45 +01:00
vc707-xbar-pcie fpga: update example jsons 2025-01-24 10:32:57 +01:00
vc707-xbar-pcie-dino fpga: update example jsons 2025-01-24 10:32:57 +01:00
zcu106-dino fpga: make hwdef-parse.py correctly detect interrupt on zynq designs 2025-01-24 10:32:57 +01:00
alveo.json fpga: add configurations for alveo FPGA 2024-03-14 16:07:45 +01:00
vc707.json fpga: update example jsons 2025-01-24 10:32:57 +01:00