mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
synced 2025-03-09 00:00:00 +01:00
353 lines
11 KiB
C++
353 lines
11 KiB
C++
/* Helper function for directly using VILLASfpga outside of VILLASnode
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*
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* Author: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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* SPDX-FileCopyrightText: 2022-2023 Steffen Vogel <post@steffenvogel.de>
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* SPDX-FileCopyrightText: 2022-2023 Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <csignal>
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#include <filesystem>
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#include <iostream>
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#include <jansson.h>
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#include <regex>
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#include <string>
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#include <vector>
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#include <rang.hpp>
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#include <villas/exceptions.hpp>
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#include <villas/log.hpp>
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#include <villas/utils.hpp>
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#include <villas/fpga/card.hpp>
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#include <villas/fpga/core.hpp>
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#include <villas/fpga/ips/aurora_xilinx.hpp>
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#include <villas/fpga/ips/dino.hpp>
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#include <villas/fpga/ips/dma.hpp>
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#include <villas/fpga/ips/rtds.hpp>
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#include <villas/fpga/utils.hpp>
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#include <villas/fpga/vlnv.hpp>
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using namespace villas;
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static auto logger = villas::Log::get("streamer");
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std::shared_ptr<std::vector<std::shared_ptr<fpga::ip::Node>>>
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fpga::getAuroraChannels(std::shared_ptr<fpga::Card> card) {
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auto aurora_channels =
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std::make_shared<std::vector<std::shared_ptr<fpga::ip::Node>>>();
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for (int i = 0; i < 4; i++) {
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auto name = fmt::format("aurora_aurora_8b10b_ch{}", i);
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auto id = fpga::ip::IpIdentifier("xilinx.com:ip:aurora_8b10b:", name);
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auto aurora = std::dynamic_pointer_cast<fpga::ip::Node>(card->lookupIp(id));
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if (aurora == nullptr) {
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logger->warn("No Aurora interface found on FPGA");
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break;
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}
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aurora_channels->push_back(aurora);
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}
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return aurora_channels;
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}
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fpga::ConnectString::ConnectString(std::string &connectString, int maxPortNum)
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: log(villas::Log::get("ConnectString")), maxPortNum(maxPortNum),
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bidirectional(false), invert(false), srcType(ConnectType::LOOPBACK),
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dstType(ConnectType::LOOPBACK), srcAsInt(-1), dstAsInt(-1) {
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parseString(connectString);
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}
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void fpga::ConnectString::parseString(std::string &connectString) {
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if (connectString.empty())
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return;
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if (connectString == "loopback") {
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logger->info("Connecting loopback");
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srcType = ConnectType::LOOPBACK;
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dstType = ConnectType::LOOPBACK;
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bidirectional = true;
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return;
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}
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static const std::regex regex("([0-9]+|stdin|stdout|pipe|dma|dino)([<\\->]+)("
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"[0-9]+|stdin|stdout|pipe|dma|dino)");
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std::smatch match;
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if (!std::regex_match(connectString, match, regex) || match.size() != 4) {
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logger->error("Invalid connect string: {}", connectString);
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throw std::runtime_error("Invalid connect string");
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}
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if (match[2] == "<->") {
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bidirectional = true;
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} else if (match[2] == "<-") {
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invert = true;
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}
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std::string srcStr = (invert ? match[3] : match[1]);
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std::string dstStr = (invert ? match[1] : match[3]);
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srcAsInt = portStringToInt(srcStr);
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dstAsInt = portStringToInt(dstStr);
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if (srcAsInt == -1) {
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if (srcStr == "dino") {
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srcType = ConnectType::DINO;
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} else if (srcStr == "dma" || srcStr == "pipe" || srcStr == "stdin" ||
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srcStr == "stdout") {
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srcType = ConnectType::DMA;
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} else {
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throw std::runtime_error("Invalid source type");
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}
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} else {
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srcType = ConnectType::AURORA;
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}
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if (dstAsInt == -1) {
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if (dstStr == "dino") {
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dstType = ConnectType::DINO;
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} else if (dstStr == "dma" || dstStr == "pipe" || dstStr == "stdin" ||
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dstStr == "stdout") {
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dstType = ConnectType::DMA;
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} else {
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throw std::runtime_error("Invalid destination type");
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}
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} else {
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dstType = ConnectType::AURORA;
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}
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}
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int fpga::ConnectString::portStringToInt(std::string &str) const {
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if (str == "stdin" || str == "stdout" || str == "pipe" || str == "dma" ||
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str == "dino") {
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return -1;
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} else {
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const int port = std::stoi(str);
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if (port > maxPortNum || port < 0)
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throw std::runtime_error("Invalid port number");
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return port;
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}
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}
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// parses a string like "1->2" or "1<->stdout" and configures the crossbar accordingly
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bool fpga::ConnectString::configCrossBar(
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std::shared_ptr<villas::fpga::Card> card) const {
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auto dma = std::dynamic_pointer_cast<fpga::ip::Dma>(
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card->lookupIp(fpga::Vlnv("xilinx.com:ip:axi_dma:")));
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if (dma == nullptr) {
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logger->error("No DMA found on FPGA ");
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return false;
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}
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if (isDmaLoopback()) {
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log->info("Configuring DMA loopback");
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dma->connectLoopback();
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return true;
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}
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auto aurora_channels = getAuroraChannels(card);
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auto dinoDac = std::dynamic_pointer_cast<fpga::ip::DinoDac>(
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card->lookupIp(fpga::Vlnv("xilinx.com:module_ref:dinoif_dac:")));
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if (dinoDac == nullptr) {
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logger->warn("No Dino DAC found on FPGA ");
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}
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auto dinoAdc = std::dynamic_pointer_cast<fpga::ip::DinoAdc>(
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card->lookupIp(fpga::Vlnv("xilinx.com:module_ref:dinoif_adc:")));
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if (dinoAdc == nullptr) {
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logger->warn("No Dino ADC found on FPGA ");
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}
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log->info("Connecting {} to {}, {}directional",
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(srcAsInt == -1 ? connectTypeToString(srcType)
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: std::to_string(srcAsInt)),
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(dstAsInt == -1 ? connectTypeToString(dstType)
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: std::to_string(dstAsInt)),
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(bidirectional ? "bi" : "uni"));
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std::shared_ptr<fpga::ip::Node> src;
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std::shared_ptr<fpga::ip::Node> dest;
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if (dinoAdc && srcType == ConnectType::DINO) {
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src = dinoAdc;
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} else if (dma && srcType == ConnectType::DMA) {
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src = dma;
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} else if (aurora_channels->size() > 0) {
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src = (*aurora_channels)[srcAsInt];
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} else {
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logger->error("No Aurora channels found on FPGA");
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return false;
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}
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if (!src) {
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logger->error("Source does not exist");
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return false;
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}
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if (dinoDac && dstType == ConnectType::DINO) {
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dest = dinoDac;
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} else if (dma && dstType == ConnectType::DMA) {
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dest = dma;
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} else if (aurora_channels->size() > 0) {
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dest = (*aurora_channels)[dstAsInt];
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} else {
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logger->error("No Aurora channels found on FPGA");
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return false;
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}
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if (!dest) {
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logger->error("Destination does not exist");
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return false;
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}
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src->connect(src->getDefaultMasterPort(), dest->getDefaultSlavePort());
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if (bidirectional) {
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if (dinoDac && srcType == ConnectType::DINO) {
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src = dinoDac;
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}
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if (dinoAdc && dstType == ConnectType::DINO) {
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dest = dinoAdc;
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}
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dest->connect(dest->getDefaultMasterPort(), src->getDefaultSlavePort());
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}
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return true;
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}
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void fpga::setupColorHandling() {
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// Handle Control-C nicely
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struct sigaction sigIntHandler;
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sigIntHandler.sa_handler = [](int) {
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std::cout << std::endl << rang::style::reset << rang::fgB::red;
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std::cout << "Control-C detected, exiting..." << rang::style::reset
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<< std::endl;
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std::exit(
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1); // Will call the correct exit func, no unwinding of the stack though
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};
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sigemptyset(&sigIntHandler.sa_mask);
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sigIntHandler.sa_flags = 0;
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sigaction(SIGINT, &sigIntHandler, nullptr);
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// Reset color if exiting not by signal
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std::atexit([]() { std::cout << rang::style::reset; });
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}
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std::shared_ptr<fpga::Card>
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fpga::createCard(json_t *config, const std::filesystem::path &searchPath,
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std::shared_ptr<kernel::vfio::Container> vfioContainer,
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std::string card_name) {
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auto configDir = std::filesystem::path().parent_path();
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const char *interfaceName;
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json_error_t err;
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logger->info("Found config for FPGA card {}", card_name);
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int ret =
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json_unpack_ex(config, &err, 0, "{s: s}", "interface", &interfaceName);
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if (ret) {
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throw ConfigError(config, err, "interface",
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"Failed to parse interface name for card {}", card_name);
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}
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std::string interfaceNameStr(interfaceName);
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if (interfaceNameStr == "pcie") {
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auto card = fpga::PCIeCardFactory::make(config, std::string(card_name),
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vfioContainer, searchPath);
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if (card) {
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return card;
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}
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return nullptr;
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} else if (interfaceNameStr == "platform") {
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throw RuntimeError("Platform interface not implemented yet");
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} else {
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throw RuntimeError("Unknown interface type {}", interfaceNameStr);
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}
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}
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int fpga::createCards(json_t *config,
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std::list<std::shared_ptr<fpga::Card>> &cards,
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const std::filesystem::path &searchPath,
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std::shared_ptr<kernel::vfio::Container> vfioContainer) {
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int numFpgas = 0;
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if (vfioContainer == nullptr) {
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vfioContainer = std::make_shared<kernel::vfio::Container>();
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}
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auto configDir = std::filesystem::path().parent_path();
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json_t *fpgas = json_object_get(config, "fpgas");
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if (fpgas == nullptr) {
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logger->info("No section 'fpgas' found in config");
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return 0;
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}
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const char *card_name;
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json_t *json_card;
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std::shared_ptr<fpga::Card> card;
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json_object_foreach(fpgas, card_name, json_card) {
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card = createCard(json_card, searchPath, vfioContainer, card_name);
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if (card != nullptr) {
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cards.push_back(card);
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numFpgas++;
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}
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}
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return numFpgas;
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}
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int fpga::createCards(json_t *config,
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std::list<std::shared_ptr<fpga::Card>> &cards,
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const std::string &searchPath,
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std::shared_ptr<kernel::vfio::Container> vfioContainer) {
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const auto fsPath = std::filesystem::path(searchPath);
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return createCards(config, cards, fsPath, vfioContainer);
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}
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std::shared_ptr<fpga::Card> fpga::setupFpgaCard(const std::string &configFile,
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const std::string &fpgaName) {
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auto configDir = std::filesystem::path(configFile).parent_path();
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// Parse FPGA configuration
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FILE *f = fopen(configFile.c_str(), "r");
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if (!f)
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throw RuntimeError("Cannot open config file: {}", configFile);
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json_t *json = json_loadf(f, 0, nullptr);
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if (!json) {
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logger->error("Cannot parse JSON config");
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fclose(f);
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throw RuntimeError("Cannot parse JSON config");
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}
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fclose(f);
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// Create all FPGA card instances using the corresponding plugin
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auto cards = std::list<std::shared_ptr<fpga::Card>>();
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createCards(json, cards, configDir);
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std::shared_ptr<fpga::Card> card = nullptr;
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for (auto &fpgaCard : cards) {
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if (fpgaCard->name == fpgaName) {
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card = fpgaCard;
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break;
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}
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}
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// Deallocate JSON config
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json_decref(json);
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if (!card) {
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throw RuntimeError("FPGA card {} not found in config or not working",
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fpgaName);
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}
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return card;
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}
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std::unique_ptr<fpga::BufferedSampleFormatter>
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fpga::getBufferedSampleFormatter(const std::string &format,
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size_t bufSizeInSamples) {
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if (format == "long") {
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return std::make_unique<fpga::BufferedSampleFormatterLong>(
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bufSizeInSamples);
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} else if (format == "short") {
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return std::make_unique<fpga::BufferedSampleFormatterShort>(
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bufSizeInSamples);
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} else {
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throw RuntimeError("Unknown output format '{}'", format);
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}
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}
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