mirror of
https://git.rwth-aachen.de/acs/public/villas/node/
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50 lines
No EOL
1 KiB
C
50 lines
No EOL
1 KiB
C
/** AXI Stream interconnect related helper functions
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*
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* These functions present a simpler interface to Xilinx' AXI Stream switch driver (XAxis_Switch_*)
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @copyright 2017, Steffen Vogel
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**********************************************************************************/
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/** @addtogroup fpga VILLASfpga
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* @{
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*/
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#pragma once
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#include <xilinx/xaxis_switch.h>
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#include "list.h"
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/* Forward declarations */
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struct ip;
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struct sw_path {
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const char *in;
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const char *out;
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};
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struct sw {
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XAxis_Switch inst;
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int num_ports;
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struct list paths;
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};
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struct ip;
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int switch_start(struct fpga_ip *c);
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/** Initialize paths which have been parsed by switch_parse() */
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int switch_init_paths(struct fpga_ip *c);
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int switch_destroy(struct fpga_ip *c);
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int switch_parse(struct fpga_ip *c);
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int switch_connect(struct fpga_ip *c, struct fpga_ip *mi, struct fpga_ip *si);
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int switch_disconnect(struct fpga_ip *c, struct fpga_ip *mi, struct fpga_ip *si);
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/** @} */ |