Daniel Krebs 89b5169a6e ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space ... This is used for translations that don't use VFIO which used to bridge the PCIe address space by creating direct mappings from process VA to the FPGA. When we want to communicate directly via PCIe without the involvment of the CPU/VFIO, we need the proper translations that are configured in the FPGA hardware.		2018-05-15 18:04:24 +02:00
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villas	ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space	2018-05-15 18:04:24 +02:00