Daniel Krebs 89b5169a6e ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space ... This is used for translations that don't use VFIO which used to bridge the PCIe address space by creating direct mappings from process VA to the FPGA. When we want to communicate directly via PCIe without the involvment of the CPU/VFIO, we need the proper translations that are configured in the FPGA hardware.		2018-05-15 18:04:24 +02:00
..
fpga	ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space	2018-05-15 18:04:24 +02:00
kernel	kernel/pci: parse BAR regions	2018-05-15 18:04:24 +02:00
common.h	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
config.h	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
directed_graph.hpp	directed-graph: add dumping to dot-file (graphviz)	2018-05-15 18:04:24 +02:00
list.h	lib/card: copy C->C++ and just make it compile	2018-01-10 11:02:08 +01:00
log.h	simple renames to not use reserved names	2018-01-10 11:02:08 +01:00
log.hpp	log: provide more macros for text colors	2018-01-23 14:42:26 +01:00
log_config.h	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
memory.hpp	common/memory: add host DMA memory allocator using udmabuf	2018-05-15 18:04:24 +02:00
memory_manager.hpp	common/memory: expose method to dump memory graph to file	2018-05-15 18:04:24 +02:00
plugin.hpp	logging: use similar log style in all modules	2018-01-31 20:24:11 +01:00
utils.h	utils: read_random() now returns the number of bytes written	2018-03-26 16:17:26 +02:00
utils.hpp	common/memory: add check-callback to getPath() to select desired path	2018-05-15 18:04:24 +02:00