vphy: gt: Modified CDR configuration.
For: - GTHE3 (DisplayPort), and - GTHE2. Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com> Acked-by: Srikanth Vemula <svemula@xilinx.com>
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2 changed files with 15 additions and 21 deletions
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@ -169,6 +169,7 @@ const XVphy_GtConfig Gthe2Config = {
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u32 XVphy_Gthe2CfgSetCdr(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId)
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{
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XVphy_Channel *ChPtr;
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u32 PllClkInFreqHz;
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/* Set CDR values only for CPLLs. */
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if ((ChId < XVPHY_CHANNEL_ID_CH1) || (ChId > XVPHY_CHANNEL_ID_CH4)) {
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@ -176,22 +177,20 @@ u32 XVphy_Gthe2CfgSetCdr(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId)
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}
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ChPtr = &InstancePtr->Quads[QuadId].Plls[XVPHY_CH2IDX(ChId)];
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PllClkInFreqHz = XVphy_GetQuadRefClkFreq(InstancePtr, QuadId,
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ChPtr->CpllRefClkSel);
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/* Update the RXCDR_CFG2 settings. */
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ChPtr->PllParams.Cdr[0] = 0x0020;
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ChPtr->PllParams.Cdr[1] = 0x07FE;
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ChPtr->PllParams.Cdr[3] = (ChPtr->RxOutDiv == 1) ? 0xC208 : 0xC220;
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ChPtr->PllParams.Cdr[4] = 0x0018;
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/* RxOutDiv = 1 => Cdr[2] = 0x2000
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* RxOutDiv = 2 => Cdr[2] = 0x1000
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* RxOutDiv = 4 => Cdr[2] = 0x0800
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* RxOutDiv = 8 => Cdr[2] = 0x0400 */
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u8 RxOutDiv = ChPtr->RxOutDiv;
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ChPtr->PllParams.Cdr[2] = 0x2000;
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while (RxOutDiv >>= 1) {
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ChPtr->PllParams.Cdr[2] >>= 1;
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ChPtr->PllParams.Cdr[0] = 0x0018;
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if (PllClkInFreqHz == 270000000) {
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ChPtr->PllParams.Cdr[1] = 0xC208;
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}
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else {
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ChPtr->PllParams.Cdr[1] = 0xC220;
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}
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ChPtr->PllParams.Cdr[2] = 0x1000;
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ChPtr->PllParams.Cdr[3] = 0x07FE;
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ChPtr->PllParams.Cdr[4] = 0x0020;
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return XST_SUCCESS;
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}
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@ -183,20 +183,15 @@ u32 XVphy_Gthe3CfgSetCdr(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId)
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if (InstancePtr->Config.RxProtocol == XVPHY_PROTOCOL_DP) {
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PllClkInFreqHz = XVphy_GetQuadRefClkFreq(InstancePtr, QuadId,
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ChPtr->CpllRefClkSel);
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if ((ChPtr->RxOutDiv == 1) && (PllClkInFreqHz == 270000000)) {
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if (PllClkInFreqHz == 270000000) {
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ChPtr->PllParams.Cdr[2] = 0x0766;
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}
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else if ((ChPtr->RxOutDiv == 2) &&
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(PllClkInFreqHz == 135000000)) {
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else if (PllClkInFreqHz == 135000000) {
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ChPtr->PllParams.Cdr[2] = 0x0756;
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}
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/* RBR does not use DP159 forwarded clock and expects 162MHz. */
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else if (ChPtr->RxOutDiv == 2) {
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ChPtr->PllParams.Cdr[2] = 0x0721;
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}
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else {
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Status = XST_FAILURE;
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ChPtr->PllParams.Cdr[2] = 0x0721;
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}
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}
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else if (InstancePtr->Config.RxProtocol == XVPHY_PROTOCOL_HDMI) {
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