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sdps: Enabled the bus power before clock enable.

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This patch enable the bus power before enabling the clock.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This commit is contained in:
P L Sai Krishna 2015-02-09 20:08:07 +05:30 • committed by Nava kishore Manne
parent f82bf4368e
commit 106014c75a
1 changed files with 7 additions and 7 deletions
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14
XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
View file

@ -166,6 +166,13 @@ int XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
InstancePtr->Host_Caps = XSdPs_ReadReg(InstancePtr->Config.BaseAddress,
XSDPS_CAPS_OFFSET);
/*
* Select voltage and enable bus power.
*/
XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
XSDPS_POWER_CTRL_OFFSET,
XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK);
/*
* Change the clock frequency to 400 KHz
*/
@ -175,13 +182,6 @@ int XSdPs_CfgInitialize(XSdPs *InstancePtr, XSdPs_Config *ConfigPtr,
goto RETURN_PATH ;
}
/*
* Select voltage and enable bus power.
*/
XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
XSDPS_POWER_CTRL_OFFSET,
XSDPS_PC_BUS_VSEL_3V3_MASK | XSDPS_PC_BUS_PWR_MASK);
XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
XSDPS_HOST_CTRL1_OFFSET,
XSDPS_HC_DMA_ADMA2_32_MASK);