dp: Unified naming of xdptx and xdprx to xdp.
As per Xilinx standalone coding guidelines. Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
parent
c1f33ddd8f
commit
1a280fdfc7
29 changed files with 5943 additions and 6433 deletions
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@ -1,7 +1,7 @@
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xdprx_intr_timer_example.c=xdprx_intr_timer_example.c
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xdptx_audio_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdptx_intr_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdptx_mst_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdptx_poll_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdptx_selftest_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdptx_timer_example.c=xdptx_example_common.h,xdptx_example_common.c
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xdp_selftest_example.c=xdp_selftest_example.c
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xdp_rx_intr_timer_example.c=xdp_rx_intr_timer_example.c
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xdp_tx_audio_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_intr_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_mst_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_poll_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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xdp_tx_timer_example.c=xdp_tx_example_common.h,xdp_tx_example_common.c
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@ -10,13 +10,13 @@
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<h1> Example applications for the dp driver. </h1>
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<HR>
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<ul>
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<li>xdprx_intr_timer_example.c <a href="xdprx_intr_timer_example.c">(source)</a> </li>
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<li>xdptx_audio_example.c <a href="xdptx_audio_example.c">(source)</a> </li>
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<li>xdptx_intr_example.c <a href="xdptx_intr_example.c">(source)</a> </li>
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<li>xdptx_mst_example.c <a href="xdptx_mst_example.c">(source)</a> </li>
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<li>xdptx_poll_example.c <a href="xdptx_poll_example.c">(source)</a> </li>
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<li>xdptx_selftest_example.c <a href="xdptx_selftest_example.c">(source)</a> </li>
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<li>xdptx_timer_example.c <a href="xdptx_timer_example.c">(source)</a> </li>
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<li>xdp_selftest_example.c <a href="xdptx_selftest_example.c">(source)</a> </li>
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<li>xdp_rx_intr_timer_example.c <a href="xdprx_intr_timer_example.c">(source)</a> </li>
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<li>xdp_tx_audio_example.c <a href="xdptx_audio_example.c">(source)</a> </li>
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<li>xdp_tx_intr_example.c <a href="xdptx_intr_example.c">(source)</a> </li>
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<li>xdp_tx_mst_example.c <a href="xdptx_mst_example.c">(source)</a> </li>
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<li>xdp_tx_poll_example.c <a href="xdptx_poll_example.c">(source)</a> </li>
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<li>xdp_tx_timer_example.c <a href="xdptx_timer_example.c">(source)</a> </li>
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</ul>
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<p><font face="Times New Roman" color="#800000">Copyright © 1995-2015 Xilinx, Inc. All rights reserved.</font></p>
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</body>
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@ -1,5 +1,5 @@
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There is 1 DisplayPort RX example included in this directory:
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1) xdprx_intr_timer_example.c : This interrupt with timer example shows how to
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1) xdp_rx_intr_timer_example.c : This interrupt with timer example shows how to
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set up both the interrupt system with interrupt handlers and how to override
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the default sleep/delay functionality for MicroBlaze. A timer needs to exist
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in the hardware system and will be used for sleep/delay functionality inside
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built-in.
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Note: All example functions start with Dprx_*, while all driver functions start
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with XDprx_*.
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with XDp_*.
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There are 6 DisplayPort TX examples included in this directory:
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1) xdptx_audio_example.c : This audio example, apart from training the main link
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and outputting video, illustrates the sequence required for setting up audio
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in the DisplayPort TX. This example requires that an audio source, such as a
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S/PDIF instance be present and connected to the DisplayPort TX in the
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1) xdp_tx_audio_example.c : This audio example, apart from training the main
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link and outputting video, illustrates the sequence required for setting up
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audio in the DisplayPort TX. This example requires that an audio source, such
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as a S/PDIF instance be present and connected to the DisplayPort TX in the
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hardware system, and for the audio enable configuration parameter to be set
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for the instantiated DisplayPort TX. For audio to output, the user will need
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to implement the following functions:
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b) Dptx_AudioSendInfoFrame : This function needs to set up and write an audio
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info frame as per user requirements.
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2) xdptx_intr_example.c : This interrupt example shows how to set up the
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2) xdp_tx_intr_example.c : This interrupt example shows how to set up the
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interrupt system and specify the interrupt handlers for when a DisplayPort
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interrupt event occurs. An interrupt controller with a connection to the
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DisplayPort interrupt signal needs to exist in the hardware system.
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3) xdptx_mst_example.c : This multi-stream transport (MST) example shows how to
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3) xdp_tx_mst_example.c : This multi-stream transport (MST) example shows how to
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use the driver's MST capabilities. Streams can be directed at sinks using two
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methods:
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a) After topology discover has created a sink list, streams may be assigned
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discovery if their relative addresses (and total number of DisplayPort
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links) from the DisplayPort source is known beforehand.
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4) xdptx_poll_example.c : This interrupt example shows how to poll the
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4) xdp_tx_poll_example.c : This interrupt example shows how to poll the
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DisplayPort TX instance's registers for DisplayPort interrupt events.
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5) xdptx_timer_example.c : This timer example shows how to override the default
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5) xdp_tx_timer_example.c : This timer example shows how to override the default
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sleep/delay functionality for MicroBlaze. A timer needs to exist in the
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hardware system and will be used for sleep/delay functionality inside of a
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callback function. The default behavior in MicroBlaze for sleep/delay is to
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For ARM/Zynq SoC systems, the supplied callback function will be ignored -
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the usleep function will be called since the SoC has a timer built-in.
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6) xdptx_selftest_example.c : This self test example will perform a sanity check
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on the state of the DisplayPort TX instance. It may be called prior to usage
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of the core or after a reset to ensure that (a subset of) the registers hold
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their default values.
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6) xdp_tx_selftest_example.c : This self test example will perform a sanity
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check on the state of the DisplayPort TX instance. It may be called prior to
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usage of the core or after a reset to ensure that (a subset of) the registers
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hold their default values.
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Each of these examples are meant to be used in conjunction with
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xdptx_example_common.[ch] which holds common functionality for all examples.
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xdp_tx_example_common.[ch] which holds common functionality for all examples.
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After importing the examples, these files will need to be manually copied into
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the example src/ directory.
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This code shows how to train the main link and set up a video stream.
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timings and video attributes that correspond to the main stream attributes
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(MSA) configuration, is received by the DisplayPort Tx. The examples call
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this function from the Dptx_Run->Dptx_StartVideoStream functions in
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xdptx_example_common.c.
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xdp_tx_example_common.c.
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Note: All example functions start with Dptx_*, while all driver functions start
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with XDptx_*.
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with XDp_*.
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/******************************************************************************/
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/**
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*
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* @file xdprx_intr_timer_example.c
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* @file xdp_rx_intr_timer_example.c
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*
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* Contains a design example using the XDprx driver with a user-defined hook
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* Contains a design example using the XDp driver with a user-defined hook
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* for delay. The reasoning behind this is that MicroBlaze sleep is not very
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* accurate without a hardware timer. For systems that have a hardware timer,
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* the user may override the default MicroBlaze sleep with a function that will
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* This example will print out the detected resolution of the incoming
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* DisplayPort video stream.
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* This example is meant to take in the incoming DisplayPort video stream and
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* output it over HDMI (pass-through).
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* pass it through using the Dprd_Vidpipe* functions which are left for the user
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* to implement.
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*
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* @note This example requires an AXI timer in the system.
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* @note For this example to work, the user will need to implement
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/******************************* Include Files ********************************/
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#include "xdprx.h"
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#include "xdp.h"
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#include "xparameters.h"
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#ifdef XPAR_INTC_0_DEVICE_ID
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/* For MicroBlaze systems. */
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/**************************** Function Prototypes *****************************/
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u32 Dprx_IntrTimerExample(XDprx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u32 Dprx_IntrTimerExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId, XTmrCtr *TimerCounterPtr);
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static u32 Dprx_SetupExample(XDprx *InstancePtr, u16 DeviceId);
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static u32 Dprx_SetupInterruptHandler(XDprx *InstancePtr, INTC *IntcPtr,
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static u32 Dprx_SetupExample(XDp *InstancePtr, u16 DeviceId);
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static u32 Dprx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId);
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static void Dprx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds);
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static void Dprx_ResetVideoOutput(void *InstancePtr);
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static void Dprx_InterruptHandlerTp2(void *InstancePtr);
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static void Dprx_InterruptHandlerTp3(void *InstancePtr);
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extern void Dprx_VidpipeConfig(XDprx *InstancePtr);
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extern void Dprx_VidpipeConfig(XDp *InstancePtr);
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extern void Dprx_VidpipeReset(void);
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/*************************** Variable Declarations ****************************/
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XDprx DprxInstance; /* The Dprx instance. */
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XDp DpInstance; /* The Dp instance. */
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INTC IntcInstance; /* The interrupt controller instance. */
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XTmrCtr TimerCounterInst; /* The timer counter instance. */
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/******************************************************************************/
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/**
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* This function is the main function of the XDprx interrupt with timer example.
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* If the DprxIntrTimerExample function, which sets up the system succeeds, this
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* function will wait for interrupts.
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* This function is the main function of the XDp (operating in RX mode)
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* interrupt with timer example. If the Dprx_IntrTimerExample function, which
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* sets up the system succeeds, this function will wait for interrupts.
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*
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* @param None.
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*
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* setup failed.
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*
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* @note Unless setup failed, main will never return since
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* DprxIntrTimerExample is blocking.
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* Dprx_IntrTimerExample is blocking.
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*
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*******************************************************************************/
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int main(void)
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{
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u32 Status;
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/* Run the XDprx timer example. */
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Status = Dprx_IntrTimerExample(&DprxInstance, DPRX_DEVICE_ID,
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/* Run the XDp (in RX mode) interrupt with timer example. */
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Status = Dprx_IntrTimerExample(&DpInstance, DPRX_DEVICE_ID,
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&IntcInstance, INTC_DEVICE_ID, DP_INTERRUPT_ID,
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&TimerCounterInst);
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if (Status != XST_SUCCESS) {
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/******************************************************************************/
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/**
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* The main entry point for the interrupt with timer example using the XDprx
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* The main entry point for the interrupt with timer example using the XDp
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* driver. This function will set up the system, interrupt controller and
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* interrupt handlers, and the custom sleep handler.
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*
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* @param InstancePtr is a pointer to the XDprx instance.
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* @param InstancePtr is a pointer to the XDp instance.
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* @param DeviceId is the unique device ID of the DisplayPort RX core
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* instance.
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* @param IntcPtr is a pointer to the interrupt instance.
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* @note None.
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*
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*******************************************************************************/
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u32 Dprx_IntrTimerExample(XDprx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u32 Dprx_IntrTimerExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId, XTmrCtr *TimerCounterPtr)
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{
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u32 Status;
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* Note: This only has an affect for MicroBlaze systems since the Zynq
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* ARM SoC contains a timer, which is used when the driver calls the
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* delay function. */
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XDprx_SetUserTimerHandler(InstancePtr, &Dprx_CustomWaitUs,
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XDp_SetUserTimerHandler(InstancePtr, &Dprx_CustomWaitUs,
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TimerCounterPtr);
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/* Setup interrupt handling in the system. */
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* configuration parameters will be retrieved based on the configuration
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* to the DisplayPort RX core instance with the specified device ID.
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*
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* @param InstancePtr is a pointer to the XDprx instance.
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* @param InstancePtr is a pointer to the XDp instance.
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* @param DeviceId is the unique device ID of the DisplayPort RX core
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* instance.
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*
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* @note None.
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*
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*******************************************************************************/
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static u32 Dprx_SetupExample(XDprx *InstancePtr, u16 DeviceId)
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static u32 Dprx_SetupExample(XDp *InstancePtr, u16 DeviceId)
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{
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XDp_Config *ConfigPtr;
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u32 Status;
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}
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/* Copy the device configuration into the InstancePtr's Config
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* structure. */
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XDprx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
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XDp_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
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XDprx_SetLaneCount(InstancePtr, InstancePtr->Config.MaxLaneCount);
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XDprx_SetLinkRate(InstancePtr, InstancePtr->Config.MaxLinkRate);
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XDp_RxSetLaneCount(InstancePtr, InstancePtr->Config.MaxLaneCount);
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XDp_RxSetLinkRate(InstancePtr, InstancePtr->Config.MaxLinkRate);
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/* Initialize the DisplayPort RX core. */
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Status = XDprx_InitializeRx(InstancePtr);
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Status = XDp_Initialize(InstancePtr);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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* to the processor. The user should modify this function to fit the
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* application.
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*
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* @param InstancePtr is a pointer to the XDprx instance.
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* @param InstancePtr is a pointer to the XDp instance.
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* @param IntcPtr is a pointer to the interrupt instance.
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* @param IntrId is the unique device ID of the interrupt controller.
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* @param DpIntrId is the interrupt ID of the DisplayPort RX connection to
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* to the processor and the DisplayPort RX core.
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*
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*******************************************************************************/
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static u32 Dprx_SetupInterruptHandler(XDprx *InstancePtr, INTC *IntcPtr,
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static u32 Dprx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
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u16 IntrId, u16 DpIntrId)
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{
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u32 Status;
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/* Set the HPD interrupt handlers. */
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XDprx_SetIntrVmChangeHandler(InstancePtr,
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XDp_RxSetIntrVmChangeHandler(InstancePtr,
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Dprx_InterruptHandlerVmChange, InstancePtr);
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XDprx_SetIntrPowerStateHandler(InstancePtr,
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XDp_RxSetIntrPowerStateHandler(InstancePtr,
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Dprx_InterruptHandlerPowerState, InstancePtr);
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XDprx_SetIntrNoVideoHandler(InstancePtr,
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XDp_RxSetIntrNoVideoHandler(InstancePtr,
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Dprx_InterruptHandlerNoVideo, InstancePtr);
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XDprx_SetIntrVBlankHandler(InstancePtr,
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XDp_RxSetIntrVBlankHandler(InstancePtr,
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Dprx_InterruptHandlerVBlank, InstancePtr);
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XDprx_SetIntrTrainingLostHandler(InstancePtr,
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XDp_RxSetIntrTrainingLostHandler(InstancePtr,
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Dprx_InterruptHandlerTrainingLost, InstancePtr);
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XDprx_SetIntrVideoHandler(InstancePtr,
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XDp_RxSetIntrVideoHandler(InstancePtr,
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Dprx_InterruptHandlerVideo, InstancePtr);
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XDprx_SetIntrTrainingDoneHandler(InstancePtr,
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XDp_RxSetIntrTrainingDoneHandler(InstancePtr,
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Dprx_InterruptHandlerTrainingDone, InstancePtr);
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XDprx_SetIntrBwChangeHandler(InstancePtr,
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XDp_RxSetIntrBwChangeHandler(InstancePtr,
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Dprx_InterruptHandlerBwChange, InstancePtr);
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XDprx_SetIntrTp1Handler(InstancePtr,
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XDp_RxSetIntrTp1Handler(InstancePtr,
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Dprx_InterruptHandlerTp1, InstancePtr);
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XDprx_SetIntrTp2Handler(InstancePtr,
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XDp_RxSetIntrTp2Handler(InstancePtr,
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Dprx_InterruptHandlerTp2, InstancePtr);
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XDprx_SetIntrTp3Handler(InstancePtr,
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XDp_RxSetIntrTp3Handler(InstancePtr,
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Dprx_InterruptHandlerTp3, InstancePtr);
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/* Initialize interrupt controller driver. */
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* the specific interrupt processing for the device. */
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#ifdef XPAR_INTC_0_DEVICE_ID
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Status = XIntc_Connect(IntcPtr, DpIntrId,
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(XInterruptHandler)XDprx_InterruptHandler, InstancePtr);
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(XInterruptHandler)XDp_InterruptHandler, InstancePtr);
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#else
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Status = XScuGic_Connect(IntcPtr, DpIntrId,
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(Xil_InterruptHandler)XDprx_InterruptHandler, InstancePtr);
|
||||
(Xil_InterruptHandler)XDp_InterruptHandler, InstancePtr);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
|
@ -388,43 +389,43 @@ static u32 Dprx_SetupInterruptHandler(XDprx *InstancePtr, INTC *IntcPtr,
|
|||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to override the driver's default sleep functionality.
|
||||
* For MicroBlaze systems, the XDprx_WaitUs driver function's default behavior
|
||||
* For MicroBlaze systems, the XDp_WaitUs driver function's default behavior
|
||||
* is to use the MB_Sleep function from microblaze_sleep.h, which is implemented
|
||||
* in software and only has millisecond accuracy. For this reason, using a
|
||||
* hardware timer is preferrable. For ARM/Zynq SoC systems, the SoC's timer is
|
||||
* used - XDprx_WaitUs will ignore this custom timer handler.
|
||||
* used - XDp_WaitUs will ignore this custom timer handler.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDprx_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDprx_WaitUs driver
|
||||
* @note Use the XDp_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDp_WaitUs driver
|
||||
* function is called.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dprx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds)
|
||||
{
|
||||
XDprx *XDprx_InstancePtr = (XDprx *)InstancePtr;
|
||||
XDp *XDp_InstancePtr = (XDp *)InstancePtr;
|
||||
u32 TimerVal;
|
||||
|
||||
XTmrCtr_Start(XDprx_InstancePtr->UserTimerPtr, 0);
|
||||
XTmrCtr_Start(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
|
||||
/* Wait specified number of useconds. */
|
||||
do {
|
||||
TimerVal = XTmrCtr_GetValue(XDprx_InstancePtr->UserTimerPtr, 0);
|
||||
TimerVal = XTmrCtr_GetValue(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
while (TimerVal < (MicroSeconds *
|
||||
(XDprx_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
(XDp_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
|
||||
XTmrCtr_Stop(XDprx_InstancePtr->UserTimerPtr, 0);
|
||||
XTmrCtr_Stop(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to reset video output for this example.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -434,7 +435,7 @@ static void Dprx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds)
|
|||
static void Dprx_ResetVideoOutput(void *InstancePtr)
|
||||
{
|
||||
xil_printf("\tDisabling the display timing generator.\n");
|
||||
XDprx_DtgDis(InstancePtr);
|
||||
XDp_RxDtgDis(InstancePtr);
|
||||
|
||||
xil_printf("\tResetting the video output pipeline.\n");
|
||||
/* This is hardware system specific - it is up to the user to implement
|
||||
|
@ -449,14 +450,14 @@ static void Dprx_ResetVideoOutput(void *InstancePtr)
|
|||
/*******************/
|
||||
|
||||
xil_printf("\tRe-enabling the display timing generator.\n");
|
||||
XDprx_DtgEn(InstancePtr);
|
||||
XDp_RxDtgEn(InstancePtr);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function will present the resolution of the incoming video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -470,12 +471,12 @@ static void Dprx_DetectResolution(void *InstancePtr)
|
|||
u32 GetResCount = 0;
|
||||
|
||||
do {
|
||||
DpHres = (XDprx_ReadReg(((XDprx *)InstancePtr)->Config.BaseAddr,
|
||||
XDPRX_MSA_HRES));
|
||||
DpVres = (XDprx_ReadReg(((XDprx *)InstancePtr)->Config.BaseAddr,
|
||||
XDPRX_MSA_VHEIGHT));
|
||||
DpHres = (XDp_ReadReg(((XDp *)InstancePtr)->Config.BaseAddr,
|
||||
XDP_RX_MSA_HRES));
|
||||
DpVres = (XDp_ReadReg(((XDp *)InstancePtr)->Config.BaseAddr,
|
||||
XDP_RX_MSA_VHEIGHT));
|
||||
GetResCount++;
|
||||
XDprx_WaitUs(InstancePtr, 1000);
|
||||
XDp_WaitUs(InstancePtr, 1000);
|
||||
} while (((DpHres == 0) || (DpVres == 0)) && (GetResCount < 2000));
|
||||
|
||||
xil_printf("\n*** Detected resolution: %d x %d ***\n", DpHres, DpVres);
|
||||
|
@ -486,7 +487,7 @@ static void Dprx_DetectResolution(void *InstancePtr)
|
|||
* This function is the callback function for when a video mode chang interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -499,7 +500,7 @@ static void Dprx_InterruptHandlerVmChange(void *InstancePtr)
|
|||
|
||||
xil_printf("> Interrupt: video mode change.\n");
|
||||
|
||||
Status = XDprx_CheckLinkStatus(InstancePtr);
|
||||
Status = XDp_RxCheckLinkStatus(InstancePtr);
|
||||
if ((Status == XST_SUCCESS) && (VBlankCount >= 20)) {
|
||||
Dprx_ResetVideoOutput(InstancePtr);
|
||||
Dprx_DetectResolution(InstancePtr);
|
||||
|
@ -511,7 +512,7 @@ static void Dprx_InterruptHandlerVmChange(void *InstancePtr)
|
|||
* This function is the callback function for when the power state interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -527,7 +528,7 @@ static void Dprx_InterruptHandlerPowerState(void *InstancePtr)
|
|||
/**
|
||||
* This function is the callback function for when a no video interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -545,7 +546,7 @@ static void Dprx_InterruptHandlerNoVideo(void *InstancePtr)
|
|||
* This function is the callback function for when a vertical blanking interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -566,10 +567,10 @@ static void Dprx_InterruptHandlerVBlank(void *InstancePtr)
|
|||
* outputting any video stream. */
|
||||
if (VBlankCount >= 20) {
|
||||
VBlankEnable = 0;
|
||||
XDprx_InterruptDisable(InstancePtr,
|
||||
XDPRX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
XDp_RxInterruptDisable(InstancePtr,
|
||||
XDP_RX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
|
||||
Status = XDprx_CheckLinkStatus(InstancePtr);
|
||||
Status = XDp_RxCheckLinkStatus(InstancePtr);
|
||||
if (Status == XST_SUCCESS) {
|
||||
Dprx_ResetVideoOutput(InstancePtr);
|
||||
Dprx_DetectResolution(InstancePtr);
|
||||
|
@ -583,7 +584,7 @@ static void Dprx_InterruptHandlerVBlank(void *InstancePtr)
|
|||
* This function is the callback function for when a training lost interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -596,11 +597,11 @@ static void Dprx_InterruptHandlerTrainingLost(void *InstancePtr)
|
|||
|
||||
/* Re-enable vertical blanking interrupt and counter. */
|
||||
VBlankEnable = 1;
|
||||
XDprx_InterruptEnable(InstancePtr, XDPRX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
XDp_RxInterruptEnable(InstancePtr, XDP_RX_INTERRUPT_MASK_VBLANK_MASK);
|
||||
VBlankCount = 0;
|
||||
|
||||
xil_printf("\tDisabling the display timing generator.\n");
|
||||
XDprx_DtgDis(InstancePtr);
|
||||
XDp_RxDtgDis(InstancePtr);
|
||||
xil_printf("\tResetting the video output pipeline.\n");
|
||||
/* This is hardware system specific - it is up to the user to implement
|
||||
* this function if needed. */
|
||||
|
@ -613,7 +614,7 @@ static void Dprx_InterruptHandlerTrainingLost(void *InstancePtr)
|
|||
* This function is the callback function for when a valid video interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -631,7 +632,7 @@ static void Dprx_InterruptHandlerVideo(void *InstancePtr)
|
|||
* This function is the callback function for when a training done interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -648,7 +649,7 @@ static void Dprx_InterruptHandlerTrainingDone(void *InstancePtr)
|
|||
* This function is the callback function for when a bandwidth change interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -665,7 +666,7 @@ static void Dprx_InterruptHandlerBwChange(void *InstancePtr)
|
|||
* This function is the callback function for when a training pattern 1
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -682,7 +683,7 @@ static void Dprx_InterruptHandlerTp1(void *InstancePtr)
|
|||
* This function is the callback function for when a training pattern 2
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -699,7 +700,7 @@ static void Dprx_InterruptHandlerTp2(void *InstancePtr)
|
|||
* This function is the callback function for when a training pattern 3
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
|
@ -32,10 +32,10 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_selftest_example.c
|
||||
* @file xdp_selftest_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core that will compare many of the DisplayPort TX core's
|
||||
* Contains a design example using the XDp driver. It performs a self test on
|
||||
* the DisplayPort TX/RX core that will compare many of the DisplayPort core's
|
||||
* registers against their default reset values.
|
||||
*
|
||||
* @note None.
|
||||
|
@ -45,24 +45,33 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
#define DP_DEVICE_ID XPAR_DISPLAYPORT_0_DEVICE_ID
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_SelfTestExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
u32 Dp_SelfTestExample(XDp *InstancePtr, u16 DeviceId);
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
||||
XDp DpInstance;
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx selftest example.
|
||||
* This function is the main function of the XDp selftest example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
|
@ -79,23 +88,23 @@ int main(void)
|
|||
{
|
||||
u32 Status;
|
||||
|
||||
Status = Dptx_SelfTestExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
Status = Dp_SelfTestExample(&DpInstance, DP_DEVICE_ID);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("XDptx_SelfTest failed, check register values.\n");
|
||||
xil_printf("XDp_SelfTest failed, check register values.\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
xil_printf("XDptx_SelfTest passed.\n");
|
||||
xil_printf("XDp_SelfTest passed.\n");
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the selftest example using the XDptx driver. This
|
||||
* The main entry point for the selftest example using the XDp driver. This
|
||||
* function will check whether or not the DisplayPort TX's registers are at
|
||||
* their default reset values to ensure that the core is in a known and working
|
||||
* state.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -108,21 +117,21 @@ int main(void)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_SelfTestExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
u32 Dp_SelfTestExample(XDp *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
XDptx_Config *ConfigPtr;
|
||||
XDp_Config *ConfigPtr;
|
||||
|
||||
/* Obtain the device configuration for the DisplayPort TX core. */
|
||||
ConfigPtr = XDptx_LookupConfig(DeviceId);
|
||||
ConfigPtr = XDp_LookupConfig(DeviceId);
|
||||
if (!ConfigPtr) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
/* Copy the device configuration into the InstancePtr's Config
|
||||
* structure. */
|
||||
XDptx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
XDp_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
|
||||
/* Run the self test. */
|
||||
Status = XDptx_SelfTest(InstancePtr);
|
||||
Status = XDp_SelfTest(InstancePtr);
|
||||
return Status;
|
||||
}
|
|
@ -32,11 +32,11 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_audio_example.c
|
||||
* @file xdp_tx_audio_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver to train the main link and
|
||||
* to display video. In this example application, the sequence to enable audio
|
||||
* is illustrated.
|
||||
* Contains a design example using the XDp driver (operating in TX mode) to
|
||||
* train the main link and to display video. In this example application, the
|
||||
* sequence to enable audio is illustrated.
|
||||
*
|
||||
* @note This example requires an audio source such as an S/PDIF instance
|
||||
* to be part of the hardware system. See XAPP1178 for reference.
|
||||
|
@ -52,10 +52,10 @@
|
|||
* @note For this example to display output, after training is complete,
|
||||
* the user will need to implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* input (Dptx_StreamSrc* - called in xdp_tx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* extern in xdp_tx_example_common.h and are left up to the user to
|
||||
* implement. The functions Dptx_ConfigureAudioSrc and
|
||||
* Dptx_AudioSendInfoFrame are present in this file and are also
|
||||
* left for the user to implement.
|
||||
|
@ -65,27 +65,27 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 07/29/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_AudioInit(XDptx *InstancePtr);
|
||||
static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr);
|
||||
static void Dptx_AudioSendInfoFrame(XDptx *InstancePtr);
|
||||
u32 Dptx_AudioExample(XDp *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_AudioInit(XDp *InstancePtr);
|
||||
static void Dptx_ConfigureAudioSrc(XDp *InstancePtr);
|
||||
static void Dptx_AudioSendInfoFrame(XDp *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx audio example.
|
||||
* This function is the main function of the XDp audio example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
|
@ -100,8 +100,8 @@ int main(void)
|
|||
{
|
||||
u32 Status;
|
||||
|
||||
/* Run the XDptx audio example. */
|
||||
Status = Dptx_AudioExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
/* Run the XDp audio example. */
|
||||
Status = Dptx_AudioExample(&DpInstance, DPTX_DEVICE_ID);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
@ -111,11 +111,11 @@ int main(void)
|
|||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the audio example using the XDptx driver. This
|
||||
* The main entry point for the audio example using the XDp driver. This
|
||||
* function will set up audio, initiate link training, and a video stream will
|
||||
* start being sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -127,13 +127,13 @@ int main(void)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
u32 Dptx_AudioExample(XDp *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. Audio is
|
||||
* not supported in multi-stream transport (MST) mode. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
XDp_TxMstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
|
@ -148,8 +148,8 @@ u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
/* Initialize DisplayPort audio. */
|
||||
Dptx_AudioInit(InstancePtr);
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
XDp_TxEnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDp_TxSetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A sink monitor must be connected at this point. See the polling or
|
||||
* interrupt examples for how to wait for a connection event. */
|
||||
|
@ -167,7 +167,7 @@ u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
* to implement configuration of the audio stream and, if needed, sending of
|
||||
* the info frame.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -176,7 +176,7 @@ u32 Dptx_AudioExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
* initialization.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_AudioInit(XDptx *InstancePtr)
|
||||
static void Dptx_AudioInit(XDp *InstancePtr)
|
||||
{
|
||||
u32 Fs;
|
||||
u32 MAud;
|
||||
|
@ -185,8 +185,7 @@ static void Dptx_AudioInit(XDptx *InstancePtr)
|
|||
|
||||
/* Disable audio in the DisplayPort TX. This will also flush the buffers
|
||||
* in the DisplayPort TX and set MUTE bit in VB-ID. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CONTROL,
|
||||
0x0);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_AUDIO_CONTROL, 0x0);
|
||||
|
||||
/* Configure the audio source (the S/PDIF controller). It is up to the
|
||||
* user to implement this function. */
|
||||
|
@ -195,37 +194,38 @@ static void Dptx_AudioInit(XDptx *InstancePtr)
|
|||
|
||||
/* Write audio info frame as per user requirements. This may be optional
|
||||
* for some systems. 8 writes are required to register
|
||||
* XDPTX_TX_AUDIO_INFO_DATA. It is up to the user to implement this
|
||||
* XDP_TX_AUDIO_INFO_DATA. It is up to the user to implement this
|
||||
* function. */
|
||||
Dptx_AudioSendInfoFrame(InstancePtr);
|
||||
/*******************/
|
||||
|
||||
Fs = 48; /* KHz (32 | 44.1 | 48) */
|
||||
if (InstancePtr->LinkConfig.LinkRate == XDPTX_LINK_BW_SET_540GBPS) {
|
||||
if (InstancePtr->TxInstance.LinkConfig.LinkRate ==
|
||||
XDP_TX_LINK_BW_SET_540GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
else if (InstancePtr->LinkConfig.LinkRate ==
|
||||
XDPTX_LINK_BW_SET_270GBPS) {
|
||||
else if (InstancePtr->TxInstance.LinkConfig.LinkRate ==
|
||||
XDP_TX_LINK_BW_SET_270GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
else if (InstancePtr->LinkConfig.LinkRate ==
|
||||
XDPTX_LINK_BW_SET_162GBPS) {
|
||||
else if (InstancePtr->TxInstance.LinkConfig.LinkRate ==
|
||||
XDP_TX_LINK_BW_SET_162GBPS) {
|
||||
MAud = 512 * Fs;
|
||||
}
|
||||
|
||||
/* Write the channel count. The value is (actual count - 1). */
|
||||
NumChs = 2;
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CHANNELS,
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_AUDIO_CHANNELS,
|
||||
NumChs - 1);
|
||||
|
||||
/* NAud = 540000 | 270000 | 162000 */
|
||||
NAud = 27 * InstancePtr->LinkConfig.LinkRate * 1000;
|
||||
NAud = 27 * InstancePtr->TxInstance.LinkConfig.LinkRate * 1000;
|
||||
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_MAUD, MAud);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_NAUD, NAud);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_AUDIO_MAUD, MAud);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_AUDIO_NAUD, NAud);
|
||||
|
||||
/* Enable audio in the DisplayPort TX. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_TX_AUDIO_CONTROL,
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_AUDIO_CONTROL,
|
||||
0x1);
|
||||
}
|
||||
|
||||
|
@ -233,7 +233,7 @@ static void Dptx_AudioInit(XDptx *InstancePtr)
|
|||
/**
|
||||
* This function needs to configure the audio source.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -241,7 +241,7 @@ static void Dptx_AudioInit(XDptx *InstancePtr)
|
|||
* documentation for reference.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr)
|
||||
static void Dptx_ConfigureAudioSrc(XDp *InstancePtr)
|
||||
{
|
||||
xil_printf("Dptx_ConfigureAudioSrc: User defined function here.\n");
|
||||
}
|
||||
|
@ -250,7 +250,7 @@ static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr)
|
|||
/**
|
||||
* This function needs to send an info frame as per user requirements.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -258,11 +258,11 @@ static void Dptx_ConfigureAudioSrc(XDptx *InstancePtr)
|
|||
* documentation for reference.
|
||||
* @note This may be optional for some systems.
|
||||
* @note A sequence of 8 writes are required to register
|
||||
* XDPTX_TX_AUDIO_INFO_DATA. See XAPP1178 and the IP documentation
|
||||
* XDP_TX_AUDIO_INFO_DATA. See XAPP1178 and the IP documentation
|
||||
* for reference.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_AudioSendInfoFrame(XDptx *InstancePtr)
|
||||
static void Dptx_AudioSendInfoFrame(XDp *InstancePtr)
|
||||
{
|
||||
xil_printf("Dptx_AudioSendInfoFrame: User defined function here.\n");
|
||||
}
|
|
@ -32,18 +32,19 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_example_common.c
|
||||
* @file xdp_tx_example_common.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core by training the main link at the maximum common
|
||||
* capabilities between the TX and RX and checking the lane status.
|
||||
* Contains a design example using the XDp driver (operating in TX mode). It
|
||||
* performs a self test on the DisplayPort TX core by training the main link at
|
||||
* the maximum common capabilities between the TX and RX and checking the lane
|
||||
* status.
|
||||
*
|
||||
* @note The DisplayPort TX core does not work alone - video/audio
|
||||
* sources need to be set up in the system correctly, as well as
|
||||
* setting up the output path (for example, configuring the
|
||||
* hardware system with the DisplayPort TX core output to an FMC
|
||||
* card with DisplayPort output capabilities. Some platform
|
||||
* initialization will need to happen prior to calling XDptx driver
|
||||
* initialization will need to happen prior to calling XDp driver
|
||||
* functions. See XAPP1178 as a reference.
|
||||
*
|
||||
* <pre>
|
||||
|
@ -51,19 +52,18 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xstatus.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static void Dptx_StartVideoStream(XDptx *InstancePtr);
|
||||
static void Dptx_StartVideoStream(XDp *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
|
@ -72,7 +72,7 @@ static void Dptx_StartVideoStream(XDptx *InstancePtr);
|
|||
* This function will configure and establish a link with the receiver device,
|
||||
* afterwards, a video stream will start to be sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param LaneCount is the number of lanes to use over the main link.
|
||||
* @param LinkRate is the link rate to use over the main link.
|
||||
*
|
||||
|
@ -83,7 +83,7 @@ static void Dptx_StartVideoStream(XDptx *InstancePtr);
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_Run(XDptx *InstancePtr)
|
||||
u32 Dptx_Run(XDp *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
|
@ -106,7 +106,7 @@ u32 Dptx_Run(XDptx *InstancePtr)
|
|||
* configuration parameters will be retrieved based on the configuration
|
||||
* to the DisplayPort TX core instance with the specified device ID.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -118,22 +118,22 @@ u32 Dptx_Run(XDptx *InstancePtr)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
u32 Dptx_SetupExample(XDp *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
XDptx_Config *ConfigPtr;
|
||||
XDp_Config *ConfigPtr;
|
||||
u32 Status;
|
||||
|
||||
/* Obtain the device configuration for the DisplayPort TX core. */
|
||||
ConfigPtr = XDptx_LookupConfig(DeviceId);
|
||||
ConfigPtr = XDp_LookupConfig(DeviceId);
|
||||
if (!ConfigPtr) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
/* Copy the device configuration into the InstancePtr's Config
|
||||
* structure. */
|
||||
XDptx_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
XDp_CfgInitialize(InstancePtr, ConfigPtr, ConfigPtr->BaseAddr);
|
||||
|
||||
/* Initialize the DisplayPort TX core. */
|
||||
Status = XDptx_InitializeTx(InstancePtr);
|
||||
Status = XDp_Initialize(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
@ -145,7 +145,7 @@ u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
/**
|
||||
* This function will configure and establish a link with the receiver device.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS the if main link was successfully established.
|
||||
|
@ -154,7 +154,7 @@ u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_StartLink(XDptx *InstancePtr)
|
||||
u32 Dptx_StartLink(XDp *InstancePtr)
|
||||
{
|
||||
u32 VsLevelTx;
|
||||
u32 PeLevelTx;
|
||||
|
@ -164,26 +164,26 @@ u32 Dptx_StartLink(XDptx *InstancePtr)
|
|||
|
||||
/* Obtain the capabilities of the RX device by reading the monitor's
|
||||
* DPCD. */
|
||||
Status = XDptx_GetRxCapabilities(InstancePtr);
|
||||
Status = XDp_TxGetRxCapabilities(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
#if (TRAIN_USE_MAX_LINK == 1)
|
||||
LaneCount = InstancePtr->LinkConfig.MaxLaneCount;
|
||||
LinkRate = InstancePtr->LinkConfig.MaxLinkRate;
|
||||
LaneCount = InstancePtr->TxInstance.LinkConfig.MaxLaneCount;
|
||||
LinkRate = InstancePtr->TxInstance.LinkConfig.MaxLinkRate;
|
||||
#else
|
||||
LaneCount = TRAIN_USE_LANE_COUNT;
|
||||
LinkRate = TRAIN_USE_LINK_RATE;
|
||||
#endif
|
||||
|
||||
/* Check if the link is already trained */
|
||||
Status = XDptx_CheckLinkStatus(InstancePtr, LaneCount);
|
||||
Status = XDp_TxCheckLinkStatus(InstancePtr, LaneCount);
|
||||
if (Status == XST_SUCCESS) {
|
||||
xil_printf("-> Link is already trained on %d lanes.\n",
|
||||
LaneCount);
|
||||
if (XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_LINK_BW_SET) == LinkRate) {
|
||||
if (XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_LINK_BW_SET) == LinkRate) {
|
||||
xil_printf("-> Link needs to be re-trained %d Mbps.\n",
|
||||
(270 * LinkRate));
|
||||
}
|
||||
|
@ -203,40 +203,40 @@ u32 Dptx_StartLink(XDptx *InstancePtr)
|
|||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_SetEnhancedFrameMode(InstancePtr, 1);
|
||||
XDptx_SetDownspread(InstancePtr, 0);
|
||||
XDp_TxSetEnhancedFrameMode(InstancePtr, 1);
|
||||
XDp_TxSetDownspread(InstancePtr, 0);
|
||||
|
||||
#if (TRAIN_USE_MAX_LINK == 1)
|
||||
/* Configure the main link based on the maximum common capabilities of
|
||||
* the DisplayPort TX core and the receiver device. */
|
||||
Status = XDptx_CfgMainLinkMax(InstancePtr);
|
||||
Status = XDp_TxCfgMainLinkMax(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
#else
|
||||
XDptx_SetLinkRate(InstancePtr, LinkRate);
|
||||
XDptx_SetLaneCount(InstancePtr, LaneCount);
|
||||
XDp_TxSetLinkRate(InstancePtr, LinkRate);
|
||||
XDp_TxSetLaneCount(InstancePtr, LaneCount);
|
||||
#endif
|
||||
|
||||
/* Train the link. */
|
||||
xil_printf("******************************************\n");
|
||||
Status = XDptx_EstablishLink(InstancePtr);
|
||||
Status = XDp_TxEstablishLink(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("!!! Training failed !!!\n");
|
||||
xil_printf("******************************************\n");
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
VsLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_PHY_VOLTAGE_DIFF_LANE_0);
|
||||
PeLevelTx = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_PHY_POSTCURSOR_LANE_0);
|
||||
VsLevelTx = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_PHY_VOLTAGE_DIFF_LANE_0);
|
||||
PeLevelTx = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_PHY_POSTCURSOR_LANE_0);
|
||||
xil_printf("!!! Training passed at LR:0x%02lx LC:%d !!!\n",
|
||||
InstancePtr->LinkConfig.LinkRate,
|
||||
InstancePtr->LinkConfig.LaneCount);
|
||||
InstancePtr->TxInstance.LinkConfig.LinkRate,
|
||||
InstancePtr->TxInstance.LinkConfig.LaneCount);
|
||||
xil_printf("VS:%d (TX:%d) PE:%d (TX:%d)\n",
|
||||
InstancePtr->LinkConfig.VsLevel, VsLevelTx,
|
||||
InstancePtr->LinkConfig.PeLevel, PeLevelTx);
|
||||
InstancePtr->TxInstance.LinkConfig.VsLevel, VsLevelTx,
|
||||
InstancePtr->TxInstance.LinkConfig.PeLevel, PeLevelTx);
|
||||
xil_printf("******************************************\n");
|
||||
|
||||
return XST_SUCCESS;
|
||||
|
@ -251,7 +251,7 @@ u32 Dptx_StartLink(XDptx *InstancePtr)
|
|||
* - The connected monitor's preferred timing is used to determine the
|
||||
* video resolution (and associated timings) for the stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
|
@ -263,34 +263,35 @@ u32 Dptx_StartLink(XDptx *InstancePtr)
|
|||
* a resolution of 640x480 is used at a refresh rate of 60Hz.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_StartVideoStream(XDptx *InstancePtr)
|
||||
static void Dptx_StartVideoStream(XDp *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
u8 Edid[XDPTX_EDID_SIZE];
|
||||
u8 Edid[XDP_EDID_BLOCK_SIZE];
|
||||
|
||||
/* Set the bits per color. If not set, the default is 6. */
|
||||
XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID0, 8);
|
||||
XDp_TxCfgMsaSetBpc(InstancePtr, XDP_TX_STREAM_ID1, 8);
|
||||
|
||||
/* Set synchronous clock mode. */
|
||||
XDptx_CfgMsaEnSynchClkMode(InstancePtr, XDPTX_STREAM_ID0, 1);
|
||||
XDp_TxCfgMsaEnSynchClkMode(InstancePtr, XDP_TX_STREAM_ID1, 1);
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID0);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID1);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID2);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID3);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID1);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID2);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID3);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID4);
|
||||
|
||||
/* Choose a method for selecting the video mode. There are 3 ways to do this:
|
||||
* 1) Use the preferred timing from the monitor's EDID:
|
||||
* u8 Edid[XDPTX_EDID_SIZE];
|
||||
* XDptx_GetEdid(InstancePtr, Edid);
|
||||
* XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr, XDPTX_STREAM_ID0, Edid);
|
||||
* u8 Edid[XDP_EDID_BLOCK_SIZE];
|
||||
* XDp_TxGetEdid(InstancePtr, Edid);
|
||||
* XDp_TxCfgMsaUseEdidPreferredTiming(InstancePtr, XDP_TX_STREAM_ID1,
|
||||
* Edid);
|
||||
*
|
||||
* 2) Use a standard video timing mode (see mode_table.h):
|
||||
* XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID0,
|
||||
XDPTX_VM_640x480_60_P);
|
||||
* XDp_TxCfgMsaUseStandardVideoMode(InstancePtr, XDP_TX_STREAM_ID1,
|
||||
XVIDC_VM_640x480_60_P);
|
||||
*
|
||||
* 3) Use a custom configuration for the main stream attributes (MSA):
|
||||
* XDptx_MainStreamAttributes MsaConfigCustom;
|
||||
* XDp_TxMainStreamAttributes MsaConfigCustom;
|
||||
* MsaConfigCustom.Dmt.HResolution = 1280;
|
||||
* MsaConfigCustom.Dmt.VResolution = 1024;
|
||||
* MsaConfigCustom.Dmt.PixelClkKhz = 108000;
|
||||
|
@ -302,37 +303,38 @@ static void Dptx_StartVideoStream(XDptx *InstancePtr)
|
|||
* MsaConfigCustom.Dmt.VFrontPorch = 1;
|
||||
* MsaConfigCustom.Dmt.VSyncPulseWidth = 3;
|
||||
* MsaConfigCustom.Dmt.VBackPorch = 38;
|
||||
* XDptx_CfgMsaUseCustom(InstancePtr, XDPTX_STREAM_ID0,
|
||||
* XDp_TxCfgMsaUseCustom(InstancePtr, XDP_TX_STREAM_ID1,
|
||||
* &MsaConfigCustom, 1);
|
||||
*
|
||||
* To override the user pixel width:
|
||||
* InstancePtr->MsaConfig[_STREAM#_].OverrideUserPixelWidth = 1;
|
||||
* InstancePtr->MsaConfig[_STREAM#_].UserPixelWidth = _DESIRED_VALUE_;
|
||||
* InstancePtr->TxInstance.MsaConfig[_STREAM#_].OverrideUserPixelWidth = 1;
|
||||
* InstancePtr->TxInstance.MsaConfig[_STREAM#_].UserPixelWidth =
|
||||
* _DESIRED_VALUE_;
|
||||
* Then, use one of the methods above to calculate the rest of the MSA.
|
||||
*/
|
||||
Status = XDptx_GetEdid(InstancePtr, Edid);
|
||||
Status = XDp_TxGetEdid(InstancePtr, Edid);
|
||||
if (Status == XST_SUCCESS) {
|
||||
XDptx_CfgMsaUseEdidPreferredTiming(InstancePtr,
|
||||
XDPTX_STREAM_ID0, Edid);
|
||||
XDp_TxCfgMsaUseEdidPreferredTiming(InstancePtr,
|
||||
XDP_TX_STREAM_ID1, Edid);
|
||||
}
|
||||
else {
|
||||
XDptx_CfgMsaUseStandardVideoMode(InstancePtr, XDPTX_STREAM_ID0,
|
||||
XDPTX_VM_640x480_60_P);
|
||||
XDp_TxCfgMsaUseStandardVideoMode(InstancePtr, XDP_TX_STREAM_ID1,
|
||||
XVIDC_VM_640x480_60_P);
|
||||
}
|
||||
|
||||
/* Disable MST for this example. */
|
||||
XDptx_MstDisable(InstancePtr);
|
||||
XDp_TxMstDisable(InstancePtr);
|
||||
|
||||
/* Disable main stream to force sending of IDLE patterns. */
|
||||
XDptx_DisableMainLink(InstancePtr);
|
||||
XDp_TxDisableMainLink(InstancePtr);
|
||||
|
||||
/* Reset the transmitter. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET,
|
||||
XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_SOFT_RESET, 0x0);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_SOFT_RESET,
|
||||
XDP_TX_SOFT_RESET_VIDEO_STREAM_ALL_MASK);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_SOFT_RESET, 0x0);
|
||||
|
||||
/* Set the DisplayPort TX video mode. */
|
||||
XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID0);
|
||||
XDp_TxSetVideoMode(InstancePtr, XDP_TX_STREAM_ID1);
|
||||
|
||||
/* Configure video stream source or generator here. These function need
|
||||
* to be implemented in order for video to be displayed and is hardware
|
||||
|
@ -343,5 +345,5 @@ static void Dptx_StartVideoStream(XDptx *InstancePtr)
|
|||
Dptx_StreamSrcSync(InstancePtr);
|
||||
/*********************************/
|
||||
|
||||
XDptx_EnableMainLink(InstancePtr);
|
||||
XDp_TxEnableMainLink(InstancePtr);
|
||||
}
|
|
@ -32,18 +32,19 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_example_common.h
|
||||
* @file xdp_tx_example_common.h
|
||||
*
|
||||
* Contains a design example using the XDptx driver. It performs a self test on
|
||||
* the DisplayPort TX core by training the main link at the maximum common
|
||||
* capabilities between the TX and RX and checking the lane status.
|
||||
* Contains a design example using the XDp driver (operating in TX mode). It
|
||||
* performs a self test on the DisplayPort TX core by training the main link at
|
||||
* the maximum common capabilities between the TX and RX and checking the lane
|
||||
* status.
|
||||
*
|
||||
* @note The DisplayPort TX core does not work alone - video/audio
|
||||
* sources need to be set up in the system correctly, as well as
|
||||
* setting up the output path (for example, configuring the
|
||||
* hardware system with the DisplayPort TX core output to an FMC
|
||||
* card with DisplayPort output capabilities. Some platform
|
||||
* initialization will need to happen prior to calling XDptx driver
|
||||
* initialization will need to happen prior to calling XDp driver
|
||||
* functions. See XAPP1178 as a reference.
|
||||
*
|
||||
* <pre>
|
||||
|
@ -51,22 +52,20 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XDPTX_EXAMPLE_COMMON_H_
|
||||
#ifndef XDP_TX_EXAMPLE_COMMON_H_
|
||||
/* Prevent circular inclusions by using protection macros. */
|
||||
#define XDPTX_EXAMPLE_COMMON_H_
|
||||
#define XDP_TX_EXAMPLE_COMMON_H_
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xdp.h"
|
||||
#include "xil_printf.h"
|
||||
#include "xil_types.h"
|
||||
#include "xparameters.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
|
@ -83,7 +82,7 @@
|
|||
* If set to 0, link training will return failure if the training failed using
|
||||
* the current lane count and link rate settings.
|
||||
* TRAIN_ADAPTIVE is used by the examples as input to the
|
||||
* XDptx_EnableTrainAdaptive driver function. */
|
||||
* XDp_TxEnableTrainAdaptive driver function. */
|
||||
#define TRAIN_ADAPTIVE 1
|
||||
|
||||
/* A value of 1 is used to indicate that the DisplayPort output path has a
|
||||
|
@ -96,20 +95,20 @@
|
|||
* a DisplayPort RX device, the level values specified to the DisplayPort TX
|
||||
* core will require some compensation.
|
||||
* TRAIN_HAS_REDRIVER is used by the examples as input to the
|
||||
* XDptx_SetHasRedriverInPath driver function.
|
||||
* XDp_TxSetHasRedriverInPath driver function.
|
||||
* Note: There are 16 possible voltage swing levels and 32 possible pre-emphasis
|
||||
* levels in the DisplayPort TX core that will be mapped to 4 possible
|
||||
* voltage swing and 4 possible pre-emphasis levels in the RX device. */
|
||||
#define TRAIN_HAS_REDRIVER 1
|
||||
|
||||
/* The link rate setting to begin link training with. Valid values are:
|
||||
* XDPTX_LINK_BW_SET_540GBPS, XDPTX_LINK_BW_SET_270GBPS, and
|
||||
* XDPTX_LINK_BW_SET_162GBPS. */
|
||||
#define TRAIN_USE_LINK_RATE XDPTX_LINK_BW_SET_540GBPS
|
||||
* XDP_TX_LINK_BW_SET_540GBPS, XDP_TX_LINK_BW_SET_270GBPS, and
|
||||
* XDP_TX_LINK_BW_SET_162GBPS. */
|
||||
#define TRAIN_USE_LINK_RATE XDP_TX_LINK_BW_SET_540GBPS
|
||||
/* The lane count setting to begin link training with. Valid values are:
|
||||
* XDPTX_LANE_COUNT_SET_4, XDPTX_LANE_COUNT_SET_2, and
|
||||
* XDPTX_LANE_COUNT_SET_1. */
|
||||
#define TRAIN_USE_LANE_COUNT XDPTX_LANE_COUNT_SET_4
|
||||
* XDP_TX_LANE_COUNT_SET_4, XDP_TX_LANE_COUNT_SET_2, and
|
||||
* XDP_TX_LANE_COUNT_SET_1. */
|
||||
#define TRAIN_USE_LANE_COUNT XDP_TX_LANE_COUNT_SET_4
|
||||
/* If set to 1, TRAIN_USE_LINK_RATE and TRAIN_USE_LANE_COUNT will be ignored.
|
||||
* Instead, the maximum common link capabilities between the DisplayPort TX core
|
||||
* and the RX device will be used when establishing a link.
|
||||
|
@ -121,16 +120,16 @@
|
|||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
extern u32 Dptx_PlatformInit(void);
|
||||
extern u32 Dptx_StreamSrcSync(XDptx *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcSetup(XDptx *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcConfigure(XDptx *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcSync(XDp *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcSetup(XDp *InstancePtr);
|
||||
extern u32 Dptx_StreamSrcConfigure(XDp *InstancePtr);
|
||||
|
||||
u32 Dptx_SetupExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_StartLink(XDptx *InstancePtr);
|
||||
u32 Dptx_Run(XDptx *InstancePtr);
|
||||
u32 Dptx_SetupExample(XDp *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_StartLink(XDp *InstancePtr);
|
||||
u32 Dptx_Run(XDp *InstancePtr);
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
||||
XDptx DptxInstance;
|
||||
XDp DpInstance;
|
||||
|
||||
#endif /* XDPTX_EXAMPLE_COMMON_H_ */
|
||||
#endif /* XDP_TX_EXAMPLE_COMMON_H_ */
|
|
@ -32,11 +32,12 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_intr_example.c
|
||||
* @file xdp_tx_intr_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with interrupts. Upon Hot-
|
||||
* Plug-Detect (HPD - DisplayPort cable is plugged/unplugged or the monitor is
|
||||
* turned on/off), the main link will be trained.
|
||||
* Contains a design example using the XDp driver (operating in TX mode) with
|
||||
* interrupts. Upon Hot-Plug-Detect (HPD - DisplayPort cable is
|
||||
* plugged/unplugged or the monitor is turned on/off), the main link will be
|
||||
* trained.
|
||||
*
|
||||
* @note This example requires an interrupt controller connected to the
|
||||
* processor and the DisplayPort TX core in the system.
|
||||
|
@ -44,10 +45,10 @@
|
|||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* input (Dptx_StreamSrc* - called in xdp_tx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* extern in xdp_tx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
|
@ -55,14 +56,14 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
/* For MicroBlaze systems. */
|
||||
#include "xintc.h"
|
||||
|
@ -97,12 +98,12 @@
|
|||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler);
|
||||
static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler);
|
||||
u32 Dptx_IntrExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDp_IntrHandler HpdEventHandler,
|
||||
XDp_IntrHandler HpdPulseHandler);
|
||||
static u32 Dptx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDp_IntrHandler HpdEventHandler,
|
||||
XDp_IntrHandler HpdPulseHandler);
|
||||
static void Dptx_HpdEventHandler(void *InstancePtr);
|
||||
static void Dptx_HpdPulseHandler(void *InstancePtr);
|
||||
|
||||
|
@ -134,7 +135,7 @@ INTC IntcInstance; /* The interrupt controller instance. */
|
|||
int main(void)
|
||||
{
|
||||
/* Run the XDptx interrupt example. */
|
||||
Dptx_IntrExample(&DptxInstance, DPTX_DEVICE_ID,
|
||||
Dptx_IntrExample(&DpInstance, DPTX_DEVICE_ID,
|
||||
&IntcInstance, INTC_DEVICE_ID, DP_INTERRUPT_ID,
|
||||
&Dptx_HpdEventHandler, &Dptx_HpdPulseHandler);
|
||||
|
||||
|
@ -143,11 +144,11 @@ int main(void)
|
|||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the interrupt example using the XDptx driver. This
|
||||
* The main entry point for the interrupt example using the XDp driver. This
|
||||
* function will set up the system with interrupts and set up the Hot-Plug-Event
|
||||
* (HPD) handlers.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
* @param IntcPtr is a pointer to the interrupt instance.
|
||||
|
@ -169,14 +170,14 @@ int main(void)
|
|||
* events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler)
|
||||
u32 Dptx_IntrExample(XDp *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDp_IntrHandler HpdEventHandler,
|
||||
XDp_IntrHandler HpdPulseHandler)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
XDp_TxMstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
|
@ -188,8 +189,8 @@ u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
|||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
XDp_TxEnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDp_TxSetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* Setup interrupt handling in the system. */
|
||||
Status = Dptx_SetupInterruptHandler(InstancePtr, IntcPtr, IntrId,
|
||||
|
@ -213,7 +214,7 @@ u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
|||
* to the processor. The user should modify this function to fit the
|
||||
* application.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param IntcPtr is a pointer to the interrupt instance.
|
||||
* @param IntrId is the unique device ID of the interrupt controller.
|
||||
* @param DpIntrId is the interrupt ID of the DisplayPort TX connection to
|
||||
|
@ -231,15 +232,15 @@ u32 Dptx_IntrExample(XDptx *InstancePtr, u16 DeviceId, INTC *IntcPtr,
|
|||
* to the processor and the DisplayPort TX core.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDptx_HpdEventHandler HpdEventHandler,
|
||||
XDptx_HpdPulseHandler HpdPulseHandler)
|
||||
static u32 Dptx_SetupInterruptHandler(XDp *InstancePtr, INTC *IntcPtr,
|
||||
u16 IntrId, u16 DpIntrId, XDp_IntrHandler HpdEventHandler,
|
||||
XDp_IntrHandler HpdPulseHandler)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Set the HPD interrupt handlers. */
|
||||
XDptx_SetHpdEventHandler(InstancePtr, HpdEventHandler, InstancePtr);
|
||||
XDptx_SetHpdPulseHandler(InstancePtr, HpdPulseHandler, InstancePtr);
|
||||
XDp_TxSetHpdEventHandler(InstancePtr, HpdEventHandler, InstancePtr);
|
||||
XDp_TxSetHpdPulseHandler(InstancePtr, HpdPulseHandler, InstancePtr);
|
||||
|
||||
/* Initialize interrupt controller driver. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
|
@ -264,10 +265,10 @@ static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
|||
* the specific interrupt processing for the device. */
|
||||
#ifdef XPAR_INTC_0_DEVICE_ID
|
||||
Status = XIntc_Connect(IntcPtr, DpIntrId,
|
||||
(XInterruptHandler)XDptx_HpdInterruptHandler, InstancePtr);
|
||||
(XInterruptHandler)XDp_InterruptHandler, InstancePtr);
|
||||
#else
|
||||
Status = XScuGic_Connect(IntcPtr, DpIntrId,
|
||||
(Xil_InterruptHandler)XDptx_HpdInterruptHandler, InstancePtr);
|
||||
(Xil_InterruptHandler)XDp_InterruptHandler, InstancePtr);
|
||||
#endif /* XPAR_INTC_0_DEVICE_ID */
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
|
@ -300,26 +301,26 @@ static u32 Dptx_SetupInterruptHandler(XDptx *InstancePtr, INTC *IntcPtr,
|
|||
/******************************************************************************/
|
||||
/**
|
||||
* This function is called when a Hot-Plug-Detect (HPD) event is received by the
|
||||
* DisplayPort TX core. The XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK bit of the
|
||||
* core's XDPTX_INTERRUPT_STATUS register indicates that an HPD event has
|
||||
* DisplayPort TX core. The XDP_TX_INTERRUPT_STATUS_HPD_EVENT_MASK bit of the
|
||||
* core's XDP_TX_INTERRUPT_STATUS register indicates that an HPD event has
|
||||
* occurred.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetHpdEventHandler driver function to set this
|
||||
* @note Use the XDp_TxSetHpdEventHandler driver function to set this
|
||||
* function as the handler for HPD pulses.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdEventHandler(void *InstancePtr)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
XDp *XDp_InstancePtr = (XDp *)InstancePtr;
|
||||
|
||||
if (XDptx_IsConnected(XDptx_InstancePtr)) {
|
||||
if (XDp_TxIsConnected(XDp_InstancePtr)) {
|
||||
xil_printf("+===> HPD connection event detected.\n");
|
||||
|
||||
Dptx_Run(XDptx_InstancePtr);
|
||||
Dptx_Run(XDp_InstancePtr);
|
||||
}
|
||||
else {
|
||||
xil_printf("+===> HPD disconnection event detected.\n\n");
|
||||
|
@ -329,23 +330,23 @@ static void Dptx_HpdEventHandler(void *InstancePtr)
|
|||
/******************************************************************************/
|
||||
/**
|
||||
* This function is called when a Hot-Plug-Detect (HPD) pulse is received by the
|
||||
* DisplayPort TX core. The XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit
|
||||
* of the core's XDPTX_INTERRUPT_STATUS register indicates that an HPD event has
|
||||
* occurred.
|
||||
* DisplayPort TX core. The XDP_TX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit
|
||||
* of the core's XDP_TX_INTERRUPT_STATUS register indicates that an HPD event
|
||||
* has occurred.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetHpdPulseHandler driver function to set this
|
||||
* @note Use the XDp_TxSetHpdPulseHandler driver function to set this
|
||||
* function as the handler for HPD pulses.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdPulseHandler(void *InstancePtr)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
XDp *XDp_InstancePtr = (XDp *)InstancePtr;
|
||||
|
||||
xil_printf("===> HPD pulse detected.\n");
|
||||
|
||||
Dptx_Run(XDptx_InstancePtr);
|
||||
Dptx_Run(XDp_InstancePtr);
|
||||
}
|
|
@ -32,10 +32,10 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_mst_example.c
|
||||
* @file xdp_tx_mst_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver in multi-stream transport
|
||||
* (MST) mode.
|
||||
* Contains a design example using the XDp driver (operating in TX mode) in
|
||||
* multi-stream transport (MST) mode.
|
||||
*
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
|
@ -43,7 +43,7 @@
|
|||
* stream source in order to provide the DisplayPort core with
|
||||
* input. See XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* extern in xdp_tx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
* @note Some setups may require introduction of delays when sending
|
||||
* sideband messages.
|
||||
|
@ -53,15 +53,14 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 08/07/14 Initial creation.
|
||||
* 2.0 als 09/23/14 Improved programming sequence for payload allocation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
|
||||
/**************************** Constant Definitions ****************************/
|
||||
|
||||
|
@ -71,21 +70,21 @@
|
|||
/* This enables topology discovery which will create a list of sinks in the
|
||||
* topology. If ALLOCATE_FROM_SINKLIST is defined, the streams will sent to
|
||||
* to the sinks with the corresponding index. See the function calls for
|
||||
* the XDptx_SetStreamSelectFromSinkList driver function below. */
|
||||
* the XDp_TxSetStreamSelectFromSinkList driver function below. */
|
||||
#define ALLOCATE_FROM_SINKLIST
|
||||
#ifdef ALLOCATE_FROM_SINKLIST
|
||||
/* Define the mapping between sinks and streams. The sink numbers are in the
|
||||
* order that they are discovered by the XDptx_FindAccessibleDpDevices driver
|
||||
* order that they are discovered by the XDp_TxFindAccessibleDpDevices driver
|
||||
* function. */
|
||||
#define STREAM0_USE_SINKNUM 0
|
||||
#define STREAM1_USE_SINKNUM 1
|
||||
#define STREAM2_USE_SINKNUM 2
|
||||
#define STREAM3_USE_SINKNUM 3
|
||||
#define STREAM1_USE_SINKNUM 0
|
||||
#define STREAM2_USE_SINKNUM 1
|
||||
#define STREAM3_USE_SINKNUM 2
|
||||
#define STREAM4_USE_SINKNUM 3
|
||||
#endif
|
||||
|
||||
/* The video resolution from the display mode timings (DMT) table to use for
|
||||
* each stream. */
|
||||
#define USE_VIDEO_MODE XDPTX_VM_1920x1080_60_P
|
||||
#define USE_VIDEO_MODE XVIDC_VM_1920x1080_60_P
|
||||
|
||||
/* The color depth (bits per color component) to use for each stream. */
|
||||
#define USE_BPC 8
|
||||
|
@ -96,8 +95,8 @@
|
|||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_MstExampleRun(XDptx *InstancePtr);
|
||||
u32 Dptx_MstExample(XDp *InstancePtr, u16 DeviceId);
|
||||
u32 Dptx_MstExampleRun(XDp *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
|
@ -119,7 +118,7 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr);
|
|||
int main(void)
|
||||
{
|
||||
/* Run the XDptx MST example. */
|
||||
Dptx_MstExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
Dptx_MstExample(&DpInstance, DPTX_DEVICE_ID);
|
||||
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
@ -127,10 +126,10 @@ int main(void)
|
|||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the multi-stream transport (MST) example using the
|
||||
* XDptx driver. This function will either discover the topology and map streams
|
||||
* XDp driver. This function will either discover the topology and map streams
|
||||
* to the sinks in the sink list, or map streams to relative addresses.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -142,7 +141,7 @@ int main(void)
|
|||
* @note If system setup was successful, this function is blocking.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
u32 Dptx_MstExample(XDp *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
|
@ -156,7 +155,7 @@ u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
Status = XDptx_MstCapable(InstancePtr);
|
||||
Status = XDp_TxMstCapable(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* If the immediate downstream RX device is an MST monitor and
|
||||
* the DisplayPort Configuration Data (DPCD) does not indicate
|
||||
|
@ -187,7 +186,7 @@ u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
/**
|
||||
* This function trains the link and allocates stream payloads.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -199,12 +198,12 @@ u32 Dptx_MstExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
||||
u32 Dptx_MstExampleRun(XDp *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
u32 MaskVal;
|
||||
u8 StreamIndex;
|
||||
XDptx_VideoMode VideoMode = USE_VIDEO_MODE;
|
||||
XVidC_VideoMode VideoMode = USE_VIDEO_MODE;
|
||||
u8 Bpc = USE_BPC;
|
||||
u8 NumStreams = NUM_STREAMS;
|
||||
|
||||
|
@ -214,8 +213,8 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
|||
NumStreams = InstancePtr->Config.NumMstStreams;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
XDp_TxEnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDp_TxSetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A DisplayPort connection must exist at this point. See the interrupt
|
||||
* and polling examples for waiting for connection events. */
|
||||
|
@ -226,26 +225,26 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
|||
}
|
||||
|
||||
#ifdef USE_DELAYS_FOR_MST
|
||||
InstancePtr->AuxDelayUs = 30000;
|
||||
InstancePtr->SbMsgDelayUs = 100000;
|
||||
InstancePtr->TxInstance.AuxDelayUs = 30000;
|
||||
InstancePtr->TxInstance.SbMsgDelayUs = 100000;
|
||||
#else
|
||||
InstancePtr->AuxDelayUs = 0;
|
||||
InstancePtr->SbMsgDelayUs = 0;
|
||||
InstancePtr->TxInstance.AuxDelayUs = 0;
|
||||
InstancePtr->TxInstance.SbMsgDelayUs = 0;
|
||||
#endif
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID0);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID1);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID2);
|
||||
XDptx_ClearMsaValues(InstancePtr, XDPTX_STREAM_ID3);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID1);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID2);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID3);
|
||||
XDp_TxClearMsaValues(InstancePtr, XDP_TX_STREAM_ID4);
|
||||
|
||||
#ifdef ALLOCATE_FROM_SINKLIST
|
||||
/* Run topology discovery to determine what devices are accessible to
|
||||
* the DisplayPort TX. */
|
||||
xil_printf("Find topology >>>\n");
|
||||
InstancePtr->Topology.NodeTotal = 0;
|
||||
InstancePtr->Topology.SinkTotal = 0;
|
||||
InstancePtr->TxInstance.Topology.NodeTotal = 0;
|
||||
InstancePtr->TxInstance.Topology.SinkTotal = 0;
|
||||
|
||||
Status = XDptx_DiscoverTopology(InstancePtr);
|
||||
Status = XDp_TxDiscoverTopology(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
xil_printf("!!! A LINK_ADDRESS response from a branch device "
|
||||
"in the MST topology was not successfully received.\n");
|
||||
|
@ -253,21 +252,21 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
|||
}
|
||||
|
||||
xil_printf("<<< Find topology DONE; # of sinks found = %d.\n",
|
||||
InstancePtr->Topology.SinkTotal);
|
||||
InstancePtr->TxInstance.Topology.SinkTotal);
|
||||
|
||||
if (NumStreams > InstancePtr->Topology.SinkTotal) {
|
||||
NumStreams = InstancePtr->Topology.SinkTotal;
|
||||
if (NumStreams > InstancePtr->TxInstance.Topology.SinkTotal) {
|
||||
NumStreams = InstancePtr->TxInstance.Topology.SinkTotal;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable multi-stream transport (MST) mode for this example. */
|
||||
XDptx_MstCfgModeEnable(InstancePtr);
|
||||
XDp_TxMstCfgModeEnable(InstancePtr);
|
||||
for (StreamIndex = 0; StreamIndex < NumStreams; StreamIndex++) {
|
||||
XDptx_MstCfgStreamEnable(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
XDp_TxMstCfgStreamEnable(InstancePtr, XDP_TX_STREAM_ID1 +
|
||||
StreamIndex);
|
||||
}
|
||||
for (StreamIndex = NumStreams; StreamIndex < 4; StreamIndex++) {
|
||||
XDptx_MstCfgStreamDisable(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
XDp_TxMstCfgStreamDisable(InstancePtr, XDP_TX_STREAM_ID1 +
|
||||
StreamIndex);
|
||||
}
|
||||
|
||||
|
@ -279,63 +278,67 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
|||
u8 Lct;
|
||||
u8 Rad[15];
|
||||
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0)) {
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID1)) {
|
||||
Lct = 2; Rad[0] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID0, Lct, Rad);
|
||||
XDp_TxSetStreamSinkRad(InstancePtr, XDP_TX_STREAM_ID1, Lct,
|
||||
Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID2)) {
|
||||
Lct = 3; Rad[0] = 1; Rad[1] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID1, Lct, Rad);
|
||||
XDp_TxSetStreamSinkRad(InstancePtr, XDP_TX_STREAM_ID2, Lct,
|
||||
Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID3)) {
|
||||
Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 8;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID2, Lct, Rad);
|
||||
XDp_TxSetStreamSinkRad(InstancePtr, XDP_TX_STREAM_ID3, Lct,
|
||||
Rad);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID4)) {
|
||||
Lct = 4; Rad[0] = 1; Rad[1] = 1; Rad[2] = 9;
|
||||
XDptx_SetStreamSinkRad(InstancePtr, XDPTX_STREAM_ID3, Lct, Rad);
|
||||
XDp_TxSetStreamSinkRad(InstancePtr, XDP_TX_STREAM_ID4, Lct,
|
||||
Rad);
|
||||
}
|
||||
#else
|
||||
/* If topology discovery is used, associate a stream number with a sink
|
||||
* number from the sink list obtained during topology discovery. The
|
||||
* sinks are numbered in the order that they were found during topology
|
||||
* discovery. */
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID0,
|
||||
STREAM0_USE_SINKNUM);
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID1)) {
|
||||
XDp_TxSetStreamSelectFromSinkList(InstancePtr,
|
||||
XDP_TX_STREAM_ID1, STREAM1_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID1)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID1,
|
||||
STREAM1_USE_SINKNUM);
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID2)) {
|
||||
XDp_TxSetStreamSelectFromSinkList(InstancePtr,
|
||||
XDP_TX_STREAM_ID2, STREAM2_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID2)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID2,
|
||||
STREAM2_USE_SINKNUM);
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID3)) {
|
||||
XDp_TxSetStreamSelectFromSinkList(InstancePtr,
|
||||
XDP_TX_STREAM_ID3, STREAM3_USE_SINKNUM);
|
||||
}
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID3)) {
|
||||
XDptx_SetStreamSelectFromSinkList(InstancePtr, XDPTX_STREAM_ID3,
|
||||
STREAM3_USE_SINKNUM);
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr, XDP_TX_STREAM_ID4)) {
|
||||
XDp_TxSetStreamSelectFromSinkList(InstancePtr,
|
||||
XDP_TX_STREAM_ID4, STREAM4_USE_SINKNUM);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Reset MST mode in both the RX and TX. */
|
||||
XDptx_MstDisable(InstancePtr);
|
||||
XDptx_MstEnable(InstancePtr);
|
||||
XDp_TxMstDisable(InstancePtr);
|
||||
XDp_TxMstEnable(InstancePtr);
|
||||
|
||||
/* Set the main stream attributes (MSA) for each enabled stream (each
|
||||
* stream has an identical configuration). Then, set the configuration
|
||||
* for that stream in the corresponding DisplayPort TX registers. */
|
||||
for (StreamIndex = 0; StreamIndex < 4; StreamIndex++) {
|
||||
if (XDptx_MstStreamIsEnabled(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
StreamIndex)) {
|
||||
XDptx_CfgMsaSetBpc(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
if (XDp_TxMstStreamIsEnabled(InstancePtr,
|
||||
XDP_TX_STREAM_ID1 + StreamIndex)) {
|
||||
XDp_TxCfgMsaSetBpc(InstancePtr, XDP_TX_STREAM_ID1 +
|
||||
StreamIndex, Bpc);
|
||||
XDptx_CfgMsaEnSynchClkMode(InstancePtr,
|
||||
XDPTX_STREAM_ID0 + StreamIndex, 1);
|
||||
XDp_TxCfgMsaEnSynchClkMode(InstancePtr,
|
||||
XDP_TX_STREAM_ID1 + StreamIndex, 1);
|
||||
|
||||
XDptx_CfgMsaUseStandardVideoMode(InstancePtr,
|
||||
XDPTX_STREAM_ID0 + StreamIndex, VideoMode);
|
||||
XDptx_SetVideoMode(InstancePtr, XDPTX_STREAM_ID0 +
|
||||
XDp_TxCfgMsaUseStandardVideoMode(InstancePtr,
|
||||
XDP_TX_STREAM_ID1 + StreamIndex, VideoMode);
|
||||
XDp_TxSetVideoMode(InstancePtr, XDP_TX_STREAM_ID1 +
|
||||
StreamIndex);
|
||||
}
|
||||
}
|
||||
|
@ -349,35 +352,34 @@ u32 Dptx_MstExampleRun(XDptx *InstancePtr)
|
|||
////////////////////////////////////
|
||||
|
||||
/* Mask interrupts while allocating payloads. */
|
||||
MaskVal = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
0x3F);
|
||||
MaskVal = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_MASK);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_INTERRUPT_MASK, 0x3F);
|
||||
|
||||
/* Clear the payload ID table first. */
|
||||
Status = XDptx_ClearPayloadVcIdTable(InstancePtr);
|
||||
Status = XDp_TxClearPayloadVcIdTable(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
||||
/* Allocate payloads. */
|
||||
Status = XDptx_AllocatePayloadStreams(InstancePtr);
|
||||
Status = XDp_TxAllocatePayloadStreams(InstancePtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
||||
/* Enable the main link. */
|
||||
XDptx_EnableMainLink(InstancePtr);
|
||||
XDp_TxEnableMainLink(InstancePtr);
|
||||
|
||||
/* Unmask interrupts. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_INTERRUPT_MASK,
|
||||
MaskVal);
|
||||
|
||||
/* Do a final check to verify that the link wasn't lost. */
|
||||
Status = XDptx_CheckLinkStatus(InstancePtr,
|
||||
InstancePtr->LinkConfig.LaneCount);
|
||||
Status = XDp_TxCheckLinkStatus(InstancePtr,
|
||||
InstancePtr->TxInstance.LinkConfig.LaneCount);
|
||||
if (Status != XST_SUCCESS) {
|
||||
XDptx_WaitUs(InstancePtr, 10000);
|
||||
XDp_WaitUs(InstancePtr, 10000);
|
||||
return XST_DATA_LOST;
|
||||
}
|
||||
|
|
@ -32,20 +32,21 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_poll_example.c
|
||||
* @file xdp_tx_poll_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with polling. Once the
|
||||
* polling detects a Hot-Plug-Detect event (HPD - DisplayPort cable is plugged/
|
||||
* unplugged or the monitor is turned on/off), the main link will be trained.
|
||||
* Contains a design example using the XDp driver (operating in TX mode) with
|
||||
* polling. Once the polling detects a Hot-Plug-Detect event (HPD - DisplayPort
|
||||
* cable is plugged/unplugged or the monitor is turned on/off), the main link
|
||||
* will be trained.
|
||||
*
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* input (Dptx_StreamSrc* - called in xdp_tx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* extern in xdp_tx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
|
@ -53,25 +54,25 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_HpdPoll(XDptx *InstancePtr);
|
||||
u32 Dptx_PollExample(XDp *InstancePtr, u16 DeviceId);
|
||||
static void Dptx_HpdPoll(XDp *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the main function of the XDptx polling example.
|
||||
* This function is the main function of the XDp polling example.
|
||||
*
|
||||
* @param None.
|
||||
*
|
||||
|
@ -86,21 +87,21 @@ static void Dptx_HpdPoll(XDptx *InstancePtr);
|
|||
*******************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* Run the XDptx polling example. */
|
||||
Dptx_PollExample(&DptxInstance, DPTX_DEVICE_ID);
|
||||
/* Run the XDp polling example. */
|
||||
Dptx_PollExample(&DpInstance, DPTX_DEVICE_ID);
|
||||
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the polling example using the XDptx driver. This
|
||||
* The main entry point for the polling example using the XDp driver. This
|
||||
* function will set up the system. If this is successful, this example will
|
||||
* begin polling the Hot-Plug-Detect (HPD) status registers for HPD events. Once
|
||||
* a connection event or a pulse is detected, link training will commence (if
|
||||
* needed) and a video stream will start being sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
*
|
||||
|
@ -113,7 +114,7 @@ int main(void)
|
|||
* order to illustrate polling taking place for HPD events.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId)
|
||||
u32 Dptx_PollExample(XDp *InstancePtr, u16 DeviceId)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
|
@ -127,8 +128,8 @@ u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
XDp_TxEnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDp_TxSetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* Continuously poll for HPD events. */
|
||||
while (1) {
|
||||
|
@ -140,19 +141,19 @@ u32 Dptx_PollExample(XDptx *InstancePtr, u16 DeviceId)
|
|||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function polls the XDPTX_INTERRUPT_SIG_STATE and XDPTX_INTERRUPT_STATUS
|
||||
* registers for Hot-Plug-Detect (HPD) events and handles them accordingly. If a
|
||||
* connection or pulse event is detected, link training will begin (if required)
|
||||
* and a video stream will be initiated.
|
||||
* This function polls the XDP_TX_INTERRUPT_SIG_STATE and
|
||||
* XDP_TX_INTERRUPT_STATUS registers for Hot-Plug-Detect (HPD) events and
|
||||
* handles them accordingly. If a connection or pulse event is detected, link
|
||||
* training will begin (if required) and a video stream will be initiated.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_HpdPoll(XDptx *InstancePtr)
|
||||
static void Dptx_HpdPoll(XDp *InstancePtr)
|
||||
{
|
||||
u32 InterruptSignalState;
|
||||
u32 InterruptStatus;
|
||||
|
@ -162,20 +163,20 @@ static void Dptx_HpdPoll(XDptx *InstancePtr)
|
|||
u32 HpdDuration;
|
||||
|
||||
/* Read interrupt registers. */
|
||||
InterruptSignalState = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_SIG_STATE);
|
||||
InterruptStatus = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_STATUS);
|
||||
InterruptSignalState = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_SIG_STATE);
|
||||
InterruptStatus = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_STATUS);
|
||||
|
||||
/* Check for HPD events. */
|
||||
HpdState = InterruptSignalState &
|
||||
XDPTX_INTERRUPT_SIG_STATE_HPD_STATE_MASK;
|
||||
HpdEvent = InterruptStatus & XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
XDP_TX_INTERRUPT_SIG_STATE_HPD_STATE_MASK;
|
||||
HpdEvent = InterruptStatus & XDP_TX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
HpdPulseDetected = InterruptStatus &
|
||||
XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
XDP_TX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
if (HpdPulseDetected) {
|
||||
HpdDuration = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_HPD_DURATION);
|
||||
HpdDuration = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_HPD_DURATION);
|
||||
}
|
||||
|
||||
/* HPD event handling. */
|
||||
|
@ -195,6 +196,6 @@ static void Dptx_HpdPoll(XDptx *InstancePtr)
|
|||
xil_printf("+===> HPD disconnection event detected.\n\n");
|
||||
|
||||
/* Disable main link. */
|
||||
XDptx_DisableMainLink(InstancePtr);
|
||||
XDp_TxDisableMainLink(InstancePtr);
|
||||
}
|
||||
}
|
|
@ -32,23 +32,23 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_timer_example.c
|
||||
* @file xdp_tx_timer_example.c
|
||||
*
|
||||
* Contains a design example using the XDptx driver with a user-defined hook
|
||||
* for delay. The reasoning behind this is that MicroBlaze sleep is not very
|
||||
* accurate without a hardware timer. For systems that have a hardware timer,
|
||||
* the user may override the default MicroBlaze sleep with a function that will
|
||||
* use the hardware timer.
|
||||
* Contains a design example using the XDp driver (operating in TX mode) with a
|
||||
* user-defined hook for delay. The reasoning behind this is that MicroBlaze
|
||||
* sleep is not very accurate without a hardware timer. For systems that have a
|
||||
* hardware timer, the user may override the default MicroBlaze sleep with a
|
||||
* function that will use the hardware timer.
|
||||
*
|
||||
* @note This example requires an AXI timer in the system.
|
||||
* @note For this example to display output, the user will need to
|
||||
* implement initialization of the system (Dptx_PlatformInit) and,
|
||||
* after training is complete, implement configuration of the video
|
||||
* stream source in order to provide the DisplayPort core with
|
||||
* input (Dptx_StreamSrc* - called in xdptx_example_common.c). See
|
||||
* input (Dptx_StreamSrc* - called in xdp_tx_example_common.c). See
|
||||
* XAPP1178 for reference.
|
||||
* @note The functions Dptx_PlatformInit and Dptx_StreamSrc* are declared
|
||||
* extern in xdptx_example_common.h and are left up to the user to
|
||||
* extern in xdp_tx_example_common.h and are left up to the user to
|
||||
* implement.
|
||||
*
|
||||
* <pre>
|
||||
|
@ -56,20 +56,20 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 06/17/14 Initial creation.
|
||||
* 1.0 als 01/20/15 Initial creation.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx_example_common.h"
|
||||
#include "xdp_tx_example_common.h"
|
||||
#include "xtmrctr.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDptx_TimerHandler UserSleepFunc);
|
||||
u32 Dptx_TimerExample(XDp *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDp_TimerHandler UserSleepFunc);
|
||||
static void Dptx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
@ -96,7 +96,7 @@ int main(void)
|
|||
u32 Status;
|
||||
|
||||
/* Run the XDptx timer example. */
|
||||
Status = Dptx_TimerExample(&DptxInstance, DPTX_DEVICE_ID,
|
||||
Status = Dptx_TimerExample(&DpInstance, DPTX_DEVICE_ID,
|
||||
&TimerCounterInst, &Dptx_CustomWaitUs);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
|
@ -107,12 +107,12 @@ int main(void)
|
|||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* The main entry point for the timer example using the XDptx driver. This
|
||||
* The main entry point for the timer example using the XDp driver. This
|
||||
* function will set up the system and the custom sleep handler. If this is
|
||||
* successful, link training will commence and a video stream will start being
|
||||
* sent over the main link.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DeviceId is the unique device ID of the DisplayPort TX core
|
||||
* instance.
|
||||
* @param TimerCounterPtr is a pointer to the timer instance.
|
||||
|
@ -126,13 +126,13 @@ int main(void)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDptx_TimerHandler UserSleepFunc)
|
||||
u32 Dptx_TimerExample(XDp *InstancePtr, u16 DeviceId,
|
||||
XTmrCtr *TimerCounterPtr, XDp_TimerHandler UserSleepFunc)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Use single-stream transport (SST) mode for this example. */
|
||||
XDptx_MstCfgModeDisable(InstancePtr);
|
||||
XDp_TxMstCfgModeDisable(InstancePtr);
|
||||
|
||||
/* Do platform initialization here. This is hardware system specific -
|
||||
* it is up to the user to implement this function. */
|
||||
|
@ -145,15 +145,15 @@ u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
|||
* Note: This only has an affect for MicroBlaze systems since the Zynq
|
||||
* ARM SoC contains a timer, which is used when the driver calls the
|
||||
* delay function. */
|
||||
XDptx_SetUserTimerHandler(InstancePtr, UserSleepFunc, TimerCounterPtr);
|
||||
XDp_SetUserTimerHandler(InstancePtr, UserSleepFunc, TimerCounterPtr);
|
||||
|
||||
Status = Dptx_SetupExample(InstancePtr, DeviceId);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
XDptx_EnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDptx_SetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
XDp_TxEnableTrainAdaptive(InstancePtr, TRAIN_ADAPTIVE);
|
||||
XDp_TxSetHasRedriverInPath(InstancePtr, TRAIN_HAS_REDRIVER);
|
||||
|
||||
/* A sink monitor must be connected at this point. See the polling or
|
||||
* interrupt examples for how to wait for a connection event. */
|
||||
|
@ -168,34 +168,34 @@ u32 Dptx_TimerExample(XDptx *InstancePtr, u16 DeviceId,
|
|||
/******************************************************************************/
|
||||
/**
|
||||
* This function is used to override the driver's default sleep functionality.
|
||||
* For MicroBlaze systems, the XDptx_WaitUs driver function's default behavior
|
||||
* For MicroBlaze systems, the XDp_WaitUs driver function's default behavior
|
||||
* is to use the MB_Sleep function from microblaze_sleep.h, which is implemented
|
||||
* in software and only has millisecond accuracy. For this reason, using a
|
||||
* hardware timer is preferrable. For ARM/Zynq SoC systems, the SoC's timer is
|
||||
* used - XDptx_WaitUs will ignore this custom timer handler.
|
||||
* used - XDp_WaitUs will ignore this custom timer handler.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Use the XDptx_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDptx_WaitUs driver
|
||||
* @note Use the XDp_SetUserTimerHandler driver function to set this
|
||||
* function as the handler for when the XDp_WaitUs driver
|
||||
* function is called.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void Dptx_CustomWaitUs(void *InstancePtr, u32 MicroSeconds)
|
||||
{
|
||||
XDptx *XDptx_InstancePtr = (XDptx *)InstancePtr;
|
||||
XDp *XDp_InstancePtr = (XDp *)InstancePtr;
|
||||
u32 TimerVal;
|
||||
|
||||
XTmrCtr_Start(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
XTmrCtr_Start(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
|
||||
/* Wait specified number of useconds. */
|
||||
do {
|
||||
TimerVal = XTmrCtr_GetValue(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
TimerVal = XTmrCtr_GetValue(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
||||
while (TimerVal < (MicroSeconds *
|
||||
(XDptx_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
(XDp_InstancePtr->Config.SAxiClkHz / 1000000)));
|
||||
|
||||
XTmrCtr_Stop(XDptx_InstancePtr->UserTimerPtr, 0);
|
||||
XTmrCtr_Stop(XDp_InstancePtr->UserTimerPtr, 0);
|
||||
}
|
File diff suppressed because it is too large
Load diff
|
@ -94,21 +94,139 @@
|
|||
* The DisplayPort (DP) driver consists of functions, structures, and
|
||||
* definitions:
|
||||
* 1) Specific to the DisplayPort TX mode of operation.
|
||||
* - Prefix: XDptx_* and XDPTX_*
|
||||
* - Prefix: XDp_Tx* and XDP_TX_*
|
||||
* 2) Specific to the DisplayPort RX mode of operation.
|
||||
* - Prefix: XDprx_* and XDPRX_*
|
||||
* - Prefix: XDp_Rx* and XDP_RX_*
|
||||
* 3) Common to both DisplayPort modes of operation.
|
||||
* - Prefix: XDp_* and XDP_*
|
||||
*
|
||||
* Depending on whether the DisplayPort core is configured for TX or RX mode of
|
||||
* operation, the set of registers and required functionality will be entirely
|
||||
* different.
|
||||
* - A detailed description of the DisplayPort TX functionality and
|
||||
* associated functions may be found in xdptx.h. xdptx_hw.h contains
|
||||
* definitions of the TX register space.
|
||||
* - A detailed description of the DisplayPort RX functionality and
|
||||
* associated functions may be found in xdprx.h. xdprx_hw.h contains
|
||||
* definitions of the RX register space.
|
||||
* <b>Driver description: TX mode of operation</b>
|
||||
*
|
||||
* The device driver enables higher-level software (e.g., an application) to
|
||||
* configure and control a DisplayPort TX soft IP, communicate and control an
|
||||
* RX device/sink monitor over the AUX channel, and to initialize and transmit
|
||||
* data streams over the main link. This driver follows the DisplayPort 1.2a
|
||||
* specification.
|
||||
*
|
||||
* This driver implements link layer functionality: a Link Policy Maker (LPM)
|
||||
* and a Stream Policy Maker (SPM) as per the DisplayPort 1.2a specification.
|
||||
* - The LPM manages the main link and is responsible for keeping the link
|
||||
* synchronized. It will establish a link with a downstream RX device by
|
||||
* undergoing a link training sequence which consists of:
|
||||
* - Clock recovery: The clock needs to be recovered and PLLs need to be
|
||||
* locked for all lanes.
|
||||
* - Channel equalization: All lanes need to achieve channel equalization
|
||||
* and and symbol lock, as well as for interlane alignment to take place.
|
||||
* - The SPM manages transportation of an isochronous stream. That is, it will
|
||||
* initialize and maintain a video stream, establish a virtual channel to a
|
||||
* sink monitor, and transmit the stream.
|
||||
*
|
||||
* Using AUX transactions to read/write from/to the sink's DisplayPort
|
||||
* Configuration Data (DPCD) address space, the LPM obtains the link
|
||||
* capabilities, obtains link configuration and link and sink status, and
|
||||
* configures and controls the link and sink. The main link is trained this way.
|
||||
*
|
||||
* I2C-over-AUX transactions are used to obtain the sink's Extended Display
|
||||
* Identification Data (EDID) which give information on the display capabilities
|
||||
* of the monitor. The SPM may use this information to determine what available
|
||||
* screen resolutions and video timing are possible.
|
||||
*
|
||||
* <b>Driver description: RX mode of operation</b>
|
||||
*
|
||||
* The device driver enables higher-level software (e.g., an application) to
|
||||
* configure and control a DisplayPort RX soft IP.
|
||||
*
|
||||
* This driver gives applications the ability to configure the RX using various
|
||||
* settings, handle and issue interrupts, and modify a subset of its DisplayPort
|
||||
* Configuration Data (DPCD) fields.
|
||||
*
|
||||
* Link training is done automatically by the hardware.
|
||||
*
|
||||
* <b>Interrupt processing: TX mode of operation</b>
|
||||
*
|
||||
* For the driver to process interrupts, the application must set up the
|
||||
* system's interrupt controller and connect the XDp_InterruptHandler function
|
||||
* to service interrupts. When an interrupt occurs, XDp_InterruptHandler will
|
||||
* check which mode of operation the DisplayPort core is running in, and will
|
||||
* call the appropriate interrupt handler for that core
|
||||
* (XDp_TxInterruptHandler or XDp_RxInterruptHandler - local to xdp_intr.c).
|
||||
*
|
||||
* <b>Interrupt processing: TX mode of operation</b>
|
||||
*
|
||||
* DisplayPort interrupts occur on the HPD signal line when the DisplayPort
|
||||
* cable is connected/disconnected or when the RX device sends a pulse. The user
|
||||
* hardware design must contain an interrupt controller which the DisplayPort
|
||||
* TX instance's interrupt signal is connected to. The user application must
|
||||
* enable interrupts in the system and set up the interrupt controller such that
|
||||
* the XDp_TxHpdInterruptHandler handler will service DisplayPort interrupts.
|
||||
* When the XDp_TxHpdInterruptHandler function is invoked, the handler will
|
||||
* identify what type of DisplayPort interrupt has occurred, and will call
|
||||
* either the HPD event handler function or the HPD pulse handler function,
|
||||
* depending on whether a an HPD event on an HPD pulse event occurred.
|
||||
*
|
||||
* The DisplayPort TX's XDP_TX_INTERRUPT_STATUS register indicates the type of
|
||||
* interrupt that has occured, and the XDp_TxInterruptHandler will use this
|
||||
* information to decide which handler to call. An HPD event is identified if
|
||||
* bit XDP_TX_INTERRUPT_STATUS_HPD_EVENT_MASK is set, and an HPD pulse is
|
||||
* identified from the XDP_TX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit.
|
||||
*
|
||||
* The HPD event handler may be set up by using the XDp_TxSetHpdEventHandler
|
||||
* function and, for the HPD pulse handler, the XDp_TxSetHpdPulseHandler
|
||||
* function.
|
||||
*
|
||||
* <b>Interrupt processing: RX mode of operation</b>
|
||||
*
|
||||
* The DisplayPort RX driver may generate a pulse on the hot-plug-detect (HPD)
|
||||
* signal line using the XDp_RxGenerateHpdInterrupt function. This allows the RX
|
||||
* to send an interrupt to the upstream TX device, useful for signaling the TX
|
||||
* that it needs to do some checks for changes in downstream devices or a loss
|
||||
* of link training.
|
||||
*
|
||||
* For RX interrupt handling of HPD events or events that happen internal to the
|
||||
* RX, the user hardware design must contain an interrupt controller which the
|
||||
* DisplayPort RX instance's interrupt signal is connected to. The user
|
||||
* application must enable interrupts in the system and set up the interrupt
|
||||
* controller such that the XDp_RxInterruptHandler handler will service
|
||||
* interrupts. When the XDp_RxInterruptHandler function is invoked, the handler
|
||||
* will identify what type of interrupt has occurred, and will call the
|
||||
* appropriate interrupt handler.
|
||||
*
|
||||
* The DisplayPort RX's XDP_RX_INTERRUPT_CAUSE register indicates the type of
|
||||
* interrupt that has occured, and the XDp_RxInterruptHandler will use this
|
||||
* information to decide which handler to call.
|
||||
*
|
||||
* The handlers are set up using the XDp_RxSetIntr* functions.
|
||||
*
|
||||
* Specific interrupts may be enabled or disabled using the
|
||||
* XDp_RxInterruptEnable and XDp_RxInterruptDisable functions.
|
||||
*
|
||||
* <b>Multi-stream transport (MST) mode: TX mode of operation</b>
|
||||
*
|
||||
* The current version of this driver doesn't support MST functionality when the
|
||||
* core is configured do run in the RX mode of operation.
|
||||
*
|
||||
* The driver handles MST mode functionality in TX mode of operation, including
|
||||
* sideband messaging, topology discovery, virtual channel payload ID table
|
||||
* management, and directing streams to different sinks.
|
||||
*
|
||||
* MST testing has been done at all possible link rate/lane count/topology/
|
||||
* resolution/color depth combinations with each setting using following values:
|
||||
* - Link rate: 1.62, 2.70, and 5.40Gbps per lane.
|
||||
* - Lane count: 1, 2, and 4 lanes.
|
||||
* - Number of sink displays: 1, 2, 3, and 4 sink displays in both a daisy-chain
|
||||
* configuration and in a configuration using a combination of a 1-to-3 hub
|
||||
* and daisy-chain. Each stream was using the same resolution.
|
||||
* - Resolutions (60Hz): 640x480, 800x600, 1024x768, 1280x800, 1280x1024,
|
||||
* 1360x768, 1400x1050, 1680x1050, 1920x1080, 1920x2160, and 3840x2160.
|
||||
* - Color depths: 18, 24, 30, 36, and 48 bits per pixel.
|
||||
*
|
||||
* <b>Audio</b>
|
||||
*
|
||||
* The driver does not handle audio. For an example as to how to configure and
|
||||
* transmit audio, examples/xdptx_audio_example.c illustrates the required
|
||||
* sequence in the TX mode of operation. The user will need to configure the
|
||||
* audio source connected to the Displayport TX instance and set up the audio
|
||||
* info frame as per user requirements.
|
||||
*
|
||||
* <b>Asserts</b>
|
||||
*
|
||||
|
@ -118,6 +236,23 @@
|
|||
* it is recommended that application developers leave asserts on during
|
||||
* development.
|
||||
*
|
||||
* <b>Limitations: TX mode of operation</b>
|
||||
*
|
||||
* - For MST mode to correctly display, the current version of the driver
|
||||
* requires that each of the DisplayPort TX streams be allocated without
|
||||
* skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems
|
||||
* were experienced if skipping stream 2 and assigning stream 4 instead).
|
||||
* skipping monitors in a daisy chain is OK as long as they are assigned to
|
||||
* streams in order.
|
||||
* - In MST mode, the current version of the driver does not support removal of
|
||||
* an allocated stream from the virtual channel payload ID table without
|
||||
* clearing the entire table.
|
||||
* - Some sideband messages have not been implemented in the current version of
|
||||
* the driver for MST mode. Notably, reception of a CONNECTION_STATUS_NOTIFY
|
||||
* sideband message.
|
||||
* - The driver does not handle audio. See the audio example in the driver
|
||||
* examples directory for the required sequence for enabling audio.
|
||||
*
|
||||
* @note For a 5.4Gbps link rate, a high performance 7 series FPGA is
|
||||
* required with a speed grade of -2 or -3.
|
||||
*
|
||||
|
@ -126,7 +261,7 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/14 Initial release.
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
@ -139,8 +274,9 @@
|
|||
|
||||
#include "xil_assert.h"
|
||||
#include "xil_types.h"
|
||||
#include "xdp_hw.h"
|
||||
#include "xstatus.h"
|
||||
#include "xvidc.h"
|
||||
/* xdprx.h and xdptx.h are included. They require some type definitions. */
|
||||
|
||||
/****************************** Type Definitions ******************************/
|
||||
|
||||
|
@ -183,6 +319,250 @@ typedef struct {
|
|||
0 = TX, 1 = RX. */
|
||||
} XDp_Config;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the RX device.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 DpcdRxCapsField[16]; /**< The first 16 bytes of the raw capabilities
|
||||
field of the RX device's DisplayPort
|
||||
Configuration Data (DPCD). */
|
||||
u8 LaneStatusAdjReqs[6];/**< This is a raw read of the RX device's
|
||||
status registers. The first 4 bytes
|
||||
correspond to the lane status associated
|
||||
with clock recovery, channel
|
||||
equalization, symbol lock, and interlane
|
||||
alignment. The remaining 2 bytes
|
||||
represent the pre-emphasis and voltage
|
||||
swing level adjustments requested by the
|
||||
RX device. */
|
||||
} XDp_TxSinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the main link settings.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LaneCount; /**< The current lane count of the main
|
||||
link. */
|
||||
u8 LinkRate; /**< The current link rate of the main
|
||||
link. */
|
||||
u8 ScramblerEn; /**< Symbol scrambling is currently in
|
||||
use over the main link. */
|
||||
u8 EnhancedFramingMode; /**< Enhanced frame mode is currently in
|
||||
use over the main link. */
|
||||
u8 DownspreadControl; /**< Downspread control is currently in
|
||||
use over the main link. */
|
||||
u8 MaxLaneCount; /**< The maximum lane count of the main
|
||||
link. */
|
||||
u8 MaxLinkRate; /**< The maximum link rate of the main
|
||||
link. */
|
||||
u8 SupportEnhancedFramingMode; /**< Enhanced frame mode is supported by
|
||||
the RX device. */
|
||||
u8 SupportDownspreadControl; /**< Downspread control is supported by
|
||||
the RX device. */
|
||||
u8 VsLevel; /**< The current voltage swing level for
|
||||
each lane. */
|
||||
u8 PeLevel; /**< The current pre-emphasis/cursor
|
||||
level for each lane. */
|
||||
u8 Pattern; /**< The current pattern currently in
|
||||
use over the main link. */
|
||||
} XDp_TxLinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains the main stream attributes which determine how the
|
||||
* video will be displayed.
|
||||
*/
|
||||
typedef struct {
|
||||
XVidC_VideoTimingMode Vtm; /**< The video timing. */
|
||||
u32 PixelClockHz; /**< The pixel clock of the stream (in
|
||||
Hz). */
|
||||
u32 HStart; /**< Horizontal blank start (in
|
||||
pixels). */
|
||||
u32 VStart; /**< Vertical blank start (in lines). */
|
||||
u32 Misc0; /**< Miscellaneous stream attributes 0
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 Misc1; /**< Miscellaneous stream attributes 1
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 NVid; /**< N value for the video stream. */
|
||||
u32 UserPixelWidth; /**< The width of the user data input
|
||||
port. */
|
||||
u32 DataPerLane; /**< Used to translate the number of
|
||||
pixels per line to the native
|
||||
internal 16-bit datapath. */
|
||||
u32 AvgBytesPerTU; /**< Average number of bytes per
|
||||
transfer unit, scaled up by a
|
||||
factor of 1000. */
|
||||
u32 TransferUnitSize; /**< Size of the transfer unit in the
|
||||
framing logic. In MST mode, this
|
||||
is also the number of time slots
|
||||
that are alloted in the payload
|
||||
ID table. */
|
||||
u32 InitWait; /**< Number of initial wait cycles at
|
||||
the start of a new line by
|
||||
the framing logic. */
|
||||
u32 BitsPerColor; /**< Number of bits per color
|
||||
component. */
|
||||
u8 ComponentFormat; /**< The component format currently in
|
||||
use by the video stream. */
|
||||
u8 DynamicRange; /**< The dynamic range currently in use
|
||||
by the video stream. */
|
||||
u8 YCbCrColorimetry; /**< The YCbCr colorimetry currently in
|
||||
use by the video stream. */
|
||||
u8 SynchronousClockMode; /**< Synchronous clock mode is currently
|
||||
in use by the video stream. */
|
||||
u8 OverrideUserPixelWidth; /**< If set to 1, the value stored for
|
||||
UserPixelWidth will be used as
|
||||
the pixel width. */
|
||||
} XDp_TxMainStreamAttributes;
|
||||
|
||||
/**
|
||||
* This typedef describes a stream when the driver is running in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LinkCountTotal; /** The total number of DisplayPort
|
||||
links from the DisplayPort TX to
|
||||
the sink device that this MST
|
||||
stream is targeting.*/
|
||||
u8 RelativeAddress[15]; /** The relative address from the
|
||||
DisplayPort TX to the sink
|
||||
device that this MST stream is
|
||||
targeting.*/
|
||||
u16 MstPbn; /**< Payload bandwidth number used to
|
||||
allocate bandwidth for the MST
|
||||
stream. */
|
||||
u8 MstStreamEnable; /**< In MST mode, enables the
|
||||
corresponding stream for this
|
||||
MSA configuration. */
|
||||
} XDp_TxMstStream;
|
||||
|
||||
/**
|
||||
* This typedef describes some board characteristics information that affects
|
||||
* link training.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 HasRedriverInPath; /**< Redriver in path requires different voltage
|
||||
swing and pre-emphasis. */
|
||||
u8 TxVsLevels[4]; /**< The voltage swing levels to be used by the
|
||||
DisplayPort TX. */
|
||||
u8 TxPeLevels[4]; /**< The pre-emphasis/cursor level to be used by
|
||||
the DisplayPort TX. */
|
||||
u8 TxVsOffset; /**< Voltage swing compensation offset used when
|
||||
pre-emphasis is used. */
|
||||
} XDp_TxBoardChar;
|
||||
|
||||
/**
|
||||
* This typedef describes a downstream DisplayPort device when the driver is
|
||||
* running in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device. */
|
||||
u8 RelativeAddress[15]; /**< The relative address from the
|
||||
DisplayPort TX to this
|
||||
device. */
|
||||
u8 DeviceType; /**< The type of DisplayPort device.
|
||||
Either a branch or sink. */
|
||||
u8 LinkCountTotal; /**< The total number of DisplayPort
|
||||
links connecting this device to
|
||||
the DisplayPort TX. */
|
||||
u8 DpcdRev; /**< The revision of the device's
|
||||
DisplayPort Configuration Data
|
||||
(DPCD). For this device to
|
||||
support MST features, this value
|
||||
must represent a protocl version
|
||||
greater or equal to 1.2. */
|
||||
u8 MsgCapStatus; /**< This device is capable of sending
|
||||
and receiving sideband
|
||||
messages. */
|
||||
} XDp_TxTopologyNode;
|
||||
|
||||
/**
|
||||
* This typedef describes a the entire topology of connected downstream
|
||||
* DisplayPort devices (from the DisplayPort TX) when the driver is operating
|
||||
* in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 NodeTotal; /**< The total number of nodes that were
|
||||
found in the MST topology. */
|
||||
XDp_TxTopologyNode NodeTable[63]; /**< A table listing all the nodes in
|
||||
the MST topology. */
|
||||
u8 SinkTotal; /**< The total number of sinks in the
|
||||
MST topology. */
|
||||
XDp_TxTopologyNode *SinkList[63]; /**< A pointer list of sinks in the
|
||||
MST topology. The entries will
|
||||
point to the sinks in the
|
||||
NodeTable. */
|
||||
} XDp_TxTopology;
|
||||
|
||||
/**
|
||||
* This typedef describes a port that is connected to a DisplayPort branch
|
||||
* device. This structure is used when the driver is operating in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 InputPort; /**< Specifies that this port is an
|
||||
input port. */
|
||||
u8 PeerDeviceType; /**< Specifies the device type connected
|
||||
to this port. */
|
||||
u8 PortNum; /**< The port number of this port. */
|
||||
u8 MsgCapStatus; /**< This port or the device at this
|
||||
port can send and receive MST
|
||||
messages. */
|
||||
u8 DpDevPlugStatus; /**< There is a device connected to this
|
||||
port. */
|
||||
|
||||
u8 LegacyDevPlugStatus; /**< This port is connected to a legacy
|
||||
device. */
|
||||
u8 DpcdRev; /**< The DisplayPort Configuration Data
|
||||
(DPCD) revision of the device
|
||||
connected to this port. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device connected to this
|
||||
port. */
|
||||
u8 NumSdpStreams; /**< The total number of Secondary-Data
|
||||
Packet (SDP) streams that this
|
||||
port can handle. */
|
||||
u8 NumSdpStreamSinks; /**< The number of SDP streams
|
||||
associated with this port. */
|
||||
} XDp_TxSbMsgLinkAddressReplyPortDetail;
|
||||
|
||||
/**
|
||||
* This typedef describes a DisplayPort branch device. This structure is used
|
||||
* when the driver is operating in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 ReplyType; /**< The reply type of the sideband
|
||||
message. A value of 1 indicates
|
||||
that the request wasn't
|
||||
successful and the return data
|
||||
will give the reason for a
|
||||
negative-acknowledge (NACK). */
|
||||
u8 RequestId; /**< The request identifier of the
|
||||
reply. This should correspond to
|
||||
the request identifier for the
|
||||
LINK_ADDRESS sideband message
|
||||
request. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the branch device. */
|
||||
u8 NumPorts; /**< The number of ports associated with
|
||||
this branch device. */
|
||||
XDp_TxSbMsgLinkAddressReplyPortDetail PortDetails[16]; /**< An array
|
||||
describing all ports attached to
|
||||
this branch device. */
|
||||
} XDp_TxSbMsgLinkAddressReplyDeviceInfo;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the main link settings.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LaneCount; /**< The current lane count of the main
|
||||
link. */
|
||||
u8 LinkRate; /**< The current link rate of the main
|
||||
link. */
|
||||
} XDp_RxLinkConfig;
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents a custom timer wait handler. This is only
|
||||
|
@ -201,11 +581,364 @@ typedef struct {
|
|||
*******************************************************************************/
|
||||
typedef void (*XDp_TimerHandler)(void *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for interrupts.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDp_IntrHandler)(void *InstancePtr);
|
||||
|
||||
/**
|
||||
* The XDp driver instance data representing the TX mode of operation.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 MstEnable; /**< Multi-stream transport
|
||||
(MST) mode. Enables
|
||||
functionality, allowing
|
||||
multiple streams to be
|
||||
sent over the main
|
||||
link. */
|
||||
u8 TrainAdaptive; /**< Downshift lane count and
|
||||
link rate if necessary
|
||||
during training. */
|
||||
XDp_TxSinkConfig RxConfig; /**< Configuration structure for
|
||||
the RX device. */
|
||||
XDp_TxLinkConfig LinkConfig; /**< Configuration structure for
|
||||
the main link. */
|
||||
XDp_TxBoardChar BoardChar; /**< Some board characteristics
|
||||
information that affects
|
||||
link training. */
|
||||
XDp_TxMainStreamAttributes MsaConfig[4]; /**< Configuration structure
|
||||
for the main stream
|
||||
attributes (MSA). Each
|
||||
stream has its own set
|
||||
of attributes. When MST
|
||||
mode is disabled, only
|
||||
MsaConfig[0] is used. */
|
||||
XDp_TxMstStream MstStreamConfig[4]; /**< Configuration structure
|
||||
for a multi-stream
|
||||
transport (MST)
|
||||
stream. */
|
||||
XDp_TxTopology Topology; /**< The topology of connected
|
||||
downstream DisplayPort
|
||||
devices when the driver
|
||||
is running in MST
|
||||
mode. */
|
||||
u32 AuxDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
AUX transactions. */
|
||||
u32 SbMsgDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
sideband messages for
|
||||
multi-stream transport
|
||||
(MST) mode. */
|
||||
XDp_IntrHandler HpdEventHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) event
|
||||
interrupts. */
|
||||
void *HpdEventCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD event
|
||||
callback function. */
|
||||
XDp_IntrHandler HpdPulseHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) pulse
|
||||
interrupts. */
|
||||
void *HpdPulseCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD pulse
|
||||
callback function. */
|
||||
} XDp_Tx;
|
||||
|
||||
/**
|
||||
* The XDp driver instance data representing the TX mode of operation.
|
||||
*/
|
||||
typedef struct {
|
||||
XDp_RxLinkConfig LinkConfig; /**< Configuration structure for
|
||||
the main link. */
|
||||
XDp_IntrHandler IntrVmChangeHandler; /**< Callback function for video
|
||||
mode change
|
||||
interrupts. */
|
||||
void *IntrVmChangeCallbackRef; /**< A pointer to the user data
|
||||
passed to the video mode
|
||||
change callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrPowerStateHandler; /**< Callback function for
|
||||
power state change
|
||||
interrupts. */
|
||||
void *IntrPowerStateCallbackRef; /**< A pointer to the user data
|
||||
passed to the power
|
||||
state change callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrNoVideoHandler; /**< Callback function for
|
||||
no video interrupts. */
|
||||
void *IntrNoVideoCallbackRef; /**< A pointer to the user data
|
||||
passed to the no video
|
||||
callback function. */
|
||||
XDp_IntrHandler IntrVBlankHandler; /**< Callback function for
|
||||
vertical blanking
|
||||
interrupts. */
|
||||
void *IntrVBlankCallbackRef; /**< A pointer to the user data
|
||||
passed to the vertical
|
||||
blanking callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrTrainingLostHandler;/**< Callback function for
|
||||
training lost
|
||||
interrupts. */
|
||||
void *IntrTrainingLostCallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
lost callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrVideoHandler; /**< Callback function for valid
|
||||
video interrupts. */
|
||||
void *IntrVideoCallbackRef; /**< A pointer to the user data
|
||||
passed to the valid
|
||||
video callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrTrainingDoneHandler;/**< Callback function for
|
||||
training done
|
||||
interrupts. */
|
||||
void *IntrTrainingDoneCallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
done callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrBwChangeHandler; /**< Callback function for
|
||||
bandwidth change
|
||||
interrupts. */
|
||||
void *IntrBwChangeCallbackRef; /**< A pointer to the user data
|
||||
passed to the bandwidth
|
||||
change callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrTp1Handler; /**< Callback function for
|
||||
training pattern 1
|
||||
interrupts. */
|
||||
void *IntrTp1CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 1 callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrTp2Handler; /**< Callback function for
|
||||
training pattern 2
|
||||
interrupts. */
|
||||
void *IntrTp2CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 2 callback
|
||||
function. */
|
||||
XDp_IntrHandler IntrTp3Handler; /**< Callback function for
|
||||
training pattern 3
|
||||
interrupts. */
|
||||
void *IntrTp3CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 3 callback
|
||||
function. */
|
||||
} XDp_Rx;
|
||||
|
||||
/**
|
||||
* The XDp instance data. The user is required to allocate a variable of this
|
||||
* type for every XDp device in the system. A pointer to a variable of this type
|
||||
* is then passed to the driver API functions.
|
||||
*/
|
||||
typedef struct {
|
||||
XDp_Config Config; /**< Configuration structure for
|
||||
the DisplayPort TX
|
||||
core. */
|
||||
u32 IsReady; /**< Device is initialized and
|
||||
ready. */
|
||||
XDp_TimerHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
union {
|
||||
XDp_Tx TxInstance;
|
||||
XDp_Rx RxInstance;
|
||||
};
|
||||
} XDp;
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
/* xdp_sinit.c: Configuration extraction function. */
|
||||
XDp_Config *XDp_LookupConfig(u16 DeviceId);
|
||||
|
||||
/* xdp.c: Setup and initialization functions. */
|
||||
void XDp_CfgInitialize(XDp *InstancePtr, XDp_Config *ConfigPtr,
|
||||
u32 EffectiveAddr);
|
||||
u32 XDp_Initialize(XDp *InstancePtr);
|
||||
u32 XDp_TxGetRxCapabilities(XDp *InstancePtr);
|
||||
|
||||
/* xdp.c: TX link policy maker functions. */
|
||||
u32 XDp_TxCfgMainLinkMax(XDp *InstancePtr);
|
||||
u32 XDp_TxEstablishLink(XDp *InstancePtr);
|
||||
u32 XDp_TxCheckLinkStatus(XDp *InstancePtr, u8 LaneCount);
|
||||
void XDp_TxEnableTrainAdaptive(XDp *InstancePtr, u8 Enable);
|
||||
void XDp_TxSetHasRedriverInPath(XDp *InstancePtr, u8 Set);
|
||||
void XDp_TxCfgTxVsOffset(XDp *InstancePtr, u8 Offset);
|
||||
void XDp_TxCfgTxVsLevel(XDp *InstancePtr, u8 Level, u8 TxLevel);
|
||||
void XDp_TxCfgTxPeLevel(XDp *InstancePtr, u8 Level, u8 TxLevel);
|
||||
|
||||
/* xdp.c: TX AUX transaction functions. */
|
||||
u32 XDp_TxAuxRead(XDp *InstancePtr, u32 DpcdAddress, u32 BytesToRead,
|
||||
void *ReadData);
|
||||
u32 XDp_TxAuxWrite(XDp *InstancePtr, u32 DpcdAddress, u32 BytesToWrite,
|
||||
void *WriteData);
|
||||
u32 XDp_TxIicRead(XDp *InstancePtr, u8 IicAddress, u16 Offset,
|
||||
u16 BytesToRead, void *ReadData);
|
||||
u32 XDp_TxIicWrite(XDp *InstancePtr, u8 IicAddress, u8 BytesToWrite,
|
||||
void *WriteData);
|
||||
|
||||
/* xdp.c: TX functions for controlling the link configuration. */
|
||||
u32 XDp_TxSetDownspread(XDp *InstancePtr, u8 Enable);
|
||||
u32 XDp_TxSetEnhancedFrameMode(XDp *InstancePtr, u8 Enable);
|
||||
u32 XDp_TxSetLaneCount(XDp *InstancePtr, u8 LaneCount);
|
||||
u32 XDp_TxSetLinkRate(XDp *InstancePtr, u8 LinkRate);
|
||||
u32 XDp_TxSetScrambler(XDp *InstancePtr, u8 Enable);
|
||||
|
||||
/* xdp.c: General usage functions. */
|
||||
void XDp_SetUserTimerHandler(XDp *InstancePtr,
|
||||
XDp_TimerHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_WaitUs(XDp *InstancePtr, u32 MicroSeconds);
|
||||
u32 XDp_TxIsConnected(XDp *InstancePtr);
|
||||
void XDp_TxEnableMainLink(XDp *InstancePtr);
|
||||
void XDp_TxDisableMainLink(XDp *InstancePtr);
|
||||
void XDp_TxResetPhy(XDp *InstancePtr, u32 Reset);
|
||||
u32 XDp_RxCheckLinkStatus(XDp *InstancePtr);
|
||||
void XDp_RxDtgEn(XDp *InstancePtr);
|
||||
void XDp_RxDtgDis(XDp *InstancePtr);
|
||||
void XDp_RxSetLinkRate(XDp *InstancePtr, u8 LinkRate);
|
||||
void XDp_RxSetLaneCount(XDp *InstancePtr, u8 LaneCount);
|
||||
|
||||
/* xdp_edid.c: EDID utility functions. */
|
||||
u32 XDp_TxGetEdid(XDp *InstancePtr, u8 *Edid);
|
||||
u32 XDp_TxGetRemoteEdid(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 *Edid);
|
||||
u32 XDp_TxGetEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum);
|
||||
u32 XDp_TxGetRemoteEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDp_TxGetRemoteEdidDispIdExt(XDp *InstancePtr, u8 *Data,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDp_TxGetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag,
|
||||
u8 **DataBlockPtr);
|
||||
u32 XDp_TxGetRemoteTiledDisplayDb(XDp *InstancePtr, u8 *EdidExt,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr);
|
||||
|
||||
/* xdp_intr.c: Interrupt handling functions. */
|
||||
void XDp_InterruptHandler(XDp *InstancePtr);
|
||||
void XDp_TxSetHpdEventHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_TxSetHpdPulseHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxGenerateHpdInterrupt(XDp *InstancePtr, u16 DurationUs);
|
||||
void XDp_RxInterruptEnable(XDp *InstancePtr, u32 Mask);
|
||||
void XDp_RxInterruptDisable(XDp *InstancePtr, u32 Mask);
|
||||
void XDp_RxSetIntrVmChangeHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrPowerStateHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrNoVideoHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrVBlankHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrTrainingLostHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrVideoHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrTrainingDoneHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrBwChangeHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrTp1Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrTp2Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDp_RxSetIntrTp3Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST mode. */
|
||||
void XDp_TxMstCfgModeEnable(XDp *InstancePtr);
|
||||
void XDp_TxMstCfgModeDisable(XDp *InstancePtr);
|
||||
u32 XDp_TxMstCapable(XDp *InstancePtr);
|
||||
u32 XDp_TxMstEnable(XDp *InstancePtr);
|
||||
u32 XDp_TxMstDisable(XDp *InstancePtr);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST streams and selecting their associated target sinks. */
|
||||
void XDp_TxMstCfgStreamEnable(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_TxMstCfgStreamDisable(XDp *InstancePtr, u8 Stream);
|
||||
u8 XDp_TxMstStreamIsEnabled(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_TxSetStreamSelectFromSinkList(XDp *InstancePtr, u8 Stream, u8
|
||||
SinkNum);
|
||||
void XDp_TxSetStreamSinkRad(XDp *InstancePtr, u8 Stream, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions related to MST topology
|
||||
* discovery and management. */
|
||||
u32 XDp_TxDiscoverTopology(XDp *InstancePtr);
|
||||
u32 XDp_TxFindAccessibleDpDevices(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
void XDp_TxTopologySwapSinks(XDp *InstancePtr, u8 Index0, u8 Index1);
|
||||
void XDp_TxTopologySortSinksByTiling(XDp *InstancePtr);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions for communicating
|
||||
* with downstream DisplayPort devices. */
|
||||
u32 XDp_TxRemoteDpcdRead(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDp_TxRemoteDpcdWrite(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDp_TxRemoteIicRead(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDp_TxRemoteIicWrite(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions related to MST stream
|
||||
* allocation. */
|
||||
u32 XDp_TxAllocatePayloadStreams(XDp *InstancePtr);
|
||||
u32 XDp_TxAllocatePayloadVcIdTable(XDp *InstancePtr, u8 VcId, u8 Ts);
|
||||
u32 XDp_TxClearPayloadVcIdTable(XDp *InstancePtr);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) functions for issuing sideband
|
||||
* messages. */
|
||||
u32 XDp_TxSendSbMsgRemoteDpcdWrite(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDp_TxSendSbMsgRemoteDpcdRead(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDp_TxSendSbMsgRemoteIicWrite(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData);
|
||||
u32 XDp_TxSendSbMsgRemoteIicRead(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDp_TxSendSbMsgLinkAddress(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, XDp_TxSbMsgLinkAddressReplyDeviceInfo *DeviceInfo);
|
||||
u32 XDp_TxSendSbMsgEnumPathResources(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn);
|
||||
u32 XDp_TxSendSbMsgAllocatePayload(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 VcId, u16 Pbn);
|
||||
u32 XDp_TxSendSbMsgClearPayloadIdTable(XDp *InstancePtr);
|
||||
|
||||
/* xdp_mst.c: Multi-stream transport (MST) utility functions. */
|
||||
void XDp_TxWriteGuid(XDp *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 Guid[4]);
|
||||
void XDp_TxGetGuid(XDp *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 *Guid);
|
||||
|
||||
/* xdp_selftest.c: Self test function. */
|
||||
u32 XDp_SelfTest(XDp *InstancePtr);
|
||||
|
||||
/* xdp_spm.c: Stream policy maker functions. */
|
||||
void XDp_TxCfgMsaRecalculate(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_TxCfgMsaUseStandardVideoMode(XDp *InstancePtr, u8 Stream,
|
||||
XVidC_VideoMode VideoMode);
|
||||
void XDp_TxCfgMsaUseEdidPreferredTiming(XDp *InstancePtr, u8 Stream,
|
||||
u8 *Edid);
|
||||
void XDp_TxCfgMsaUseCustom(XDp *InstancePtr, u8 Stream,
|
||||
XDp_TxMainStreamAttributes *MsaConfigCustom, u8 Recalculate);
|
||||
void XDp_TxCfgMsaSetBpc(XDp *InstancePtr, u8 Stream, u8 BitsPerColor);
|
||||
void XDp_TxCfgMsaEnSynchClkMode(XDp *InstancePtr, u8 Stream, u8 Enable);
|
||||
void XDp_TxSetVideoMode(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_TxClearMsaValues(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_TxSetMsaValues(XDp *InstancePtr, u8 Stream);
|
||||
void XDp_RxSetUserPixelWidth(XDp *InstancePtr, u8 UserPixelWidth);
|
||||
|
||||
/******************* Macros (Inline Functions) Definitions ********************/
|
||||
|
||||
#define XDP_TX 0
|
||||
|
@ -230,11 +963,42 @@ XDp_Config *XDp_LookupConfig(u16 DeviceId);
|
|||
|
||||
/******************************* Compatibility ********************************/
|
||||
|
||||
#define XDptx_LookupConfig XDp_LookupConfig
|
||||
#define XDptx_Config XDp_Config
|
||||
#define XDptx_TimerHandler XDp_TimerHandler
|
||||
#define XDptx_ReadReg XDp_ReadReg
|
||||
#define XDprx_ReadReg XDp_ReadReg
|
||||
#define XDptx_WriteReg XDp_WriteReg
|
||||
#define XDprx_WriteReg XDp_WriteReg
|
||||
#define XDptx_Config XDp_Config
|
||||
#define XDprx_Config XDp_Config
|
||||
#define XDptx_TimerHandler XDp_TimerHandler
|
||||
#define XDprx_TimerHandler XDp_TimerHandler
|
||||
#define XDptx_HpdEventHandler XDp_IntrHandler
|
||||
#define XDptx_HpdPulseHandler XDp_IntrHandler
|
||||
#define XDprx_IntrHandler XDp_IntrHandler
|
||||
|
||||
#include "xdprx.h"
|
||||
#include "xdptx.h"
|
||||
#define XDptx_LookupConfig XDp_LookupConfig
|
||||
#define XDprx_LookupConfig XDp_LookupConfig
|
||||
#define XDptx_CfgInitialize XDp_CfgInitialize
|
||||
#define XDprx_CfgInitialize XDp_CfgInitialize
|
||||
#define XDptx_InitializeTx XDp_Initialize
|
||||
#define XDprx_InitializeRx XDp_Initialize
|
||||
#define XDptx_WaitUs XDp_WaitUs
|
||||
#define XDprx_WaitUs XDp_WaitUs
|
||||
#define XDptx_SetUserTimerHandler XDp_SetUserTimerHandler
|
||||
#define XDprx_SetUserTimerHandler XDp_SetUserTimerHandler
|
||||
#define XDptx_SelfTest XDp_SelfTest
|
||||
#define XDprx_SelfTest XDp_SelfTest
|
||||
#define XDptx_HpdInterruptHandler XDp_InterruptHandler
|
||||
#define XDprx_InterruptHandler XDp_InterruptHandler
|
||||
|
||||
#define XDptx_ XDp_Tx
|
||||
#define XDprx_ XDp_Rx
|
||||
#define XDptx XDp
|
||||
#define XDprx XDp
|
||||
|
||||
#define XDPTX_DPCD_ XDP_DPCD_
|
||||
#define XDPTX_ XDP_TX_
|
||||
#define XDPRX_ XDP_RX_
|
||||
#define XDPTX XDP_TX
|
||||
#define XDPRX XDP_RX
|
||||
|
||||
#endif /* XDP_H_ */
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -32,10 +32,11 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_edid.c
|
||||
* @file xdp_edid.c
|
||||
*
|
||||
* This file contains functions related to accessing the Extended Display
|
||||
* Identification Data (EDID) of a specified sink using the XDptx driver.
|
||||
* Identification Data (EDID) of a specified sink using the XDp driver operating
|
||||
* in TX mode.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
|
@ -44,15 +45,14 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 3.0 als 11/04/14 Initial release.
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xstatus.h"
|
||||
#include "xdp.h"
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
|
@ -61,7 +61,7 @@
|
|||
* This function retrieves an immediately connected RX device's Extended Display
|
||||
* Identification Data (EDID) structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Edid is a pointer to the Edid buffer to save to.
|
||||
*
|
||||
* @return
|
||||
|
@ -74,7 +74,7 @@
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
|
||||
u32 XDp_TxGetEdid(XDp *InstancePtr, u8 *Edid)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
|
@ -84,7 +84,7 @@ u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
|
|||
Xil_AssertNonvoid(Edid != NULL);
|
||||
|
||||
/* Retrieve the base EDID block = EDID block #0. */
|
||||
Status = XDptx_GetEdidBlock(InstancePtr, Edid, 0);
|
||||
Status = XDp_TxGetEdidBlock(InstancePtr, Edid, 0);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
@ -94,7 +94,7 @@ u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
|
|||
* This function retrieves a remote RX device's Extended Display Identification
|
||||
* Data (EDID) structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param LinkCountTotal is the number of DisplayPort links from the
|
||||
* DisplayPort source to the target DisplayPort device.
|
||||
* @param RelativeAddress is the relative address from the DisplayPort
|
||||
|
@ -111,7 +111,7 @@ u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u32 XDp_TxGetRemoteEdid(XDp *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 *Edid)
|
||||
{
|
||||
u32 Status;
|
||||
|
@ -124,7 +124,7 @@ u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
|||
Xil_AssertNonvoid(Edid != NULL);
|
||||
|
||||
/* Retrieve the base EDID block = EDID block #0. */
|
||||
Status = XDptx_GetRemoteEdidBlock(InstancePtr, Edid, 0, LinkCountTotal,
|
||||
Status = XDp_TxGetRemoteEdidBlock(InstancePtr, Edid, 0, LinkCountTotal,
|
||||
RelativeAddress);
|
||||
|
||||
return Status;
|
||||
|
@ -136,7 +136,7 @@ u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
|||
* Data (EDID) block given the block number. A block number of 0 represents the
|
||||
* base EDID and subsequent block numbers represent EDID extension blocks.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Data is a pointer to the data buffer to save the block data to.
|
||||
* @param BlockNum is the EDID block number to retrieve.
|
||||
*
|
||||
|
@ -151,17 +151,17 @@ u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum)
|
||||
u32 XDp_TxGetEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum)
|
||||
{
|
||||
u32 Status;
|
||||
u16 Offset;
|
||||
|
||||
/* Calculate the I2C offset for the specified EDID block. */
|
||||
Offset = BlockNum * XDPTX_EDID_BLOCK_SIZE;
|
||||
Offset = BlockNum * XDP_EDID_BLOCK_SIZE;
|
||||
|
||||
/* Issue the I2C read for the specified EDID block. */
|
||||
Status = XDptx_IicRead(InstancePtr, XDPTX_EDID_ADDR, Offset,
|
||||
XDPTX_EDID_BLOCK_SIZE, Data);
|
||||
Status = XDp_TxIicRead(InstancePtr, XDP_EDID_ADDR, Offset,
|
||||
XDP_EDID_BLOCK_SIZE, Data);
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
@ -172,7 +172,7 @@ u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum)
|
|||
* Data (EDID) block given the block number. A block number of 0 represents the
|
||||
* base EDID and subsequent block numbers represent EDID extension blocks.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Data is a pointer to the data buffer to save the block data to.
|
||||
* @param BlockNum is the EDID block number to retrieve.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
|
@ -191,18 +191,18 @@ u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u32 XDp_TxGetRemoteEdidBlock(XDp *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress)
|
||||
{
|
||||
u32 Status;
|
||||
u16 Offset;
|
||||
|
||||
/* Calculate the I2C offset for the specified EDID block. */
|
||||
Offset = BlockNum * XDPTX_EDID_BLOCK_SIZE;
|
||||
Offset = BlockNum * XDP_EDID_BLOCK_SIZE;
|
||||
|
||||
/* Issue the I2C read for the specified EDID block. */
|
||||
Status = XDptx_RemoteIicRead(InstancePtr, LinkCountTotal,
|
||||
RelativeAddress, XDPTX_EDID_ADDR, Offset, XDPTX_EDID_BLOCK_SIZE,
|
||||
Status = XDp_TxRemoteIicRead(InstancePtr, LinkCountTotal,
|
||||
RelativeAddress, XDP_EDID_ADDR, Offset, XDP_EDID_BLOCK_SIZE,
|
||||
Data);
|
||||
|
||||
return Status;
|
||||
|
@ -213,7 +213,7 @@ u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
|||
* Search for and retrieve a downstream DisplayPort device's Extended Display
|
||||
* Identification Data (EDID) extension block of type DisplayID.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Data is a pointer to the data buffer to save the DisplayID to.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
* DisplayPort TX to the targeted downstream device.
|
||||
|
@ -231,7 +231,7 @@ u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
||||
u32 XDp_TxGetRemoteEdidDispIdExt(XDp *InstancePtr, u8 *Data,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress)
|
||||
{
|
||||
u32 Status;
|
||||
|
@ -239,22 +239,22 @@ u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
|||
u8 ExtIndex;
|
||||
|
||||
/* Get the base EDID block. */
|
||||
Status = XDptx_GetRemoteEdid(InstancePtr, LinkCountTotal,
|
||||
Status = XDp_TxGetRemoteEdid(InstancePtr, LinkCountTotal,
|
||||
RelativeAddress, Data);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
NumExt = Data[XDPTX_EDID_EXT_BLOCK_COUNT];
|
||||
NumExt = Data[XDP_EDID_EXT_BLOCK_COUNT];
|
||||
for (ExtIndex = 0; ExtIndex < NumExt; ExtIndex++) {
|
||||
/* Get an EDID extension block. */
|
||||
Status = XDptx_GetRemoteEdidBlock(InstancePtr, Data,
|
||||
Status = XDp_TxGetRemoteEdidBlock(InstancePtr, Data,
|
||||
ExtIndex + 1, LinkCountTotal, RelativeAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
if (XDptx_IsEdidExtBlockDispId(Data)) {
|
||||
if (XDp_TxIsEdidExtBlockDispId(Data)) {
|
||||
/* The current extension block is of type DisplayID. */
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
@ -286,31 +286,31 @@ u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
|||
* section data block.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)
|
||||
u32 XDp_TxGetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)
|
||||
{
|
||||
u8 Index;
|
||||
u8 DispIdSize = DisplayIdRaw[XDPTX_DISPID_SIZE];
|
||||
u8 DispIdSize = DisplayIdRaw[XDP_TX_DISPID_SIZE];
|
||||
u8 *DataBlock;
|
||||
|
||||
/* Search for a section data block matching the specified tag. */
|
||||
for (Index = XDPTX_DISPID_PAYLOAD_START; Index < DispIdSize; Index++) {
|
||||
for (Index = XDP_TX_DISPID_PAYLOAD_START; Index < DispIdSize; Index++) {
|
||||
DataBlock = &DisplayIdRaw[Index];
|
||||
|
||||
/* Check if the tag mataches the current section data block. */
|
||||
if (DataBlock[XDPTX_DISPID_DB_SEC_TAG] == SectionTag) {
|
||||
if (DataBlock[XDP_TX_DISPID_DB_SEC_TAG] == SectionTag) {
|
||||
*DataBlockPtr = DataBlock;
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
if (DataBlock[XDPTX_DISPID_DB_SEC_SIZE] == 0) {
|
||||
if (DataBlock[XDP_TX_DISPID_DB_SEC_SIZE] == 0) {
|
||||
/* End of valid section data blocks. */
|
||||
break;
|
||||
}
|
||||
else {
|
||||
/* Increment the search index to skip the remaining
|
||||
* bytes of the current section data block. */
|
||||
Index += (XDPTX_DISPID_DB_SEC_SIZE +
|
||||
DataBlock[XDPTX_DISPID_DB_SEC_SIZE]);
|
||||
Index += (XDP_TX_DISPID_DB_SEC_SIZE +
|
||||
DataBlock[XDP_TX_DISPID_DB_SEC_SIZE]);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -327,7 +327,7 @@ u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)
|
|||
* DisplayID structure. The DisplayID structure is part of the Extended Display
|
||||
* Identification Data (EDID) in the form of an extension block.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param EdidExt is a pointer to the data area that will be filled by the
|
||||
* retrieved DisplayID extension block.
|
||||
* @param LinkCountTotal is the total DisplayPort links connecting the
|
||||
|
@ -350,14 +350,14 @@ u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag, u8 **DataBlockPtr)
|
|||
* EdidExt entry representing the TDT section data block.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
||||
u32 XDp_TxGetRemoteTiledDisplayDb(XDp *InstancePtr, u8 *EdidExt,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr)
|
||||
{
|
||||
u32 Status;
|
||||
u8 *EdidExtDispId;
|
||||
|
||||
/* Obtain a DisplayID EDID extension block. */
|
||||
Status = XDptx_GetRemoteEdidDispIdExt(InstancePtr, EdidExt,
|
||||
Status = XDp_TxGetRemoteEdidDispIdExt(InstancePtr, EdidExt,
|
||||
LinkCountTotal, RelativeAddress);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* The sink does not have a DisplayID EDID extension block. */
|
||||
|
@ -369,7 +369,7 @@ u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
|||
|
||||
/* Obtain the tiled display topology block data from the DisplayId EDID
|
||||
* extension block. */
|
||||
Status = XDptx_GetDispIdDataBlock(EdidExtDispId, XDPTX_DISPID_TDT_TAG,
|
||||
Status = XDp_TxGetDispIdDataBlock(EdidExtDispId, XDP_TX_DISPID_TDT_TAG,
|
||||
DataBlockPtr);
|
||||
if (Status != XST_SUCCESS) {
|
||||
/* The sink does not possess a DisplayID EDID data block with
|
2448
XilinxProcessorIPLib/drivers/dp/src/xdp_hw.h
Normal file
2448
XilinxProcessorIPLib/drivers/dp/src/xdp_hw.h
Normal file
File diff suppressed because it is too large
Load diff
|
@ -32,9 +32,9 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdprx_intr.c
|
||||
* @file xdp_intr.c
|
||||
*
|
||||
* This file contains functions related to XDprx interrupt handling.
|
||||
* This file contains functions related to XDp interrupt handling.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
|
@ -43,118 +43,48 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/14 Initial release.
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdprx.h"
|
||||
#include "xdp.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static void XDp_TxInterruptHandler(XDp *InstancePtr);
|
||||
static void XDp_RxInterruptHandler(XDp *InstancePtr);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the interrupt handler for the XDprx driver.
|
||||
* This function is the interrupt handler for the XDp driver.
|
||||
* When an interrupt happens, this interrupt handler will check which TX/RX mode
|
||||
* of operation the core is running in, and will call the appropriate interrupt
|
||||
* handler. The called interrupt handler will first detect what kind of
|
||||
* interrupt happened, then decides which callback function to invoke.
|
||||
*
|
||||
* When an interrupt happens, it first detects what kind of interrupt happened,
|
||||
* then decides which callback function to invoke.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_InterruptHandler(XDprx *InstancePtr)
|
||||
void XDp_InterruptHandler(XDp *InstancePtr)
|
||||
{
|
||||
u32 IntrStatus;
|
||||
u8 IntrVmChange, IntrPowerState, IntrNoVideo, IntrVBlank,
|
||||
IntrTrainingLost, IntrVideo, IntrTrainingDone, IntrBwChange,
|
||||
IntrTp1, IntrTp2, IntrTp3;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/* Determine what kind of interrupt(s) occurred.
|
||||
* Note: XDPRX_INTERRUPT_CAUSE is an RC (read-clear) register. */
|
||||
IntrStatus = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_INTERRUPT_CAUSE);
|
||||
IntrVmChange = (IntrStatus & XDPRX_INTERRUPT_CAUSE_VM_CHANGE_MASK);
|
||||
IntrPowerState = (IntrStatus & XDPRX_INTERRUPT_CAUSE_POWER_STATE_MASK);
|
||||
IntrNoVideo = (IntrStatus & XDPRX_INTERRUPT_CAUSE_NO_VIDEO_MASK);
|
||||
IntrVBlank = (IntrStatus & XDPRX_INTERRUPT_CAUSE_VBLANK_MASK);
|
||||
IntrTrainingLost = (IntrStatus &
|
||||
XDPRX_INTERRUPT_CAUSE_TRAINING_LOST_MASK);
|
||||
IntrVideo = (IntrStatus & XDPRX_INTERRUPT_CAUSE_VIDEO_MASK);
|
||||
IntrTrainingDone = (IntrStatus &
|
||||
XDPRX_INTERRUPT_CAUSE_TRAINING_DONE_MASK);
|
||||
IntrBwChange = (IntrStatus & XDPRX_INTERRUPT_CAUSE_BW_CHANGE_MASK);
|
||||
IntrTp1 = (IntrStatus & XDPRX_INTERRUPT_CAUSE_TP1_MASK);
|
||||
IntrTp2 = (IntrStatus & XDPRX_INTERRUPT_CAUSE_TP2_MASK);
|
||||
IntrTp3 = (IntrStatus & XDPRX_INTERRUPT_CAUSE_TP3_MASK);
|
||||
|
||||
/* Training pattern 1 has started. */
|
||||
if (IntrTp1) {
|
||||
InstancePtr->IntrTp1Handler(InstancePtr->IntrTp1CallbackRef);
|
||||
if (XDp_CfgGetCoreType(&InstancePtr->Config) == XDP_TX) {
|
||||
XDp_TxInterruptHandler(InstancePtr);
|
||||
}
|
||||
/* Training pattern 2 has started. */
|
||||
if (IntrTp2) {
|
||||
InstancePtr->IntrTp2Handler(InstancePtr->IntrTp2CallbackRef);
|
||||
}
|
||||
/* Training pattern 3 has started. */
|
||||
if (IntrTp3) {
|
||||
InstancePtr->IntrTp3Handler(InstancePtr->IntrTp3CallbackRef);
|
||||
}
|
||||
/* Training lost - the link has been lost. */
|
||||
if (IntrTrainingLost) {
|
||||
InstancePtr->IntrTrainingLostHandler(
|
||||
InstancePtr->IntrTrainingLostCallbackRef);
|
||||
}
|
||||
/* The link has been trained. */
|
||||
else if (IntrTrainingDone) {
|
||||
InstancePtr->IntrTrainingDoneHandler(
|
||||
InstancePtr->IntrTrainingDoneCallbackRef);
|
||||
}
|
||||
|
||||
/* A change has been detected in the current video transmitted on the
|
||||
* link as indicated by the main stream attributes (MSA) fields. The
|
||||
* horizontal and vertical resolution parameters are monitored for
|
||||
* changes. */
|
||||
if (IntrVmChange) {
|
||||
InstancePtr->IntrVmChangeHandler(
|
||||
InstancePtr->IntrVmChangeCallbackRef);
|
||||
}
|
||||
/* The VerticalBlanking_Flag in the VB-ID field of the received stream
|
||||
* indicates the start of the vertical blanking interval. */
|
||||
if (IntrVBlank) {
|
||||
InstancePtr->IntrVBlankHandler(
|
||||
InstancePtr->IntrVBlankCallbackRef);
|
||||
}
|
||||
/* The receiver has detected the no-video flags in the VB-ID field after
|
||||
* active video has been received. */
|
||||
if (IntrNoVideo) {
|
||||
InstancePtr->IntrNoVideoHandler(
|
||||
InstancePtr->IntrNoVideoCallbackRef);
|
||||
}
|
||||
/* A valid video frame is detected on the main link. */
|
||||
else if (IntrVideo) {
|
||||
InstancePtr->IntrVideoHandler(
|
||||
InstancePtr->IntrVideoCallbackRef);
|
||||
}
|
||||
|
||||
/* The transmitter has requested a change in the current power state of
|
||||
* the receiver core. */
|
||||
if (IntrPowerState) {
|
||||
InstancePtr->IntrPowerStateHandler(
|
||||
InstancePtr->IntrPowerStateCallbackRef);
|
||||
}
|
||||
/* A change in the bandwidth has been detected. */
|
||||
if (IntrBwChange) {
|
||||
InstancePtr->IntrBwChangeHandler(
|
||||
InstancePtr->IntrBwChangeCallbackRef);
|
||||
else {
|
||||
XDp_RxInterruptHandler(InstancePtr);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -163,7 +93,7 @@ void XDprx_InterruptHandler(XDprx *InstancePtr)
|
|||
* This function generates a pulse on the hot-plug-detect (HPD) line of the
|
||||
* specified duration.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param DurationUs is the duration of the HPD pulse, in microseconds.
|
||||
*
|
||||
* @return None.
|
||||
|
@ -171,22 +101,22 @@ void XDprx_InterruptHandler(XDprx *InstancePtr)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_GenerateHpdInterrupt(XDprx *InstancePtr, u16 DurationUs)
|
||||
void XDp_RxGenerateHpdInterrupt(XDp *InstancePtr, u16 DurationUs)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_HPD_INTERRUPT,
|
||||
(DurationUs << XDPRX_HPD_INTERRUPT_LENGTH_US_SHIFT) |
|
||||
XDPRX_HPD_INTERRUPT_ASSERT_MASK);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_HPD_INTERRUPT,
|
||||
(DurationUs << XDP_RX_HPD_INTERRUPT_LENGTH_US_SHIFT) |
|
||||
XDP_RX_HPD_INTERRUPT_ASSERT_MASK);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function enables interrupts associated with the specified mask.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Mask specifies which interrupts should be enabled. Bits set to
|
||||
* 1 will enable the corresponding interrupts.
|
||||
*
|
||||
|
@ -195,7 +125,7 @@ void XDprx_GenerateHpdInterrupt(XDprx *InstancePtr, u16 DurationUs)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask)
|
||||
void XDp_RxInterruptEnable(XDp *InstancePtr, u32 Mask)
|
||||
{
|
||||
u32 MaskVal;
|
||||
|
||||
|
@ -203,10 +133,10 @@ void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask)
|
|||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
MaskVal = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_INTERRUPT_CAUSE);
|
||||
MaskVal = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_RX_INTERRUPT_CAUSE);
|
||||
MaskVal &= ~Mask;
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_INTERRUPT_MASK,
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_INTERRUPT_MASK,
|
||||
MaskVal);
|
||||
}
|
||||
|
||||
|
@ -214,7 +144,7 @@ void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask)
|
|||
/**
|
||||
* This function disables interrupts associated with the specified mask.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Mask specifies which interrupts should be disabled. Bits set to
|
||||
* 1 will disable the corresponding interrupts.
|
||||
*
|
||||
|
@ -223,7 +153,7 @@ void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask)
|
||||
void XDp_RxInterruptDisable(XDp *InstancePtr, u32 Mask)
|
||||
{
|
||||
u32 MaskVal;
|
||||
|
||||
|
@ -231,19 +161,74 @@ void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask)
|
|||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
MaskVal = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_INTERRUPT_CAUSE);
|
||||
MaskVal = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_RX_INTERRUPT_CAUSE);
|
||||
MaskVal |= Mask;
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_INTERRUPT_MASK,
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_INTERRUPT_MASK,
|
||||
MaskVal);
|
||||
}
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect event
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDp_TxSetHpdEventHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->TxInstance.HpdEventHandler = CallbackFunc;
|
||||
InstancePtr->TxInstance.HpdEventCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect pulse
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDp_TxSetHpdPulseHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->TxInstance.HpdPulseHandler = CallbackFunc;
|
||||
InstancePtr->TxInstance.HpdPulseCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a video mode change
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -253,16 +238,16 @@ void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrVmChangeHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrVmChangeHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrVmChangeHandler = CallbackFunc;
|
||||
InstancePtr->IntrVmChangeCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrVmChangeHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrVmChangeCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -270,7 +255,7 @@ void XDprx_SetIntrVmChangeHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when the power state interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -280,16 +265,16 @@ void XDprx_SetIntrVmChangeHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrPowerStateHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrPowerStateHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrPowerStateHandler = CallbackFunc;
|
||||
InstancePtr->IntrPowerStateCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrPowerStateHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrPowerStateCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -297,7 +282,7 @@ void XDprx_SetIntrPowerStateHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a no video interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -307,16 +292,16 @@ void XDprx_SetIntrPowerStateHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrNoVideoHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrNoVideoHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrNoVideoHandler = CallbackFunc;
|
||||
InstancePtr->IntrNoVideoCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrNoVideoHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrNoVideoCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -324,7 +309,7 @@ void XDprx_SetIntrNoVideoHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a vertical blanking
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -334,16 +319,16 @@ void XDprx_SetIntrNoVideoHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrVBlankHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrVBlankHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrVBlankHandler = CallbackFunc;
|
||||
InstancePtr->IntrVBlankCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrVBlankHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrVBlankCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -351,7 +336,7 @@ void XDprx_SetIntrVBlankHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a training lost interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -361,16 +346,16 @@ void XDprx_SetIntrVBlankHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrTrainingLostHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrTrainingLostHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrTrainingLostHandler = CallbackFunc;
|
||||
InstancePtr->IntrTrainingLostCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrTrainingLostHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrTrainingLostCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -378,7 +363,7 @@ void XDprx_SetIntrTrainingLostHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a valid video interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -388,16 +373,16 @@ void XDprx_SetIntrTrainingLostHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrVideoHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrVideoHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrVideoHandler = CallbackFunc;
|
||||
InstancePtr->IntrVideoCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrVideoHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrVideoCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -405,7 +390,7 @@ void XDprx_SetIntrVideoHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a training done interrupt
|
||||
* occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -415,16 +400,16 @@ void XDprx_SetIntrVideoHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrTrainingDoneHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrTrainingDoneHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrTrainingDoneHandler = CallbackFunc;
|
||||
InstancePtr->IntrTrainingDoneCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrTrainingDoneHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrTrainingDoneCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -432,7 +417,7 @@ void XDprx_SetIntrTrainingDoneHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a bandwidth change
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -442,16 +427,16 @@ void XDprx_SetIntrTrainingDoneHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrBwChangeHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrBwChangeHandler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrBwChangeHandler = CallbackFunc;
|
||||
InstancePtr->IntrBwChangeCallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrBwChangeHandler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrBwChangeCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -459,7 +444,7 @@ void XDprx_SetIntrBwChangeHandler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a training pattern 1
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -469,16 +454,16 @@ void XDprx_SetIntrBwChangeHandler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrTp1Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrTp1Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrTp1Handler = CallbackFunc;
|
||||
InstancePtr->IntrTp1CallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrTp1Handler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrTp1CallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -486,7 +471,7 @@ void XDprx_SetIntrTp1Handler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a training pattern 2
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -496,16 +481,16 @@ void XDprx_SetIntrTp1Handler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrTp2Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrTp2Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrTp2Handler = CallbackFunc;
|
||||
InstancePtr->IntrTp2CallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrTp2Handler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrTp2CallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -513,7 +498,7 @@ void XDprx_SetIntrTp2Handler(XDprx *InstancePtr,
|
|||
* This function installs a callback function for when a training pattern 3
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
|
@ -523,14 +508,187 @@ void XDprx_SetIntrTp2Handler(XDprx *InstancePtr,
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetIntrTp3Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
void XDp_RxSetIntrTp3Handler(XDp *InstancePtr,
|
||||
XDp_IntrHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->IntrTp3Handler = CallbackFunc;
|
||||
InstancePtr->IntrTp3CallbackRef = CallbackRef;
|
||||
InstancePtr->RxInstance.IntrTp3Handler = CallbackFunc;
|
||||
InstancePtr->RxInstance.IntrTp3CallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the interrupt handler for the XDp driver operating in TX
|
||||
* mode.
|
||||
*
|
||||
* When an interrupt happens, it first detects what kind of interrupt happened,
|
||||
* then decides which callback function to invoke.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void XDp_TxInterruptHandler(XDp *InstancePtr)
|
||||
{
|
||||
u32 IntrStatus;
|
||||
u8 HpdEventDetected;
|
||||
u8 HpdPulseDetected;
|
||||
u32 HpdDuration;
|
||||
u32 IntrMask;
|
||||
|
||||
/* Determine what kind of interrupt occurred.
|
||||
* Note: XDP_TX_INTERRUPT_STATUS is an RC (read-clear) register. */
|
||||
IntrStatus = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_STATUS);
|
||||
IntrStatus &= ~XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_MASK);
|
||||
IntrMask = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_MASK);
|
||||
|
||||
HpdEventDetected = IntrStatus & XDP_TX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
HpdPulseDetected = IntrStatus &
|
||||
XDP_TX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
|
||||
if (HpdEventDetected) {
|
||||
/* Mask interrupts while event handling is taking place. API
|
||||
* will error out in case of a disconnection event anyway. */
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_MASK, IntrMask |
|
||||
XDP_TX_INTERRUPT_MASK_HPD_EVENT_MASK);
|
||||
|
||||
InstancePtr->TxInstance.HpdEventHandler(
|
||||
InstancePtr->TxInstance.HpdEventCallbackRef);
|
||||
}
|
||||
else if (HpdPulseDetected && XDp_TxIsConnected(InstancePtr)) {
|
||||
/* Mask interrupts while event handling is taking place. */
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_INTERRUPT_MASK, IntrMask |
|
||||
XDP_TX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK);
|
||||
|
||||
/* The source device must debounce the incoming HPD signal by
|
||||
* sampling the value at an interval greater than 0.500 ms. An
|
||||
* HPD pulse should be of width 0.5 ms - 1.0 ms. */
|
||||
HpdDuration = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_TX_HPD_DURATION);
|
||||
if (HpdDuration >= 500) {
|
||||
InstancePtr->TxInstance.HpdPulseHandler(
|
||||
InstancePtr->TxInstance.HpdPulseCallbackRef);
|
||||
}
|
||||
}
|
||||
|
||||
/* Unmask previously masked interrupts once handling is done. */
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_TX_INTERRUPT_MASK,
|
||||
IntrMask);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the interrupt handler for the XDp driver operating in RX
|
||||
* mode.
|
||||
*
|
||||
* When an interrupt happens, it first detects what kind of interrupt happened,
|
||||
* then decides which callback function to invoke.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void XDp_RxInterruptHandler(XDp *InstancePtr)
|
||||
{
|
||||
u32 IntrStatus;
|
||||
u8 IntrVmChange, IntrPowerState, IntrNoVideo, IntrVBlank,
|
||||
IntrTrainingLost, IntrVideo, IntrTrainingDone, IntrBwChange,
|
||||
IntrTp1, IntrTp2, IntrTp3;
|
||||
|
||||
/* Determine what kind of interrupt(s) occurred.
|
||||
* Note: XDP_RX_INTERRUPT_CAUSE is an RC (read-clear) register. */
|
||||
IntrStatus = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDP_RX_INTERRUPT_CAUSE);
|
||||
IntrVmChange = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_VM_CHANGE_MASK);
|
||||
IntrPowerState = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_POWER_STATE_MASK);
|
||||
IntrNoVideo = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_NO_VIDEO_MASK);
|
||||
IntrVBlank = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_VBLANK_MASK);
|
||||
IntrTrainingLost = (IntrStatus &
|
||||
XDP_RX_INTERRUPT_CAUSE_TRAINING_LOST_MASK);
|
||||
IntrVideo = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_VIDEO_MASK);
|
||||
IntrTrainingDone = (IntrStatus &
|
||||
XDP_RX_INTERRUPT_CAUSE_TRAINING_DONE_MASK);
|
||||
IntrBwChange = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_BW_CHANGE_MASK);
|
||||
IntrTp1 = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_TP1_MASK);
|
||||
IntrTp2 = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_TP2_MASK);
|
||||
IntrTp3 = (IntrStatus & XDP_RX_INTERRUPT_CAUSE_TP3_MASK);
|
||||
|
||||
/* Training pattern 1 has started. */
|
||||
if (IntrTp1) {
|
||||
InstancePtr->RxInstance.IntrTp1Handler(
|
||||
InstancePtr->RxInstance.IntrTp1CallbackRef);
|
||||
}
|
||||
/* Training pattern 2 has started. */
|
||||
if (IntrTp2) {
|
||||
InstancePtr->RxInstance.IntrTp2Handler(
|
||||
InstancePtr->RxInstance.IntrTp2CallbackRef);
|
||||
}
|
||||
/* Training pattern 3 has started. */
|
||||
if (IntrTp3) {
|
||||
InstancePtr->RxInstance.IntrTp3Handler(
|
||||
InstancePtr->RxInstance.IntrTp3CallbackRef);
|
||||
}
|
||||
/* Training lost - the link has been lost. */
|
||||
if (IntrTrainingLost) {
|
||||
InstancePtr->RxInstance.IntrTrainingLostHandler(
|
||||
InstancePtr->RxInstance.IntrTrainingLostCallbackRef);
|
||||
}
|
||||
/* The link has been trained. */
|
||||
else if (IntrTrainingDone) {
|
||||
InstancePtr->RxInstance.IntrTrainingDoneHandler(
|
||||
InstancePtr->RxInstance.IntrTrainingDoneCallbackRef);
|
||||
}
|
||||
|
||||
/* A change has been detected in the current video transmitted on the
|
||||
* link as indicated by the main stream attributes (MSA) fields. The
|
||||
* horizontal and vertical resolution parameters are monitored for
|
||||
* changes. */
|
||||
if (IntrVmChange) {
|
||||
InstancePtr->RxInstance.IntrVmChangeHandler(
|
||||
InstancePtr->RxInstance.IntrVmChangeCallbackRef);
|
||||
}
|
||||
/* The VerticalBlanking_Flag in the VB-ID field of the received stream
|
||||
* indicates the start of the vertical blanking interval. */
|
||||
if (IntrVBlank) {
|
||||
InstancePtr->RxInstance.IntrVBlankHandler(
|
||||
InstancePtr->RxInstance.IntrVBlankCallbackRef);
|
||||
}
|
||||
/* The receiver has detected the no-video flags in the VB-ID field after
|
||||
* active video has been received. */
|
||||
if (IntrNoVideo) {
|
||||
InstancePtr->RxInstance.IntrNoVideoHandler(
|
||||
InstancePtr->RxInstance.IntrNoVideoCallbackRef);
|
||||
}
|
||||
/* A valid video frame is detected on the main link. */
|
||||
else if (IntrVideo) {
|
||||
InstancePtr->RxInstance.IntrVideoHandler(
|
||||
InstancePtr->RxInstance.IntrVideoCallbackRef);
|
||||
}
|
||||
|
||||
/* The transmitter has requested a change in the current power state of
|
||||
* the receiver core. */
|
||||
if (IntrPowerState) {
|
||||
InstancePtr->RxInstance.IntrPowerStateHandler(
|
||||
InstancePtr->RxInstance.IntrPowerStateCallbackRef);
|
||||
}
|
||||
/* A change in the bandwidth has been detected. */
|
||||
if (IntrBwChange) {
|
||||
InstancePtr->RxInstance.IntrBwChangeHandler(
|
||||
InstancePtr->RxInstance.IntrBwChangeCallbackRef);
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load diff
339
XilinxProcessorIPLib/drivers/dp/src/xdp_selftest.c
Normal file
339
XilinxProcessorIPLib/drivers/dp/src/xdp_selftest.c
Normal file
|
@ -0,0 +1,339 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdp_selftest.c
|
||||
*
|
||||
* This file contains a diagnostic self-test function for the XDp driver. It
|
||||
* will check many of the DisplayPort core's register values against the default
|
||||
* reset values as a sanity-check that the core is ready to be used.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdp.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static u32 XDp_TxSelfTest(XDp *InstancePtr);
|
||||
static u32 XDp_RxSelfTest(XDp *InstancePtr);
|
||||
|
||||
/**************************** Variable Definitions ****************************/
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's general
|
||||
* usage registers.
|
||||
*/
|
||||
u32 TxResetValues[53][2] =
|
||||
{
|
||||
{XDP_TX_LINK_BW_SET, 0},
|
||||
{XDP_TX_LANE_COUNT_SET, 0},
|
||||
{XDP_TX_ENHANCED_FRAME_EN, 0},
|
||||
{XDP_TX_TRAINING_PATTERN_SET, 0},
|
||||
{XDP_TX_LINK_QUAL_PATTERN_SET, 0},
|
||||
{XDP_TX_SCRAMBLING_DISABLE, 0},
|
||||
{XDP_TX_DOWNSPREAD_CTRL, 0},
|
||||
{XDP_TX_SOFT_RESET, 0},
|
||||
{XDP_TX_ENABLE, 0},
|
||||
{XDP_TX_ENABLE_MAIN_STREAM, 0},
|
||||
{XDP_TX_ENABLE_SEC_STREAM, 0},
|
||||
{XDP_TX_FORCE_SCRAMBLER_RESET, 0},
|
||||
{XDP_TX_MST_CONFIG, 0},
|
||||
{XDP_TX_AUX_CMD, 0},
|
||||
{XDP_TX_AUX_WRITE_FIFO, 0},
|
||||
{XDP_TX_AUX_ADDRESS, 0},
|
||||
{XDP_TX_AUX_CLK_DIVIDER, 0},
|
||||
{XDP_TX_USER_FIFO_OVERFLOW, 0},
|
||||
{XDP_TX_AUX_REPLY_DATA, 0},
|
||||
{XDP_TX_AUX_REPLY_CODE, 0},
|
||||
{XDP_TX_AUX_REPLY_COUNT, 0},
|
||||
{XDP_TX_INTERRUPT_MASK, 0x3F},
|
||||
{XDP_TX_REPLY_DATA_COUNT, 0},
|
||||
{XDP_TX_REPLY_STATUS, 0x10},
|
||||
{XDP_TX_STREAM1, 0},
|
||||
{XDP_TX_STREAM2, 0},
|
||||
{XDP_TX_STREAM3, 0},
|
||||
{XDP_TX_STREAM4, 0},
|
||||
{XDP_TX_PHY_CONFIG, 0x03},
|
||||
{XDP_TX_PHY_VOLTAGE_DIFF_LANE_0, 0},
|
||||
{XDP_TX_PHY_VOLTAGE_DIFF_LANE_1, 0},
|
||||
{XDP_TX_PHY_VOLTAGE_DIFF_LANE_2, 0},
|
||||
{XDP_TX_PHY_VOLTAGE_DIFF_LANE_3, 0},
|
||||
{XDP_TX_PHY_TRANSMIT_PRBS7, 0},
|
||||
{XDP_TX_PHY_CLOCK_SELECT, 0},
|
||||
{XDP_TX_PHY_POWER_DOWN, 0},
|
||||
{XDP_TX_PHY_PRECURSOR_LANE_0, 0},
|
||||
{XDP_TX_PHY_PRECURSOR_LANE_1, 0},
|
||||
{XDP_TX_PHY_PRECURSOR_LANE_2, 0},
|
||||
{XDP_TX_PHY_PRECURSOR_LANE_3, 0},
|
||||
{XDP_TX_PHY_POSTCURSOR_LANE_0, 0},
|
||||
{XDP_TX_PHY_POSTCURSOR_LANE_1, 0},
|
||||
{XDP_TX_PHY_POSTCURSOR_LANE_2, 0},
|
||||
{XDP_TX_PHY_POSTCURSOR_LANE_3, 0},
|
||||
{XDP_TX_GT_DRP_COMMAND, 0},
|
||||
{XDP_TX_GT_DRP_READ_DATA, 0},
|
||||
{XDP_TX_GT_DRP_CHANNEL_STATUS, 0},
|
||||
{XDP_TX_AUDIO_CONTROL, 0},
|
||||
{XDP_TX_AUDIO_CHANNELS, 0},
|
||||
{XDP_TX_AUDIO_INFO_DATA(1), 0},
|
||||
{XDP_TX_AUDIO_MAUD, 0},
|
||||
{XDP_TX_AUDIO_NAUD, 0},
|
||||
{XDP_TX_AUDIO_EXT_DATA(1), 0}
|
||||
};
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's main
|
||||
* stream attribute (MSA) registers.
|
||||
*/
|
||||
u32 TxResetValuesMsa[20][2] =
|
||||
{
|
||||
{XDP_TX_MAIN_STREAM_HTOTAL, 0},
|
||||
{XDP_TX_MAIN_STREAM_VTOTAL, 0},
|
||||
{XDP_TX_MAIN_STREAM_POLARITY, 0},
|
||||
{XDP_TX_MAIN_STREAM_HSWIDTH, 0},
|
||||
{XDP_TX_MAIN_STREAM_VSWIDTH, 0},
|
||||
{XDP_TX_MAIN_STREAM_HRES, 0},
|
||||
{XDP_TX_MAIN_STREAM_VRES, 0},
|
||||
{XDP_TX_MAIN_STREAM_HSTART, 0},
|
||||
{XDP_TX_MAIN_STREAM_VSTART, 0},
|
||||
{XDP_TX_MAIN_STREAM_MISC0, 0},
|
||||
{XDP_TX_MAIN_STREAM_MISC1, 0},
|
||||
{XDP_TX_M_VID, 0},
|
||||
{XDP_TX_TU_SIZE, 0},
|
||||
{XDP_TX_N_VID, 0},
|
||||
{XDP_TX_USER_PIXEL_WIDTH, 0},
|
||||
{XDP_TX_USER_DATA_COUNT_PER_LANE, 0},
|
||||
{XDP_TX_MAIN_STREAM_INTERLACED, 0},
|
||||
{XDP_TX_MIN_BYTES_PER_TU, 0},
|
||||
{XDP_TX_FRAC_BYTES_PER_TU, 0},
|
||||
{XDP_TX_INIT_WAIT, 32}
|
||||
};
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort RX core's general
|
||||
* usage registers.
|
||||
*/
|
||||
u32 RxResetValues[46][2] =
|
||||
{
|
||||
{XDP_RX_LINK_ENABLE, 0},
|
||||
{XDP_RX_AUX_CLK_DIVIDER, 0},
|
||||
{XDP_RX_DTG_ENABLE, 0},
|
||||
{XDP_RX_USER_PIXEL_WIDTH, 0},
|
||||
{XDP_RX_INTERRUPT_MASK, 0x7FFF},
|
||||
{XDP_RX_MISC_CTRL, 0},
|
||||
{XDP_RX_SOFT_RESET, 0},
|
||||
{XDP_RX_AUX_REQ_IN_PROGRESS, 0},
|
||||
{XDP_RX_REQ_ERROR_COUNT, 0},
|
||||
{XDP_RX_REQ_COUNT, 0},
|
||||
{XDP_RX_HPD_INTERRUPT, 0},
|
||||
{XDP_RX_REQ_CLK_WIDTH, 0},
|
||||
{XDP_RX_REQ_CMD, 0},
|
||||
{XDP_RX_REQ_ADDRESS, 0},
|
||||
{XDP_RX_REQ_LENGTH, 0},
|
||||
{XDP_RX_INTERRUPT_CAUSE, 0},
|
||||
{XDP_RX_INTERRUPT_MASK_1, 0},
|
||||
{XDP_RX_INTERRUPT_CAUSE_1, 0},
|
||||
{XDP_RX_HSYNC_WIDTH, 0xF0F},
|
||||
{XDP_RX_FAST_I2C_DIVIDER, 0},
|
||||
{XDP_RX_LOCAL_EDID_VIDEO, 0},
|
||||
{XDP_RX_LOCAL_EDID_AUDIO, 0},
|
||||
{XDP_RX_REMOTE_CMD, 0},
|
||||
{XDP_RX_DEVICE_SERVICE_IRQ, 0},
|
||||
{XDP_RX_VIDEO_UNSUPPORTED, 0},
|
||||
{XDP_RX_AUDIO_UNSUPPORTED, 0},
|
||||
{XDP_RX_OVER_LINK_BW_SET, 0},
|
||||
{XDP_RX_OVER_LANE_COUNT_SET, 0},
|
||||
{XDP_RX_OVER_TP_SET, 0},
|
||||
{XDP_RX_OVER_TRAINING_LANE0_SET, 0},
|
||||
{XDP_RX_OVER_TRAINING_LANE1_SET, 0},
|
||||
{XDP_RX_OVER_TRAINING_LANE2_SET, 0},
|
||||
{XDP_RX_OVER_TRAINING_LANE3_SET, 0},
|
||||
{XDP_RX_OVER_CTRL_DPCD, 0},
|
||||
{XDP_RX_OVER_DOWNSPREAD_CTRL, 0},
|
||||
{XDP_RX_OVER_LINK_QUAL_LANE0_SET, 0},
|
||||
{XDP_RX_OVER_LINK_QUAL_LANE1_SET, 0},
|
||||
{XDP_RX_OVER_LINK_QUAL_LANE2_SET, 0},
|
||||
{XDP_RX_OVER_LINK_QUAL_LANE3_SET, 0},
|
||||
{XDP_RX_MST_CAP, 0},
|
||||
{XDP_RX_SINK_COUNT, 0},
|
||||
{XDP_RX_GUID0, 0},
|
||||
{XDP_RX_GUID1, 0},
|
||||
{XDP_RX_GUID2, 0},
|
||||
{XDP_RX_GUID3, 0},
|
||||
{XDP_RX_OVER_GUID, 0}
|
||||
};
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDp driver/device depending on whether
|
||||
* the core is operating in TX or RX mode. The sanity test checks whether or not
|
||||
* all tested registers hold their default reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDp_SelfTest(XDp *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
if (XDp_CfgGetCoreType(&InstancePtr->Config) == XDP_TX) {
|
||||
Status = XDp_TxSelfTest(InstancePtr);
|
||||
}
|
||||
else {
|
||||
Status = XDp_RxSelfTest(InstancePtr);
|
||||
}
|
||||
|
||||
return Status;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDp driver/device. The sanity test
|
||||
* checks whether or not all tested registers hold their default reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static u32 XDp_TxSelfTest(XDp *InstancePtr)
|
||||
{
|
||||
u8 Index;
|
||||
u8 StreamIndex;
|
||||
u32 StreamOffset;
|
||||
u32 Val;
|
||||
|
||||
/* Compare general usage registers with their default values. */
|
||||
for (Index = 0; Index < 53; Index++) {
|
||||
Val = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
TxResetValues[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != TxResetValues[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Compare main stream attribute (MSA) registers for all 4 streams with
|
||||
* their default values. */
|
||||
for (StreamIndex = 0; StreamIndex < 4; StreamIndex++) {
|
||||
/* Determine the MSA register offset for each stream. */
|
||||
if (StreamIndex == 0) {
|
||||
StreamOffset = 0;
|
||||
}
|
||||
else if (StreamIndex == 1) {
|
||||
StreamOffset = XDP_TX_STREAM2_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 2) {
|
||||
StreamOffset = XDP_TX_STREAM3_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 3) {
|
||||
StreamOffset = XDP_TX_STREAM4_MSA_START_OFFSET;
|
||||
}
|
||||
|
||||
for (Index = 0; Index < 20; Index++) {
|
||||
Val = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
StreamOffset + TxResetValuesMsa[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != TxResetValuesMsa[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* All tested registers hold their default reset values. */
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDp driver/device running in RX mode.
|
||||
* The sanity test checks whether or not all tested registers hold their default
|
||||
* reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static u32 XDp_RxSelfTest(XDp *InstancePtr)
|
||||
{
|
||||
u8 Index;
|
||||
u32 Val;
|
||||
|
||||
/* Compare general usage registers with their default values. */
|
||||
for (Index = 0; Index < 46; Index++) {
|
||||
Val = XDp_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
RxResetValues[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != RxResetValues[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* All tested registers hold their default reset values. */
|
||||
return XST_SUCCESS;
|
||||
}
|
|
@ -50,7 +50,7 @@
|
|||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xdp.h"
|
||||
#include "xparameters.h"
|
||||
|
||||
/*************************** Variable Declarations ****************************/
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
@ -32,11 +32,12 @@
|
|||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_spm.c
|
||||
* @file xdp_spm.c
|
||||
*
|
||||
* This file contains the stream policy maker functions for the XDptx driver.
|
||||
* These functions set up the DisplayPort TX core's main stream attributes that
|
||||
* determine how a video stream will be displayed.
|
||||
* This file contains the stream policy maker functions for the XDp driver.
|
||||
* These functions set up the DisplayPort TX core's main stream attributes (MSA)
|
||||
* that determine how a video stream will be displayed and also some DisplayPort
|
||||
* RX MSA-related functions.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
|
@ -45,23 +46,18 @@
|
|||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* als 08/03/14 Initial MST addition.
|
||||
* 3.0 als 12/16/14 Updated to use common video library.
|
||||
* Stream naming now starts at 1 to follow IP.
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xdptx_hw.h"
|
||||
#include "xstatus.h"
|
||||
#include "xdp.h"
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel);
|
||||
static void XDp_TxCalculateTs(XDp *InstancePtr, u8 Stream, u8 BitsPerPixel);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
|
@ -93,7 +89,7 @@ static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel);
|
|||
* - Vertical sync pulse width
|
||||
* - Vertical back porch
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to calculate the MSA
|
||||
* values.
|
||||
*
|
||||
|
@ -104,31 +100,31 @@ static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel);
|
|||
* calculated values are untouched in the MsaConfig structure.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
||||
void XDp_TxCfgMsaRecalculate(XDp *InstancePtr, u8 Stream)
|
||||
{
|
||||
u32 VideoBw;
|
||||
u32 LinkBw;
|
||||
u32 WordsPerLine;
|
||||
u8 BitsPerPixel;
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDptx_LinkConfig *LinkConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
XDp_TxLinkConfig *LinkConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
LinkConfig = &InstancePtr->LinkConfig;
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
LinkConfig = &InstancePtr->TxInstance.LinkConfig;
|
||||
|
||||
/* Verify the rest of the values used. */
|
||||
Xil_AssertVoid((LinkConfig->LinkRate == XDPTX_LINK_BW_SET_162GBPS) ||
|
||||
(LinkConfig->LinkRate == XDPTX_LINK_BW_SET_270GBPS) ||
|
||||
(LinkConfig->LinkRate == XDPTX_LINK_BW_SET_540GBPS));
|
||||
Xil_AssertVoid((LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_1) ||
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_2) ||
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_4));
|
||||
Xil_AssertVoid((LinkConfig->LinkRate == XDP_TX_LINK_BW_SET_162GBPS) ||
|
||||
(LinkConfig->LinkRate == XDP_TX_LINK_BW_SET_270GBPS) ||
|
||||
(LinkConfig->LinkRate == XDP_TX_LINK_BW_SET_540GBPS));
|
||||
Xil_AssertVoid((LinkConfig->LaneCount == XDP_TX_LANE_COUNT_SET_1) ||
|
||||
(LinkConfig->LaneCount == XDP_TX_LANE_COUNT_SET_2) ||
|
||||
(LinkConfig->LaneCount == XDP_TX_LANE_COUNT_SET_4));
|
||||
Xil_AssertVoid((MsaConfig->SynchronousClockMode == 0) ||
|
||||
(MsaConfig->SynchronousClockMode == 1));
|
||||
Xil_AssertVoid((MsaConfig->DynamicRange == 0) ||
|
||||
|
@ -145,11 +141,11 @@ void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
|||
* capabilities of the DisplayPort TX core. */
|
||||
if (MsaConfig->OverrideUserPixelWidth == 0) {
|
||||
if ((MsaConfig->PixelClockHz > 300000000) &&
|
||||
(LinkConfig->LaneCount == XDPTX_LANE_COUNT_SET_4)) {
|
||||
(LinkConfig->LaneCount == XDP_TX_LANE_COUNT_SET_4)) {
|
||||
MsaConfig->UserPixelWidth = 4;
|
||||
}
|
||||
else if ((MsaConfig->PixelClockHz > 75000000) &&
|
||||
(LinkConfig->LaneCount != XDPTX_LANE_COUNT_SET_1)) {
|
||||
(LinkConfig->LaneCount != XDP_TX_LANE_COUNT_SET_1)) {
|
||||
MsaConfig->UserPixelWidth = 2;
|
||||
}
|
||||
else {
|
||||
|
@ -166,35 +162,35 @@ void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
|||
|
||||
/* Miscellaneous attributes. */
|
||||
if (MsaConfig->BitsPerColor == 6) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_6BPC;
|
||||
MsaConfig->Misc0 = XDP_TX_MAIN_STREAMX_MISC0_BDC_6BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 8) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_8BPC;
|
||||
MsaConfig->Misc0 = XDP_TX_MAIN_STREAMX_MISC0_BDC_8BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 10) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_10BPC;
|
||||
MsaConfig->Misc0 = XDP_TX_MAIN_STREAMX_MISC0_BDC_10BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 12) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_12BPC;
|
||||
MsaConfig->Misc0 = XDP_TX_MAIN_STREAMX_MISC0_BDC_12BPC;
|
||||
}
|
||||
else if (MsaConfig->BitsPerColor == 16) {
|
||||
MsaConfig->Misc0 = XDPTX_MAIN_STREAMX_MISC0_BDC_16BPC;
|
||||
MsaConfig->Misc0 = XDP_TX_MAIN_STREAMX_MISC0_BDC_16BPC;
|
||||
}
|
||||
MsaConfig->Misc0 = (MsaConfig->Misc0 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_BDC_SHIFT) |
|
||||
XDP_TX_MAIN_STREAMX_MISC0_BDC_SHIFT) |
|
||||
(MsaConfig->YCbCrColorimetry <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT) |
|
||||
XDP_TX_MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT) |
|
||||
(MsaConfig->DynamicRange <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT) |
|
||||
XDP_TX_MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT) |
|
||||
(MsaConfig->ComponentFormat <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT) |
|
||||
XDP_TX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT) |
|
||||
(MsaConfig->SynchronousClockMode);
|
||||
MsaConfig->Misc1 = 0;
|
||||
|
||||
/* Determine the number of bits per pixel for the specified color
|
||||
* component format. */
|
||||
if (MsaConfig->ComponentFormat ==
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422) {
|
||||
XDP_TX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422) {
|
||||
/* YCbCr422 color component format. */
|
||||
BitsPerPixel = MsaConfig->BitsPerColor * 2;
|
||||
}
|
||||
|
@ -212,13 +208,14 @@ void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
|||
|
||||
MsaConfig->DataPerLane = WordsPerLine - LinkConfig->LaneCount;
|
||||
if ((WordsPerLine % LinkConfig->LaneCount) != 0) {
|
||||
MsaConfig->DataPerLane += (WordsPerLine % LinkConfig->LaneCount);
|
||||
MsaConfig->DataPerLane +=
|
||||
(WordsPerLine % LinkConfig->LaneCount);
|
||||
}
|
||||
|
||||
if (InstancePtr->MstEnable == 1) {
|
||||
if (InstancePtr->TxInstance.MstEnable == 1) {
|
||||
/* Do time slot (and payload bandwidth number) calculations for
|
||||
* MST. */
|
||||
XDptx_CalculateTs(InstancePtr, Stream, BitsPerPixel);
|
||||
XDp_TxCalculateTs(InstancePtr, Stream, BitsPerPixel);
|
||||
|
||||
MsaConfig->InitWait = 0;
|
||||
}
|
||||
|
@ -252,10 +249,10 @@ void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
|||
/**
|
||||
* This function sets the Main Stream Attribute (MSA) values in the
|
||||
* configuration structure to match one of the standard display mode timings
|
||||
* from the XDptx_DmtModes[] standard Display Monitor Timing (DMT) table. The
|
||||
* XDptx_VideoMode enumeration in xdptx.h lists the available video modes.
|
||||
* from the XDp_TxDmtModes[] standard Display Monitor Timing (DMT) table. The
|
||||
* XDp_TxVideoMode enumeration in xvidc.h lists the available video modes.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param VideoMode is one of the enumerated standard video modes that is
|
||||
|
@ -263,23 +260,23 @@ void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream)
|
|||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* MSA values associated to the specified video mode.
|
||||
* @note The InstancePtr->TxInstance.MsaConfig structure is modified to
|
||||
* reflect the MSA values associated to the specified video mode.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
||||
void XDp_TxCfgMsaUseStandardVideoMode(XDp *InstancePtr, u8 Stream,
|
||||
XVidC_VideoMode VideoMode)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(VideoMode < XVIDC_VM_NUM_SUPPORTED);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
|
||||
/* Configure the MSA values from the display monitor DMT table. */
|
||||
MsaConfig->Vtm.VmId = XVidC_VideoTimingModes[VideoMode].VmId;
|
||||
|
@ -322,7 +319,7 @@ void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
|||
XVidC_GetPixelClockHzByVmId(MsaConfig->Vtm.VmId);
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
XDp_TxCfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -332,86 +329,86 @@ void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
|||
* Timing Mode (PTM) information is stored in the sink's Extended Display
|
||||
* Identification Data (EDID).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param Edid is a pointer to the Edid to use for the specified stream.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* main stream attribute values associated to the preferred timing
|
||||
* of the sink monitor.
|
||||
* @note The InstancePtr->TxInstance.MsaConfig structure is modified to
|
||||
* reflect the main stream attribute values associated to the
|
||||
* preferred timing of the sink monitor.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream, u8 *Edid)
|
||||
void XDp_TxCfgMsaUseEdidPreferredTiming(XDp *InstancePtr, u8 Stream, u8 *Edid)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
u8 *Ptm;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
Xil_AssertVoid(Edid != NULL);
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
Ptm = &Edid[XDPTX_EDID_PTM];
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
Ptm = &Edid[XDP_EDID_PTM];
|
||||
|
||||
/* Configure the MSA values with the PTM information as
|
||||
* specified by the preferred Detailed Timing Descriptor (DTD) of the
|
||||
* monitor's EDID.
|
||||
* Note, the PTM is only required for EDID versions 1.3 a newer. Earlier
|
||||
* versions may not contain this information. */
|
||||
u16 HBlank = ((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HBLANK_LSB];
|
||||
u16 HBlank = ((Ptm[XDP_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDP_EDID_DTD_HBLANK_LSB];
|
||||
|
||||
u16 VBlank = ((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_VBLANK_LSB];
|
||||
u16 VBlank = ((Ptm[XDP_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XBLANK_MASK) << 8) |
|
||||
Ptm[XDP_EDID_DTD_VBLANK_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.HActive =
|
||||
(((Ptm[XDPTX_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HRES_LSB];
|
||||
(((Ptm[XDP_EDID_DTD_HRES_HBLANK_U4] &
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDP_EDID_DTD_HRES_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.VActive =
|
||||
(((Ptm[XDPTX_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDPTX_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_VRES_LSB];
|
||||
(((Ptm[XDP_EDID_DTD_VRES_VBLANK_U4] &
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XRES_MASK) >>
|
||||
XDP_EDID_DTD_XRES_XBLANK_U4_XRES_SHIFT) << 8) |
|
||||
Ptm[XDP_EDID_DTD_VRES_LSB];
|
||||
|
||||
MsaConfig->PixelClockHz = (((Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_MSB] <<
|
||||
8) | Ptm[XDPTX_EDID_DTD_PIXEL_CLK_KHZ_LSB]) * 10) * 1000;
|
||||
MsaConfig->PixelClockHz = (((Ptm[XDP_EDID_DTD_PIXEL_CLK_KHZ_MSB] <<
|
||||
8) | Ptm[XDP_EDID_DTD_PIXEL_CLK_KHZ_LSB]) * 10) * 1000;
|
||||
|
||||
MsaConfig->Vtm.Timing.HFrontPorch =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HFPORCH_LSB];
|
||||
(((Ptm[XDP_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_MASK) >>
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_HFPORCH_SHIFT) << 8) |
|
||||
Ptm[XDP_EDID_DTD_HFPORCH_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.HSyncWidth =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT) << 8) |
|
||||
Ptm[XDPTX_EDID_DTD_HSPW_LSB];
|
||||
(((Ptm[XDP_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_HSPW_MASK) >>
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_HSPW_SHIFT) << 8) |
|
||||
Ptm[XDP_EDID_DTD_HSPW_LSB];
|
||||
|
||||
MsaConfig->Vtm.Timing.F0PVFrontPorch =
|
||||
(((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT) << 8) |
|
||||
((Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK) >>
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT);
|
||||
(((Ptm[XDP_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_MASK) >>
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_VFPORCH_SHIFT) << 8) |
|
||||
((Ptm[XDP_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDP_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_MASK) >>
|
||||
XDP_EDID_DTD_VFPORCH_VSPW_L4_VFPORCH_SHIFT);
|
||||
|
||||
MsaConfig->Vtm.Timing.F0PVSyncWidth =
|
||||
((Ptm[XDPTX_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDPTX_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK) << 8) |
|
||||
(Ptm[XDPTX_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDPTX_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK);
|
||||
((Ptm[XDP_EDID_DTD_XFPORCH_XSPW_U2] &
|
||||
XDP_EDID_DTD_XFPORCH_XSPW_U2_VSPW_MASK) << 8) |
|
||||
(Ptm[XDP_EDID_DTD_VFPORCH_VSPW_L4] &
|
||||
XDP_EDID_DTD_VFPORCH_VSPW_L4_VSPW_MASK);
|
||||
|
||||
/* Compute video mode timing values. */
|
||||
MsaConfig->Vtm.Timing.HBackPorch = HBlank -
|
||||
|
@ -439,16 +436,16 @@ void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream, u8 *Edid)
|
|||
MsaConfig->Vtm.VmId = XVIDC_VM_USE_EDID_PREFERRED;
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
XDp_TxCfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function takes a the main stream attributes from MsaConfigCustom and
|
||||
* copies them into InstancePtr->MsaConfig. If desired, given a base set of
|
||||
* attributes, the rest of the attributes may be derived. The minimal required
|
||||
* main stream attributes (MSA) that must be contained in the MsaConfigCustom
|
||||
* structure are:
|
||||
* copies them into InstancePtr->TxInstance.MsaConfig. If desired, given a base
|
||||
* set of attributes, the rest of the attributes may be derived. The minimal
|
||||
* required main stream attributes (MSA) that must be contained in the
|
||||
* MsaConfigCustom structure are:
|
||||
* - Pixel clock (in Hz)
|
||||
* - Frame rate
|
||||
* - Horizontal active resolution
|
||||
|
@ -464,33 +461,34 @@ void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream, u8 *Edid)
|
|||
* - Vertical total
|
||||
* - Vertical sync polarity
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which the MSA values will be
|
||||
* used for.
|
||||
* @param MsaConfigCustom is the structure that will be used to copy the
|
||||
* main stream attributes from (into InstancePtr->MsaConfig).
|
||||
* main stream attributes from (into
|
||||
* InstancePtr->TxInstance.MsaConfig).
|
||||
* @param Recalculate is a boolean enable that determines whether or not
|
||||
* the main stream attributes should be recalculated.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified with the new
|
||||
* values.
|
||||
* @note The InstancePtr->TxInstance.MsaConfig structure is modified with
|
||||
* the new values.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
||||
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate)
|
||||
void XDp_TxCfgMsaUseCustom(XDp *InstancePtr, u8 Stream,
|
||||
XDp_TxMainStreamAttributes *MsaConfigCustom, u8 Recalculate)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
Xil_AssertVoid(MsaConfigCustom != NULL);
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
|
||||
/* Copy the MSA values from the user configuration structure. */
|
||||
MsaConfig->PixelClockHz = MsaConfigCustom->PixelClockHz;
|
||||
|
@ -531,7 +529,7 @@ void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
|||
|
||||
if (Recalculate) {
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
XDp_TxCfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
else {
|
||||
/* Use the custom values for the rest. */
|
||||
|
@ -552,39 +550,40 @@ void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
|||
/**
|
||||
* This function sets the bits per color value of the video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to set the color depth.
|
||||
* @param BitsPerColor is the new number of bits per color to use.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note The InstancePtr->MsaConfig structure is modified to reflect the
|
||||
* new main stream attributes associated with a new bits per color
|
||||
* value.
|
||||
* @note The InstancePtr->TxInstance.MsaConfig structure is modified to
|
||||
* reflect the new main stream attributes associated with a new
|
||||
* bits per color value.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor)
|
||||
void XDp_TxCfgMsaSetBpc(XDp *InstancePtr, u8 Stream, u8 BitsPerColor)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
Xil_AssertVoid((BitsPerColor == 6) || (BitsPerColor == 8) ||
|
||||
(BitsPerColor == 10) || (BitsPerColor == 12) ||
|
||||
(BitsPerColor == 16));
|
||||
|
||||
InstancePtr->MsaConfig[Stream - 1].BitsPerColor = BitsPerColor;
|
||||
InstancePtr->TxInstance.MsaConfig[Stream - 1].BitsPerColor =
|
||||
BitsPerColor;
|
||||
|
||||
/* Calculate the rest of the MSA values. */
|
||||
XDptx_CfgMsaRecalculate(InstancePtr, Stream);
|
||||
XDp_TxCfgMsaRecalculate(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function enables or disables synchronous clock mode for a video stream.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to enable or disable
|
||||
* synchronous clock mode.
|
||||
* @param Enable if set to 1, will enable synchronous clock mode.
|
||||
|
@ -595,28 +594,29 @@ void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable)
|
||||
void XDp_TxCfgMsaEnSynchClkMode(XDp *InstancePtr, u8 Stream, u8 Enable)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) ||
|
||||
(Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
Xil_AssertVoid((Enable == 0) || (Enable == 1));
|
||||
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
|
||||
MsaConfig->SynchronousClockMode = Enable;
|
||||
|
||||
if (Enable == 1) {
|
||||
MsaConfig->Misc0 |= (1 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
XDP_TX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
}
|
||||
else {
|
||||
MsaConfig->Misc0 &= ~(1 <<
|
||||
XDPTX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
XDP_TX_MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -626,7 +626,7 @@ void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable)
|
|||
* TX core and sets them to the values specified in the main stream attributes
|
||||
* configuration structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to set the MSA values for.
|
||||
*
|
||||
* @return None.
|
||||
|
@ -634,17 +634,17 @@ void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream)
|
||||
void XDp_TxSetVideoMode(XDp *InstancePtr, u8 Stream)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
|
||||
XDptx_ClearMsaValues(InstancePtr, Stream);
|
||||
XDptx_SetMsaValues(InstancePtr, Stream);
|
||||
XDp_TxClearMsaValues(InstancePtr, Stream);
|
||||
XDp_TxSetMsaValues(InstancePtr, Stream);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -652,7 +652,7 @@ void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream)
|
|||
* This function clears the main stream attributes registers of the DisplayPort
|
||||
* TX core.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to clear the MSA values.
|
||||
*
|
||||
* @return None.
|
||||
|
@ -660,60 +660,61 @@ void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream)
|
||||
void XDp_TxClearMsaValues(XDp *InstancePtr, u8 Stream)
|
||||
{
|
||||
XDp_Config *Config;
|
||||
u32 StreamOffset[4] = {0, XDPTX_STREAM2_MSA_START_OFFSET,
|
||||
XDPTX_STREAM3_MSA_START_OFFSET, XDPTX_STREAM4_MSA_START_OFFSET};
|
||||
u32 StreamOffset[4] = {0, XDP_TX_STREAM2_MSA_START_OFFSET,
|
||||
XDP_TX_STREAM3_MSA_START_OFFSET,
|
||||
XDP_TX_STREAM4_MSA_START_OFFSET};
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
|
||||
Config = &InstancePtr->Config;
|
||||
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_HTOTAL +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_VTOTAL +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_POLARITY +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_POLARITY +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_HSWIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_VSWIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HRES +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_HRES +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VRES +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_VRES +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSTART +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_HSTART +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSTART +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_VSTART +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC0 +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_MISC0 +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC1 +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MAIN_STREAM_MISC1 +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_PIXEL_WIDTH +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_USER_PIXEL_WIDTH +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_USER_DATA_COUNT_PER_LANE +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_M_VID +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_M_VID +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_N_VID +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_N_VID +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_STREAM1 + (Stream - 1) * 4, 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_TU_SIZE +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_STREAM1 + (Stream - 1) * 4, 0);
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_TU_SIZE +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MIN_BYTES_PER_TU +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_MIN_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_FRAC_BYTES_PER_TU +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_FRAC_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_INIT_WAIT +
|
||||
XDp_WriteReg(Config->BaseAddr, XDP_TX_INIT_WAIT +
|
||||
StreamOffset[Stream - 1], 0);
|
||||
}
|
||||
|
||||
|
@ -723,7 +724,7 @@ void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream)
|
|||
* core with the values specified in the main stream attributes configuration
|
||||
* structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number for which to set the MSA values for.
|
||||
*
|
||||
* @return None.
|
||||
|
@ -731,81 +732,110 @@ void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream)
|
||||
void XDp_TxSetMsaValues(XDp *InstancePtr, u8 Stream)
|
||||
{
|
||||
XDp_Config *Config;
|
||||
XDptx_MainStreamAttributes *MsaConfig;
|
||||
u32 StreamOffset[4] = {0, XDPTX_STREAM2_MSA_START_OFFSET,
|
||||
XDPTX_STREAM3_MSA_START_OFFSET, XDPTX_STREAM4_MSA_START_OFFSET};
|
||||
XDp_Config *ConfigPtr;
|
||||
XDp_TxMainStreamAttributes *MsaConfig;
|
||||
u32 StreamOffset[4] = {0, XDP_TX_STREAM2_MSA_START_OFFSET,
|
||||
XDP_TX_STREAM3_MSA_START_OFFSET,
|
||||
XDP_TX_STREAM4_MSA_START_OFFSET};
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((Stream == XDPTX_STREAM_ID1) ||
|
||||
(Stream == XDPTX_STREAM_ID2) || (Stream == XDPTX_STREAM_ID3) ||
|
||||
(Stream == XDPTX_STREAM_ID4));
|
||||
Xil_AssertVoid((Stream == XDP_TX_STREAM_ID1) ||
|
||||
(Stream == XDP_TX_STREAM_ID2) || (Stream == XDP_TX_STREAM_ID3) ||
|
||||
(Stream == XDP_TX_STREAM_ID4));
|
||||
|
||||
Config = &InstancePtr->Config;
|
||||
MsaConfig = &InstancePtr->MsaConfig[Stream - 1];
|
||||
ConfigPtr = &InstancePtr->Config;
|
||||
MsaConfig = &InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
|
||||
/* Set the main stream attributes to the associated DisplayPort TX core
|
||||
* registers. */
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HTOTAL +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_HTOTAL +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.Timing.HTotal);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VTOTAL +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_VTOTAL +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.F0PVTotal);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_POLARITY +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_POLARITY +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.HSyncPolarity |
|
||||
(MsaConfig->Vtm.Timing.VSyncPolarity <<
|
||||
XDPTX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT));
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSWIDTH +
|
||||
XDP_TX_MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT));
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_HSWIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.Timing.HSyncWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSWIDTH +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_VSWIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->Vtm.Timing.F0PVSyncWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HRES +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_HRES +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.HActive);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VRES +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_VRES +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->Vtm.Timing.VActive);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_HSTART +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_HSTART +
|
||||
StreamOffset[Stream - 1], MsaConfig->HStart);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_VSTART +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_VSTART +
|
||||
StreamOffset[Stream - 1], MsaConfig->VStart);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC0 +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_MISC0 +
|
||||
StreamOffset[Stream - 1], MsaConfig->Misc0);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MAIN_STREAM_MISC1 +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MAIN_STREAM_MISC1 +
|
||||
StreamOffset[Stream - 1], MsaConfig->Misc1);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_M_VID +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_M_VID +
|
||||
StreamOffset[Stream - 1],
|
||||
MsaConfig->PixelClockHz / 1000);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_N_VID +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_N_VID +
|
||||
StreamOffset[Stream - 1], MsaConfig->NVid);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_PIXEL_WIDTH +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_USER_PIXEL_WIDTH +
|
||||
StreamOffset[Stream - 1], MsaConfig->UserPixelWidth);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_USER_DATA_COUNT_PER_LANE +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_USER_DATA_COUNT_PER_LANE +
|
||||
StreamOffset[Stream - 1], MsaConfig->DataPerLane);
|
||||
|
||||
/* Set the transfer unit values to the associated DisplayPort TX core
|
||||
* registers. */
|
||||
if (InstancePtr->MstEnable == 1) {
|
||||
XDptx_WriteReg(Config->BaseAddr,
|
||||
XDPTX_STREAM1 + (Stream - 1) * 4,
|
||||
if (InstancePtr->TxInstance.MstEnable == 1) {
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr,
|
||||
XDP_TX_STREAM1 + (Stream - 1) * 4,
|
||||
((MsaConfig->AvgBytesPerTU / 1000) << 16) |
|
||||
(MsaConfig->AvgBytesPerTU % 1000));
|
||||
}
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_TU_SIZE +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_TU_SIZE +
|
||||
StreamOffset[Stream - 1], MsaConfig->TransferUnitSize);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_MIN_BYTES_PER_TU +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_MIN_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], MsaConfig->AvgBytesPerTU / 1000);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_FRAC_BYTES_PER_TU +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_FRAC_BYTES_PER_TU +
|
||||
StreamOffset[Stream - 1], MsaConfig->AvgBytesPerTU % 1000);
|
||||
XDptx_WriteReg(Config->BaseAddr, XDPTX_INIT_WAIT +
|
||||
XDp_WriteReg(ConfigPtr->BaseAddr, XDP_TX_INIT_WAIT +
|
||||
StreamOffset[Stream - 1], MsaConfig->InitWait);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function configures the number of pixels output through the user data
|
||||
* interface.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param UserPixelWidth is the user pixel width to be configured.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDp_RxSetUserPixelWidth(XDp *InstancePtr, u8 UserPixelWidth)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((UserPixelWidth == 1) || (UserPixelWidth == 2) ||
|
||||
(UserPixelWidth == 4));
|
||||
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_USER_PIXEL_WIDTH,
|
||||
UserPixelWidth);
|
||||
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_SOFT_RESET, 0x1);
|
||||
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_SOFT_RESET, 0x0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* When the driver is in multi-stream transport (MST) mode, this function will
|
||||
|
@ -814,7 +844,7 @@ void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream)
|
|||
* required for allocating the bandwidth, and the average bytes per transfer
|
||||
* unit (both the integer and the fractional part).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param InstancePtr is a pointer to the XDp instance.
|
||||
* @param Stream is the stream number to make the calculations for.
|
||||
* @param BitsPerPixel is the number of bits that is used to store one
|
||||
* pixel.
|
||||
|
@ -824,11 +854,11 @@ void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream)
|
|||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel)
|
||||
static void XDp_TxCalculateTs(XDp *InstancePtr, u8 Stream, u8 BitsPerPixel)
|
||||
{
|
||||
XDptx_MainStreamAttributes *MsaConfig =
|
||||
&InstancePtr->MsaConfig[Stream - 1];
|
||||
XDptx_LinkConfig *LinkConfig = &InstancePtr->LinkConfig;
|
||||
XDp_TxMainStreamAttributes *MsaConfig =
|
||||
&InstancePtr->TxInstance.MsaConfig[Stream - 1];
|
||||
XDp_TxLinkConfig *LinkConfig = &InstancePtr->TxInstance.LinkConfig;
|
||||
double PeakPixelBw;
|
||||
u32 LinkBw;
|
||||
double Average_StreamSymbolTimeSlotsPerMTP;
|
||||
|
@ -842,19 +872,20 @@ static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel)
|
|||
LinkBw = (LinkConfig->LaneCount * LinkConfig->LinkRate * 27);
|
||||
|
||||
/* Calculate the payload bandiwdth number (PBN). */
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn =
|
||||
InstancePtr->TxInstance.MstStreamConfig[Stream - 1].MstPbn =
|
||||
1.006 * PeakPixelBw * ((double)64 / 54);
|
||||
/* Ceil - round up if required, avoiding overhead of math.h. */
|
||||
if ((double)(1.006 * PeakPixelBw * ((double)64 / 54)) >
|
||||
((double)InstancePtr->MstStreamConfig[Stream - 1].MstPbn)) {
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn++;
|
||||
((double)InstancePtr->TxInstance.MstStreamConfig[
|
||||
Stream - 1].MstPbn)) {
|
||||
InstancePtr->TxInstance.MstStreamConfig[Stream - 1].MstPbn++;
|
||||
}
|
||||
|
||||
/* Calculate the average stream symbol time slots per MTP. */
|
||||
Average_StreamSymbolTimeSlotsPerMTP = (64.0 * PeakPixelBw / LinkBw);
|
||||
MaximumTarget_Average_StreamSymbolTimeSlotsPerMTP = (54.0 *
|
||||
((double)InstancePtr->MstStreamConfig[Stream - 1].MstPbn /
|
||||
LinkBw));
|
||||
((double)InstancePtr->TxInstance.MstStreamConfig[Stream - 1].
|
||||
MstPbn / LinkBw));
|
||||
|
||||
/* The target value to be found needs to follow the condition:
|
||||
* Average_StreamSymbolTimeSlotsPerMTP <=
|
||||
|
@ -898,7 +929,7 @@ static void XDptx_CalculateTs(XDptx *InstancePtr, u8 Stream, u8 BitsPerPixel)
|
|||
}
|
||||
|
||||
/* Determine the PBN for the stream. */
|
||||
InstancePtr->MstStreamConfig[Stream - 1].MstPbn =
|
||||
InstancePtr->TxInstance.MstStreamConfig[Stream - 1].MstPbn =
|
||||
MsaConfig->TransferUnitSize *
|
||||
(LinkConfig->LaneCount * LinkConfig->LinkRate / 2);
|
||||
}
|
|
@ -1,510 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdprx.c
|
||||
*
|
||||
* Contains a minimal set of functions for the XDprx driver that allow access
|
||||
* to all of the DisplayPort RX core's functionality. See xdprx.h for a detailed
|
||||
* description of the driver.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/14 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdprx.h"
|
||||
#include "xstatus.h"
|
||||
#if defined(__arm__)
|
||||
#include "sleep.h"
|
||||
#elif defined(__MICROBLAZE__)
|
||||
#include "microblaze_sleep.h"
|
||||
#endif
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
static u32 XDprx_WaitPhyReady(XDprx *InstancePtr, u8 Mask);
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function retrieves the configuration for this DisplayPort RX instance
|
||||
* and fills in the InstancePtr->Config structure.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param ConfigPtr is a pointer to the configuration structure that will
|
||||
* be used to copy the settings from.
|
||||
* @param EffectiveAddr is the device base address in the virtual memory
|
||||
* space. If the address translation is not used, then the physical
|
||||
* address is passed.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note Unexpected errors may occur if the address mapping is changed
|
||||
* after this function is invoked.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_CfgInitialize(XDprx *InstancePtr, XDp_Config *ConfigPtr,
|
||||
u32 EffectiveAddr)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(ConfigPtr != NULL);
|
||||
Xil_AssertVoid(EffectiveAddr != 0x0);
|
||||
|
||||
InstancePtr->IsReady = 0;
|
||||
|
||||
InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
|
||||
InstancePtr->Config.BaseAddr = EffectiveAddr;
|
||||
InstancePtr->Config.SAxiClkHz = ConfigPtr->SAxiClkHz;
|
||||
|
||||
InstancePtr->Config.MaxLaneCount = ConfigPtr->MaxLaneCount;
|
||||
InstancePtr->Config.MaxLinkRate = ConfigPtr->MaxLinkRate;
|
||||
|
||||
InstancePtr->Config.MaxBitsPerColor = ConfigPtr->MaxBitsPerColor;
|
||||
InstancePtr->Config.QuadPixelEn = ConfigPtr->QuadPixelEn;
|
||||
InstancePtr->Config.DualPixelEn = ConfigPtr->DualPixelEn;
|
||||
InstancePtr->Config.YCrCbEn = ConfigPtr->YCrCbEn;
|
||||
InstancePtr->Config.YOnlyEn = ConfigPtr->YOnlyEn;
|
||||
InstancePtr->Config.PayloadDataWidth = ConfigPtr->PayloadDataWidth;
|
||||
|
||||
InstancePtr->Config.SecondaryChEn = ConfigPtr->SecondaryChEn;
|
||||
InstancePtr->Config.NumAudioChs = ConfigPtr->NumAudioChs;
|
||||
|
||||
InstancePtr->Config.MstSupport = ConfigPtr->MstSupport;
|
||||
InstancePtr->Config.NumMstStreams = ConfigPtr->NumMstStreams;
|
||||
|
||||
InstancePtr->Config.DpProtocol = ConfigPtr->DpProtocol;
|
||||
|
||||
InstancePtr->Config.IsRx = ConfigPtr->IsRx;
|
||||
|
||||
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function prepares the DisplayPort RX core for use.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the DisplayPort RX core was successfully
|
||||
* initialized.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDprx_InitializeRx(XDprx *InstancePtr)
|
||||
{
|
||||
u32 Status;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
/* Disable the main link. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_LINK_ENABLE, 0x0);
|
||||
|
||||
/* Set the AUX clock divider. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_AUX_CLK_DIVIDER,
|
||||
(InstancePtr->Config.SAxiClkHz / 1000000));
|
||||
|
||||
/* Put both GT RX/TX and CPLL into reset. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG,
|
||||
XDPRX_PHY_CONFIG_GTPLL_RESET_MASK |
|
||||
XDPRX_PHY_CONFIG_GTRX_RESET_MASK);
|
||||
|
||||
/* Release CPLL reset. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG,
|
||||
XDPRX_PHY_CONFIG_GTRX_RESET_MASK);
|
||||
|
||||
/* Wait until all lane CPLLs have locked. */
|
||||
Status = XDprx_WaitPhyReady(InstancePtr,
|
||||
XDPRX_PHY_STATUS_PLL_LANE0_1_LOCK_MASK |
|
||||
XDPRX_PHY_STATUS_PLL_LANE2_3_LOCK_MASK);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Remove the reset from the PHY. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG,
|
||||
XDPRX_PHY_CONFIG_PHY_RESET_ENABLE_MASK);
|
||||
|
||||
/* Wait until the PHY has completed the reset cycle. */
|
||||
Status = XDprx_WaitPhyReady(InstancePtr,
|
||||
XDPRX_PHY_STATUS_ALL_LANES_READY_MASK |
|
||||
XDPRX_PHY_STATUS_PLL_FABRIC_LOCK_MASK |
|
||||
XDPRX_PHY_STATUS_RX_CLK_LOCK_MASK);
|
||||
if (Status != XST_SUCCESS) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
|
||||
/* Enable the RX core. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_LINK_ENABLE, 0x1);
|
||||
|
||||
/* Set other user parameters. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_MIN_VOLTAGE_SWING,
|
||||
0x01);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SINK_COUNT, 0x01);
|
||||
/* Set the AUX training interval. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x1);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_TP_SET,
|
||||
(2 << XDPRX_OVER_TP_SET_TRAINING_AUX_RD_INTERVAL_SHIFT));
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x0);
|
||||
/* Set the link configuration.*/
|
||||
XDprx_SetLinkRate(InstancePtr, InstancePtr->LinkConfig.LinkRate);
|
||||
XDprx_SetLaneCount(InstancePtr, InstancePtr->LinkConfig.LaneCount);
|
||||
/* Set the interrupt masks. */
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_INTERRUPT_MASK,
|
||||
~XDPRX_INTERRUPT_MASK_ALL_MASK);
|
||||
|
||||
/* Enable the display timing generator. */
|
||||
XDprx_DtgEn(InstancePtr);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function checks if the reciever's internal registers indicate that link
|
||||
* training has complete. That is, training has achieved channel equalization,
|
||||
* symbol lock, and interlane alignment for all lanes currently in use.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the RX device has achieved clock recovery,
|
||||
* channel equalization, symbol lock, and interlane alignment.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDprx_CheckLinkStatus(XDprx *InstancePtr)
|
||||
{
|
||||
u8 LaneCount;
|
||||
u8 LaneStatus[2];
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
LaneCount = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_DPCD_LANE_COUNT_SET);
|
||||
|
||||
LaneStatus[0] = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_DPCD_LANE01_STATUS);
|
||||
LaneStatus[1] = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_DPCD_LANE23_STATUS);
|
||||
|
||||
switch (LaneCount) {
|
||||
case 4:
|
||||
if (LaneStatus[1] != 0x77) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
case 2:
|
||||
if ((LaneStatus[0] & 0x70) != 0x70) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
case 1:
|
||||
if ((LaneStatus[0] & 0x07) != 0x07) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function enables the display timing generator (DTG).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_DtgEn(XDprx *InstancePtr)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET,
|
||||
XDPRX_SOFT_RESET_VIDEO_MASK);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET, 0x0);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_DTG_ENABLE, 0x1);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function disables the display timing generator (DTG).
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_DtgDis(XDprx *InstancePtr)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_DTG_ENABLE, 0x0);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET,
|
||||
XDPRX_SOFT_RESET_VIDEO_MASK);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET, 0x0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the maximum data rate to be exposed in the RX device's
|
||||
* DisplayPort Configuration Data (DPCD) registers.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param LinkRate is the link rate to be used over the main link based on
|
||||
* one of the following selects:
|
||||
* - XDPRX_LINK_BW_SET_162GBPS = 0x06 (for a 1.62 Gbps data rate)
|
||||
* - XDPRX_LINK_BW_SET_270GBPS = 0x0A (for a 2.70 Gbps data rate)
|
||||
* - XDPRX_LINK_BW_SET_540GBPS = 0x14 (for a 5.40 Gbps data rate)
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetLinkRate(XDprx *InstancePtr, u8 LinkRate)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((LinkRate == XDPRX_OVER_LINK_BW_SET_162GBPS) ||
|
||||
(LinkRate == XDPRX_OVER_LINK_BW_SET_270GBPS) ||
|
||||
(LinkRate == XDPRX_OVER_LINK_BW_SET_540GBPS));
|
||||
|
||||
InstancePtr->LinkConfig.LinkRate = LinkRate;
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x1);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_LINK_BW_SET,
|
||||
LinkRate);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x0);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_LOCAL_EDID_VIDEO,
|
||||
0x1);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function sets the maximum lane count to be exposed in the RX device's
|
||||
* DisplayPort Configuration Data (DPCD) registers.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param LaneCount is the number of lanes to be used over the main link.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetLaneCount(XDprx *InstancePtr, u8 LaneCount)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((LaneCount == XDPRX_OVER_LANE_COUNT_SET_1) ||
|
||||
(LaneCount == XDPRX_OVER_LANE_COUNT_SET_2) ||
|
||||
(LaneCount == XDPRX_OVER_LANE_COUNT_SET_4));
|
||||
|
||||
InstancePtr->LinkConfig.LaneCount = LaneCount;
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x1);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_LANE_COUNT_SET,
|
||||
LaneCount);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_OVER_CTRL_DPCD, 0x0);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_LOCAL_EDID_VIDEO,
|
||||
0x1);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function configures the number of pixels output through the user data
|
||||
* interface.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param UserPixelWidth is the user pixel width to be configured.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetUserPixelWidth(XDprx *InstancePtr, u8 UserPixelWidth)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
Xil_AssertVoid((UserPixelWidth == 1) || (UserPixelWidth == 2) ||
|
||||
(UserPixelWidth == 4));
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_USER_PIXEL_WIDTH,
|
||||
UserPixelWidth);
|
||||
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET, 0x1);
|
||||
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_SOFT_RESET, 0x0);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a custom delay/sleep function to be used by the XDprx
|
||||
* driver.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item (microseconds to delay) that
|
||||
* will be passed to the custom sleep/delay function when it is
|
||||
* invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_SetUserTimerHandler(XDprx *InstancePtr,
|
||||
XDp_TimerHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->UserTimerWaitUs = CallbackFunc;
|
||||
InstancePtr->UserTimerPtr = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the delay/sleep function for the XDprx driver. For the Zynq
|
||||
* family, there exists native sleep functionality. For MicroBlaze however,
|
||||
* there does not exist such functionality. In the MicroBlaze case, the default
|
||||
* method for delaying is to use a predetermined amount of loop iterations. This
|
||||
* method is prone to inaccuracy and dependent on system configuration; for
|
||||
* greater accuracy, the user may supply their own delay/sleep handler, pointed
|
||||
* to by InstancePtr->UserTimerWaitUs, which may have better accuracy if a
|
||||
* hardware timer is used.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param MicroSeconds is the number of microseconds to delay/sleep for.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDprx_WaitUs(XDprx *InstancePtr, u32 MicroSeconds)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
if (MicroSeconds == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
#if defined(__arm__)
|
||||
/* Wait the requested amount of time. */
|
||||
usleep(MicroSeconds);
|
||||
#elif defined(__MICROBLAZE__)
|
||||
if (InstancePtr->UserTimerWaitUs != NULL) {
|
||||
/* Use the timer handler specified by the user for better
|
||||
* accuracy. */
|
||||
InstancePtr->UserTimerWaitUs(InstancePtr, MicroSeconds);
|
||||
}
|
||||
else {
|
||||
/* MicroBlaze sleep only has millisecond accuracy. Round up. */
|
||||
u32 MilliSeconds = (MicroSeconds + 999) / 1000;
|
||||
MB_Sleep(MilliSeconds);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function waits for the DisplayPort PHY to come out of reset.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
* @param Mask specifies which bits to wait for the PHY to be ready on.
|
||||
*
|
||||
* @return
|
||||
* - XST_ERROR_COUNT_MAX if the PHY failed to be ready.
|
||||
* - XST_SUCCESS otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
static u32 XDprx_WaitPhyReady(XDprx *InstancePtr, u8 Mask)
|
||||
{
|
||||
u16 Timeout = 20000;
|
||||
u32 PhyStatus;
|
||||
|
||||
/* Wait until the PHY is ready. */
|
||||
do {
|
||||
PhyStatus = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPRX_PHY_STATUS) & Mask;
|
||||
|
||||
/* Protect against an infinite loop. */
|
||||
if (!Timeout--) {
|
||||
return XST_ERROR_COUNT_MAX;
|
||||
}
|
||||
XDprx_WaitUs(InstancePtr, 20);
|
||||
}
|
||||
while (PhyStatus != Mask);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
|
@ -1,272 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdprx.h
|
||||
*
|
||||
* The Xilinx DisplayPort receiver (DPRX) driver. This driver supports the
|
||||
* Xilinx DisplayPort soft IP core in receive (RX) mode.
|
||||
*
|
||||
* <b>Driver description</b>
|
||||
*
|
||||
* The device driver enables higher-level software (e.g., an application) to
|
||||
* configure and control a DisplayPort RX soft IP.
|
||||
*
|
||||
* This driver gives applications the ability to configure the RX using various
|
||||
* settings, handle and issue interrupts, and modify a subset of its DisplayPort
|
||||
* Configuration Data (DPCD) fields.
|
||||
*
|
||||
* <b>Interrupt processing</b>
|
||||
*
|
||||
* The DisplayPort RX driver may generate a pulse on the hot-plug-detect (HPD)
|
||||
* signal line using the XDprx_GenerateHpdInterrupt function. This allows the RX
|
||||
* to send an interrupt to the upstream TX device, useful for signaling the TX
|
||||
* that it needs to do some checks for changes in downstream devices or a loss
|
||||
* of link training.
|
||||
*
|
||||
* For RX interrupt handling of HPD events or events that happen internal to the
|
||||
* RX, the user hardware design must contain an interrupt controller which the
|
||||
* DisplayPort RX instance's interrupt signal is connected to. The user
|
||||
* application must enable interrupts in the system and set up the interrupt
|
||||
* controller such that the XDprx_InterruptHandler handler will service
|
||||
* interrupts. When the XDprx_InterruptHandler function is invoked, the handler
|
||||
* will identify what type of interrupt has occurred, and will call the
|
||||
* appropriate interrupt handler.
|
||||
*
|
||||
* The DisplayPort RX's XDPRX_INTERRUPT_CAUSE register indicates the type of
|
||||
* interrupt that has occured, and the XDprx_InterruptHandler will use this
|
||||
* information to decide which handler to call.
|
||||
*
|
||||
* The handlers are set up using the XDprx_SetIntr* functions.
|
||||
*
|
||||
* Specific interrupts may be enabled or disabled using the
|
||||
* XDprx_InterruptEnable and XDprx_InterruptDisable functions.
|
||||
*
|
||||
* <b>Multi-stream transport (MST) mode</b>
|
||||
*
|
||||
* The DisplayPort RX driver does not support MST functionality in 2015.1.
|
||||
*
|
||||
* <b>Audio</b>
|
||||
*
|
||||
* The driver does not handle audio.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/14 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XDPRX_H_
|
||||
/* Prevent circular inclusions by using protection macros. */
|
||||
#define XDPRX_H_
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdp.h"
|
||||
#include "xdprx_hw.h"
|
||||
|
||||
/****************************** Type Definitions ******************************/
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the main link settings.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LaneCount; /**< The current lane count of the main
|
||||
link. */
|
||||
u8 LinkRate; /**< The current link rate of the main
|
||||
link. */
|
||||
} XDprx_LinkConfig;
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for interrupts.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDprx_IntrHandler)(void *InstancePtr);
|
||||
|
||||
/**
|
||||
* The XDprx driver instance data. The user is required to allocate a variable
|
||||
* of this type for every XDprx device in the system. A pointer to a variable of
|
||||
* this type is then passed to the driver API functions.
|
||||
*/
|
||||
typedef struct {
|
||||
XDp_Config Config; /**< Configuration structure for
|
||||
the DisplayPort RX
|
||||
core. It is important to
|
||||
keep this member first
|
||||
in the XDprx order. */
|
||||
u32 IsReady; /**< Device is initialized and
|
||||
ready. */
|
||||
XDprx_LinkConfig LinkConfig; /**< Configuration structure for
|
||||
the main link. */
|
||||
XDp_TimerHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
XDprx_IntrHandler IntrVmChangeHandler; /**< Callback function for video
|
||||
mode change
|
||||
interrupts. */
|
||||
void *IntrVmChangeCallbackRef; /**< A pointer to the user data
|
||||
passed to the video mode
|
||||
change callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrPowerStateHandler; /**< Callback function for
|
||||
power state change
|
||||
interrupts. */
|
||||
void *IntrPowerStateCallbackRef; /**< A pointer to the user data
|
||||
passed to the power
|
||||
state change callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrNoVideoHandler; /**< Callback function for
|
||||
no video interrupts. */
|
||||
void *IntrNoVideoCallbackRef; /**< A pointer to the user data
|
||||
passed to the no video
|
||||
callback function. */
|
||||
XDprx_IntrHandler IntrVBlankHandler; /**< Callback function for
|
||||
vertical blanking
|
||||
interrupts. */
|
||||
void *IntrVBlankCallbackRef; /**< A pointer to the user data
|
||||
passed to the vertical
|
||||
blanking callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrTrainingLostHandler; /**< Callback function for
|
||||
training lost
|
||||
interrupts. */
|
||||
void *IntrTrainingLostCallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
lost callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrVideoHandler; /**< Callback function for valid
|
||||
video interrupts. */
|
||||
void *IntrVideoCallbackRef; /**< A pointer to the user data
|
||||
passed to the valid
|
||||
video callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrTrainingDoneHandler; /**< Callback function for
|
||||
training done
|
||||
interrupts. */
|
||||
void *IntrTrainingDoneCallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
done callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrBwChangeHandler; /**< Callback function for
|
||||
bandwidth change
|
||||
interrupts. */
|
||||
void *IntrBwChangeCallbackRef; /**< A pointer to the user data
|
||||
passed to the bandwidth
|
||||
change callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrTp1Handler; /**< Callback function for
|
||||
training pattern 1
|
||||
interrupts. */
|
||||
void *IntrTp1CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 1 callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrTp2Handler; /**< Callback function for
|
||||
training pattern 2
|
||||
interrupts. */
|
||||
void *IntrTp2CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 2 callback
|
||||
function. */
|
||||
XDprx_IntrHandler IntrTp3Handler; /**< Callback function for
|
||||
training pattern 3
|
||||
interrupts. */
|
||||
void *IntrTp3CallbackRef; /**< A pointer to the user data
|
||||
passed to the training
|
||||
pattern 3 callback
|
||||
function. */
|
||||
} XDprx;
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
/* xdprx.c: Setup and initialization functions. */
|
||||
void XDprx_CfgInitialize(XDprx *InstancePtr, XDp_Config *ConfigPtr,
|
||||
u32 EffectiveAddr);
|
||||
u32 XDprx_InitializeRx(XDprx *InstancePtr);
|
||||
|
||||
/* xdprx.c: General usage functions. */
|
||||
u32 XDprx_CheckLinkStatus(XDprx *InstancePtr);
|
||||
void XDprx_DtgEn(XDprx *InstancePtr);
|
||||
void XDprx_DtgDis(XDprx *InstancePtr);
|
||||
void XDprx_SetLinkRate(XDprx *InstancePtr, u8 LinkRate);
|
||||
void XDprx_SetLaneCount(XDprx *InstancePtr, u8 LaneCount);
|
||||
void XDprx_SetUserPixelWidth(XDprx *InstancePtr, u8 UserPixelWidth);
|
||||
void XDprx_SetUserTimerHandler(XDprx *InstancePtr,
|
||||
XDp_TimerHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_WaitUs(XDprx *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/* xdprx_intr.c: Interrupt handling functions. */
|
||||
void XDprx_InterruptHandler(XDprx *InstancePtr);
|
||||
void XDprx_GenerateHpdInterrupt(XDprx *InstancePtr, u16 DurationUs);
|
||||
void XDprx_InterruptEnable(XDprx *InstancePtr, u32 Mask);
|
||||
void XDprx_InterruptDisable(XDprx *InstancePtr, u32 Mask);
|
||||
void XDprx_SetIntrVmChangeHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrPowerStateHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrNoVideoHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrVBlankHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrTrainingLostHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrVideoHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrTrainingDoneHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrBwChangeHandler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrTp1Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrTp2Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
void XDprx_SetIntrTp3Handler(XDprx *InstancePtr,
|
||||
XDprx_IntrHandler CallbackFunc, void *CallbackRef);
|
||||
|
||||
/* xdprx_selftest.c: Self test function. */
|
||||
u32 XDprx_SelfTest(XDprx *InstancePtr);
|
||||
|
||||
#endif /* XDPRX_H_ */
|
File diff suppressed because it is too large
Load diff
|
@ -1,148 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdprx_selftest.c
|
||||
*
|
||||
* This file contains a diagnostic self-test function for the XDprx driver. It
|
||||
* will check many of the DisplayPort RX's register values against the default
|
||||
* reset values as a sanity-check that the core is ready to be used.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 01/20/15 Initial release.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdprx.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Variable Definitions ****************************/
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's general
|
||||
* usage registers.
|
||||
*/
|
||||
u32 ResetValues[46][2] =
|
||||
{
|
||||
{XDPRX_LINK_ENABLE, 0},
|
||||
{XDPRX_AUX_CLK_DIVIDER, 0},
|
||||
{XDPRX_DTG_ENABLE, 0},
|
||||
{XDPRX_USER_PIXEL_WIDTH, 0},
|
||||
{XDPRX_INTERRUPT_MASK, 0x7FFF},
|
||||
{XDPRX_MISC_CTRL, 0},
|
||||
{XDPRX_SOFT_RESET, 0},
|
||||
{XDPRX_AUX_REQ_IN_PROGRESS, 0},
|
||||
{XDPRX_REQ_ERROR_COUNT, 0},
|
||||
{XDPRX_REQ_COUNT, 0},
|
||||
{XDPRX_HPD_INTERRUPT, 0},
|
||||
{XDPRX_REQ_CLK_WIDTH, 0},
|
||||
{XDPRX_REQ_CMD, 0},
|
||||
{XDPRX_REQ_ADDRESS, 0},
|
||||
{XDPRX_REQ_LENGTH, 0},
|
||||
{XDPRX_INTERRUPT_CAUSE, 0},
|
||||
{XDPRX_INTERRUPT_MASK_1, 0},
|
||||
{XDPRX_INTERRUPT_CAUSE_1, 0},
|
||||
{XDPRX_HSYNC_WIDTH, 0xF0F},
|
||||
{XDPRX_FAST_I2C_DIVIDER, 0},
|
||||
{XDPRX_LOCAL_EDID_VIDEO, 0},
|
||||
{XDPRX_LOCAL_EDID_AUDIO, 0},
|
||||
{XDPRX_REMOTE_CMD, 0},
|
||||
{XDPRX_DEVICE_SERVICE_IRQ, 0},
|
||||
{XDPRX_VIDEO_UNSUPPORTED, 0},
|
||||
{XDPRX_AUDIO_UNSUPPORTED, 0},
|
||||
{XDPRX_OVER_LINK_BW_SET, 0},
|
||||
{XDPRX_OVER_LANE_COUNT_SET, 0},
|
||||
{XDPRX_OVER_TP_SET, 0},
|
||||
{XDPRX_OVER_TRAINING_LANE0_SET, 0},
|
||||
{XDPRX_OVER_TRAINING_LANE1_SET, 0},
|
||||
{XDPRX_OVER_TRAINING_LANE2_SET, 0},
|
||||
{XDPRX_OVER_TRAINING_LANE3_SET, 0},
|
||||
{XDPRX_OVER_CTRL_DPCD, 0},
|
||||
{XDPRX_OVER_DOWNSPREAD_CTRL, 0},
|
||||
{XDPRX_OVER_LINK_QUAL_LANE0_SET, 0},
|
||||
{XDPRX_OVER_LINK_QUAL_LANE1_SET, 0},
|
||||
{XDPRX_OVER_LINK_QUAL_LANE2_SET, 0},
|
||||
{XDPRX_OVER_LINK_QUAL_LANE3_SET, 0},
|
||||
{XDPRX_MST_CAP, 0},
|
||||
{XDPRX_SINK_COUNT, 0},
|
||||
{XDPRX_GUID0, 0},
|
||||
{XDPRX_GUID1, 0},
|
||||
{XDPRX_GUID2, 0},
|
||||
{XDPRX_GUID3, 0},
|
||||
{XDPRX_OVER_GUID, 0}
|
||||
};
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDprx driver/device. The sanity test
|
||||
* checks whether or not all tested registers hold their default reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDprx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDprx_SelfTest(XDprx *InstancePtr)
|
||||
{
|
||||
u8 Index;
|
||||
u32 Val;
|
||||
|
||||
/* Compare general usage registers with their default values. */
|
||||
for (Index = 0; Index < 46; Index++) {
|
||||
Val = XDprx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
ResetValues[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != ResetValues[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* All tested registers hold their default reset values. */
|
||||
return XST_SUCCESS;
|
||||
}
|
|
@ -1,660 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx.h
|
||||
*
|
||||
* The Xilinx DisplayPort transmitter (DPTX) driver. This driver supports the
|
||||
* Xilinx DisplayPort soft IP core in source (TX) mode. This driver follows the
|
||||
* DisplayPort 1.2a specification.
|
||||
*
|
||||
* <b>Driver description</b>
|
||||
*
|
||||
* The device driver enables higher-level software (e.g., an application) to
|
||||
* configure and control a DisplayPort TX soft IP, communicate and control an
|
||||
* RX device/sink monitor over the AUX channel, and to initialize and transmit
|
||||
* data streams over the main link.
|
||||
*
|
||||
* This driver implements link layer functionality: a Link Policy Maker (LPM)
|
||||
* and a Stream Policy Maker (SPM) as per the DisplayPort 1.2a specification.
|
||||
* - The LPM manages the main link and is responsible for keeping the link
|
||||
* synchronized. It will establish a link with a downstream RX device by
|
||||
* undergoing a link training sequence which consists of:
|
||||
* - Clock recovery: The clock needs to be recovered and PLLs need to be
|
||||
* locked for all lanes.
|
||||
* - Channel equalization: All lanes need to achieve channel equalization
|
||||
* and and symbol lock, as well as for interlane alignment to take place.
|
||||
* - The SPM manages transportation of an isochronous stream. That is, it will
|
||||
* initialize and maintain a video stream, establish a virtual channel to a
|
||||
* sink monitor, and transmit the stream.
|
||||
*
|
||||
* Using AUX transactions to read/write from/to the sink's DisplayPort
|
||||
* Configuration Data (DPCD) address space, the LPM obtains the link
|
||||
* capabilities, obtains link configuration and link and sink status, and
|
||||
* configures and controls the link and sink. The main link is trained this way.
|
||||
*
|
||||
* I2C-over-AUX transactions are used to obtain the sink's Extended Display
|
||||
* Identification Data (EDID) which give information on the display capabilities
|
||||
* of the monitor. The SPM may use this information to determine what available
|
||||
* screen resolutions and video timing are possible.
|
||||
*
|
||||
* <b>Interrupt processing</b>
|
||||
*
|
||||
* DisplayPort interrupts occur on the HPD signal line when the DisplayPort
|
||||
* cable is connected/disconnected or when the RX device sends a pulse. The user
|
||||
* hardware design must contain an interrupt controller which the DisplayPort
|
||||
* TX instance's interrupt signal is connected to. The user application must
|
||||
* enable interrupts in the system and set up the interrupt controller such that
|
||||
* the XDptx_HpdInterruptHandler handler will service DisplayPort interrupts.
|
||||
* When the XDptx_HpdInterruptHandler function is invoked, the handler will
|
||||
* identify what type of DisplayPort interrupt has occurred, and will call
|
||||
* either the HPD event handler function or the HPD pulse handler function,
|
||||
* depending on whether a an HPD event on an HPD pulse event occurred.
|
||||
*
|
||||
* The DisplayPort TX's XDPTX_INTERRUPT_STATUS register indicates the type of
|
||||
* interrupt that has occured, and the XDptx_HpdInterruptHandler will use this
|
||||
* information to decide which handler to call. An HPD event is identified if
|
||||
* bit XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK is set, and an HPD pulse is
|
||||
* identified from the XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit.
|
||||
*
|
||||
* The HPD event handler may be set up by using the XDptx_SetHpdEventHandler
|
||||
* function and, for the HPD pulse handler, the XDptx_SetHpdPulseHandler
|
||||
* function.
|
||||
*
|
||||
* <b>Multi-stream transport (MST) mode</b>
|
||||
*
|
||||
* The driver handles MST mode functionality, including sideband messaging,
|
||||
* topology discovery, virtual channel payload ID table management, and
|
||||
* directing streams to different sinks.
|
||||
*
|
||||
* MST testing has been done at all possible link rate/lane count/topology/
|
||||
* resolution/color depth combinations with each setting using following values:
|
||||
* - Link rate: 1.62, 2.70, and 5.40Gbps per lane.
|
||||
* - Lane count: 1, 2, and 4 lanes.
|
||||
* - Number of sink displays: 1, 2, 3, and 4 sink displays in both a daisy-chain
|
||||
* configuration and in a configuration using a combination of a 1-to-3 hub
|
||||
* and daisy-chain. Each stream was using the same resolution.
|
||||
* - Resolutions (60Hz): 640x480, 800x600, 1024x768, 1280x800, 1280x1024,
|
||||
* 1360x768, 1400x1050, 1680x1050, 1920x1080, 1920x2160, and 3840x2160.
|
||||
* - Color depths: 18, 24, 30, 36, and 48 bits per pixel.
|
||||
*
|
||||
* <b>Audio</b>
|
||||
*
|
||||
* The driver does not handle audio. For an example as to how to configure and
|
||||
* transmit audio, examples/xdptx_audio_example.c illustrates the required
|
||||
* sequence. The user will need to configure the audio source connected to the
|
||||
* Displayport TX instance and set up the audio info frame as per user
|
||||
* requirements.
|
||||
*
|
||||
* <b>Limitations</b>
|
||||
*
|
||||
* - For MST mode to correctly display, the current version of the driver
|
||||
* requires that each of the DisplayPort TX streams be allocated without
|
||||
* skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems
|
||||
* were experienced if skipping stream 2 and assigning stream 4 instead).
|
||||
* skipping monitors in a daisy chain is OK as long as they are assigned to
|
||||
* streams in order.
|
||||
* - In MST mode, the current version of the driver does not support removal of
|
||||
* an allocated stream from the virtual channel payload ID table without
|
||||
* clearing the entire table.
|
||||
* - Some sideband messages have not been implemented in the current version of
|
||||
* the driver for MST mode. Notably, reception of a CONNECTION_STATUS_NOTIFY
|
||||
* sideband message.
|
||||
* - The driver does not handle audio. See the audio example in the driver
|
||||
* examples directory for the required sequence for enabling audio.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* als 08/03/14 Initial MST addition.
|
||||
* 2.0 als 09/21/14 Added XDptx_DiscoverTopology function and changed
|
||||
* XDptx_IsConnected from macro to function.
|
||||
* 3.0 als 12/16/14 Updated to use common video library.
|
||||
* Added topology reordering functions:
|
||||
* XDptx_TopologySwapSinks,
|
||||
* XDptx_TopologySortSinksByTiling
|
||||
* Added wrapper functions for remote DPCD/I2C read/writes:
|
||||
* XDptx_RemoteDpcdRead, XDptx_RemoteDpcdWrite,
|
||||
* XDptx_RemoteIicRead, XDptx_RemoteIicWrite
|
||||
* Added EDID utility functions:
|
||||
* XDptx_GetRemoteEdid, XDptx_GetEdidBlock,
|
||||
* XDptx_GetRemoteEdidBlock,
|
||||
* XDptx_GetRemoteEdidDispIdExt,
|
||||
* XDptx_GetDispIdDataBlock,
|
||||
* XDptx_GetRemoteTiledDisplayDb
|
||||
* Remove unused arguments from functions:
|
||||
* LinkCountTotal, RelativeAddress from
|
||||
* XDptx_AllocatePayloadVcIdTable
|
||||
* RegStartAddress from XDptx_IicWrite
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XDPTX_H_
|
||||
/* Prevent circular inclusions by using protection macros. */
|
||||
#define XDPTX_H_
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdp.h"
|
||||
#include "xdptx_hw.h"
|
||||
|
||||
/****************************** Type Definitions ******************************/
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the RX device.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 DpcdRxCapsField[16]; /**< The first 16 bytes of the raw capabilities
|
||||
field of the RX device's DisplayPort
|
||||
Configuration Data (DPCD). */
|
||||
u8 LaneStatusAdjReqs[6];/**< This is a raw read of the RX device's
|
||||
status registers. The first 4 bytes
|
||||
correspond to the lane status associated
|
||||
with clock recovery, channel
|
||||
equalization, symbol lock, and interlane
|
||||
alignment. The remaining 2 bytes
|
||||
represent the pre-emphasis and voltage
|
||||
swing level adjustments requested by the
|
||||
RX device. */
|
||||
} XDptx_SinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains configuration information about the main link settings.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LaneCount; /**< The current lane count of the main
|
||||
link. */
|
||||
u8 LinkRate; /**< The current link rate of the main
|
||||
link. */
|
||||
u8 ScramblerEn; /**< Symbol scrambling is currently in
|
||||
use over the main link. */
|
||||
u8 EnhancedFramingMode; /**< Enhanced frame mode is currently in
|
||||
use over the main link. */
|
||||
u8 DownspreadControl; /**< Downspread control is currently in
|
||||
use over the main link. */
|
||||
u8 MaxLaneCount; /**< The maximum lane count of the main
|
||||
link. */
|
||||
u8 MaxLinkRate; /**< The maximum link rate of the main
|
||||
link. */
|
||||
u8 SupportEnhancedFramingMode; /**< Enhanced frame mode is supported by
|
||||
the RX device. */
|
||||
u8 SupportDownspreadControl; /**< Downspread control is supported by
|
||||
the RX device. */
|
||||
u8 VsLevel; /**< The current voltage swing level for
|
||||
each lane. */
|
||||
u8 PeLevel; /**< The current pre-emphasis/cursor
|
||||
level for each lane. */
|
||||
u8 Pattern; /**< The current pattern currently in
|
||||
use over the main link. */
|
||||
} XDptx_LinkConfig;
|
||||
|
||||
/**
|
||||
* This typedef contains the main stream attributes which determine how the
|
||||
* video will be displayed.
|
||||
*/
|
||||
typedef struct {
|
||||
XVidC_VideoTimingMode Vtm; /**< The video timing. */
|
||||
u32 PixelClockHz; /**< The pixel clock of the stream (in
|
||||
Hz). */
|
||||
u32 HStart; /**< Horizontal blank start (in
|
||||
pixels). */
|
||||
u32 VStart; /**< Vertical blank start (in lines). */
|
||||
u32 Misc0; /**< Miscellaneous stream attributes 0
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 Misc1; /**< Miscellaneous stream attributes 1
|
||||
as specified by the DisplayPort
|
||||
1.2 specification. */
|
||||
u32 NVid; /**< N value for the video stream. */
|
||||
u32 UserPixelWidth; /**< The width of the user data input
|
||||
port. */
|
||||
u32 DataPerLane; /**< Used to translate the number of
|
||||
pixels per line to the native
|
||||
internal 16-bit datapath. */
|
||||
u32 AvgBytesPerTU; /**< Average number of bytes per
|
||||
transfer unit, scaled up by a
|
||||
factor of 1000. */
|
||||
u32 TransferUnitSize; /**< Size of the transfer unit in the
|
||||
framing logic. In MST mode, this
|
||||
is also the number of time slots
|
||||
that are alloted in the payload
|
||||
ID table. */
|
||||
u32 InitWait; /**< Number of initial wait cycles at
|
||||
the start of a new line by
|
||||
the framing logic. */
|
||||
u32 BitsPerColor; /**< Number of bits per color
|
||||
component. */
|
||||
u8 ComponentFormat; /**< The component format currently in
|
||||
use by the video stream. */
|
||||
u8 DynamicRange; /**< The dynamic range currently in use
|
||||
by the video stream. */
|
||||
u8 YCbCrColorimetry; /**< The YCbCr colorimetry currently in
|
||||
use by the video stream. */
|
||||
u8 SynchronousClockMode; /**< Synchronous clock mode is currently
|
||||
in use by the video stream. */
|
||||
u8 OverrideUserPixelWidth; /**< If set to 1, the value stored for
|
||||
UserPixelWidth will be used as
|
||||
the pixel width. */
|
||||
} XDptx_MainStreamAttributes;
|
||||
|
||||
/**
|
||||
* This typedef describes a stream when the driver is running in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 LinkCountTotal; /** The total number of DisplayPort
|
||||
links from the DisplayPort TX to
|
||||
the sink device that this MST
|
||||
stream is targeting.*/
|
||||
u8 RelativeAddress[15]; /** The relative address from the
|
||||
DisplayPort TX to the sink
|
||||
device that this MST stream is
|
||||
targeting.*/
|
||||
u16 MstPbn; /**< Payload bandwidth number used to
|
||||
allocate bandwidth for the MST
|
||||
stream. */
|
||||
u8 MstStreamEnable; /**< In MST mode, enables the
|
||||
corresponding stream for this
|
||||
MSA configuration. */
|
||||
} XDptx_MstStream;
|
||||
|
||||
/**
|
||||
* This typedef describes some board characteristics information that affects
|
||||
* link training.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 HasRedriverInPath; /**< Redriver in path requires different voltage
|
||||
swing and pre-emphasis. */
|
||||
u8 TxVsLevels[4]; /**< The voltage swing levels to be used by the
|
||||
DisplayPort TX. */
|
||||
u8 TxPeLevels[4]; /**< The pre-emphasis/cursor level to be used by
|
||||
the DisplayPort TX. */
|
||||
u8 TxVsOffset; /**< Voltage swing compensation offset used when
|
||||
pre-emphasis is used. */
|
||||
} XDptx_BoardChar;
|
||||
|
||||
/**
|
||||
* This typedef describes a downstream DisplayPort device when the driver is
|
||||
* running in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device. */
|
||||
u8 RelativeAddress[15]; /**< The relative address from the
|
||||
DisplayPort TX to this
|
||||
device. */
|
||||
u8 DeviceType; /**< The type of DisplayPort device.
|
||||
Either a branch or sink. */
|
||||
u8 LinkCountTotal; /**< The total number of DisplayPort
|
||||
links connecting this device to
|
||||
the DisplayPort TX. */
|
||||
u8 DpcdRev; /**< The revision of the device's
|
||||
DisplayPort Configuration Data
|
||||
(DPCD). For this device to
|
||||
support MST features, this value
|
||||
must represent a protocl version
|
||||
greater or equal to 1.2. */
|
||||
u8 MsgCapStatus; /**< This device is capable of sending
|
||||
and receiving sideband
|
||||
messages. */
|
||||
} XDptx_TopologyNode;
|
||||
|
||||
/**
|
||||
* This typedef describes a the entire topology of connected downstream
|
||||
* DisplayPort devices (from the DisplayPort TX) when the driver is operating
|
||||
* in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 NodeTotal; /**< The total number of nodes that were
|
||||
found in the MST topology. */
|
||||
XDptx_TopologyNode NodeTable[63]; /**< A table listing all the nodes in
|
||||
the MST topology. */
|
||||
u8 SinkTotal; /**< The total number of sinks in the
|
||||
MST topology. */
|
||||
XDptx_TopologyNode *SinkList[63]; /**< A pointer list of sinks in the
|
||||
MST topology. The entries will
|
||||
point to the sinks in the
|
||||
NodeTable. */
|
||||
} XDptx_Topology;
|
||||
|
||||
/**
|
||||
* This typedef describes a port that is connected to a DisplayPort branch
|
||||
* device. This structure is used when the driver is operating in multi-stream
|
||||
* transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 InputPort; /**< Specifies that this port is an
|
||||
input port. */
|
||||
u8 PeerDeviceType; /**< Specifies the device type connected
|
||||
to this port. */
|
||||
u8 PortNum; /**< The port number of this port. */
|
||||
u8 MsgCapStatus; /**< This port or the device at this
|
||||
port can send and receive MST
|
||||
messages. */
|
||||
u8 DpDevPlugStatus; /**< There is a device connected to this
|
||||
port. */
|
||||
|
||||
u8 LegacyDevPlugStatus; /**< This port is connected to a legacy
|
||||
device. */
|
||||
u8 DpcdRev; /**< The DisplayPort Configuration Data
|
||||
(DPCD) revision of the device
|
||||
connected to this port. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the device connected to this
|
||||
port. */
|
||||
u8 NumSdpStreams; /**< The total number of Secondary-Data
|
||||
Packet (SDP) streams that this
|
||||
port can handle. */
|
||||
u8 NumSdpStreamSinks; /**< The number of SDP streams
|
||||
associated with this port. */
|
||||
} XDptx_SbMsgLinkAddressReplyPortDetail;
|
||||
|
||||
/**
|
||||
* This typedef describes a DisplayPort branch device. This structure is used
|
||||
* when the driver is operating in multi-stream transport (MST) mode.
|
||||
*/
|
||||
typedef struct {
|
||||
u8 ReplyType; /**< The reply type of the sideband
|
||||
message. A value of 1 indicates
|
||||
that the request wasn't
|
||||
successful and the return data
|
||||
will give the reason for a
|
||||
negative-acknowledge (NACK). */
|
||||
u8 RequestId; /**< The request identifier of the
|
||||
reply. This should correspond to
|
||||
the request identifier for the
|
||||
LINK_ADDRESS sideband message
|
||||
request. */
|
||||
u32 Guid[4]; /**< The global unique identifier (GUID)
|
||||
of the branch device. */
|
||||
u8 NumPorts; /**< The number of ports associated with
|
||||
this branch device. */
|
||||
XDptx_SbMsgLinkAddressReplyPortDetail PortDetails[16]; /**< An array
|
||||
describing all ports attached to
|
||||
this branch device. */
|
||||
} XDptx_SbMsgLinkAddressReplyDeviceInfo;
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for a Hot-Plug-Detect (HPD) event
|
||||
* interrupt.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDptx_HpdEventHandler)(void *InstancePtr);
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* Callback type which represents the handler for a Hot-Plug-Detect (HPD) pulse
|
||||
* interrupt.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
typedef void (*XDptx_HpdPulseHandler)(void *InstancePtr);
|
||||
|
||||
/**
|
||||
* The XDptx driver instance data. The user is required to allocate a variable
|
||||
* of this type for every XDptx device in the system. A pointer to a variable of
|
||||
* this type is then passed to the driver API functions.
|
||||
*/
|
||||
typedef struct {
|
||||
XDp_Config Config; /**< Configuration structure for
|
||||
the DisplayPort TX
|
||||
core. It is important to
|
||||
keep this member first
|
||||
in the XDptx order. */
|
||||
u32 MstEnable; /**< Multi-stream transport
|
||||
(MST) mode. Enables
|
||||
functionality, allowing
|
||||
multiple streams to be
|
||||
sent over the main
|
||||
link. */
|
||||
u32 IsReady; /**< Device is initialized and
|
||||
ready. */
|
||||
u8 TrainAdaptive; /**< Downshift lane count and
|
||||
link rate if necessary
|
||||
during training. */
|
||||
XDptx_SinkConfig RxConfig; /**< Configuration structure for
|
||||
the RX device. */
|
||||
XDptx_LinkConfig LinkConfig; /**< Configuration structure for
|
||||
the main link. */
|
||||
XDptx_BoardChar BoardChar; /**< Some board characteristics
|
||||
information that affects
|
||||
link training. */
|
||||
XDptx_MainStreamAttributes MsaConfig[4]; /**< Configuration structure
|
||||
for the main stream
|
||||
attributes (MSA). Each
|
||||
stream has its own set
|
||||
of attributes. When MST
|
||||
mode is disabled, only
|
||||
MsaConfig[0] is used. */
|
||||
XDptx_MstStream MstStreamConfig[4]; /**< Configuration structure
|
||||
for a multi-stream
|
||||
transport (MST)
|
||||
stream. */
|
||||
XDptx_Topology Topology; /**< The topology of connected
|
||||
downstream DisplayPort
|
||||
devices when the driver
|
||||
is running in MST
|
||||
mode. */
|
||||
u32 AuxDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
AUX transactions. */
|
||||
u32 SbMsgDelayUs; /**< Amount of latency in micro-
|
||||
seconds to use between
|
||||
sideband messages for
|
||||
multi-stream transport
|
||||
(MST) mode. */
|
||||
XDp_TimerHandler UserTimerWaitUs; /**< Custom user function for
|
||||
delay/sleep. */
|
||||
void *UserTimerPtr; /**< Pointer to a timer instance
|
||||
used by the custom user
|
||||
delay/sleep function. */
|
||||
XDptx_HpdEventHandler HpdEventHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) event
|
||||
interrupts. */
|
||||
void *HpdEventCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD event
|
||||
callback function. */
|
||||
XDptx_HpdPulseHandler HpdPulseHandler; /**< Callback function for Hot-
|
||||
Plug-Detect (HPD) pulse
|
||||
interrupts. */
|
||||
void *HpdPulseCallbackRef; /**< A pointer to the user data
|
||||
passed to the HPD pulse
|
||||
callback function. */
|
||||
} XDptx;
|
||||
|
||||
/**************************** Function Prototypes *****************************/
|
||||
|
||||
/* xdptx.c: Setup and initialization functions. */
|
||||
void XDptx_CfgInitialize(XDptx *InstancePtr, XDp_Config *ConfigPtr,
|
||||
u32 EffectiveAddr);
|
||||
u32 XDptx_InitializeTx(XDptx *InstancePtr);
|
||||
u32 XDptx_GetRxCapabilities(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx.c: Link policy maker functions. */
|
||||
u32 XDptx_CfgMainLinkMax(XDptx *InstancePtr);
|
||||
u32 XDptx_EstablishLink(XDptx *InstancePtr);
|
||||
u32 XDptx_CheckLinkStatus(XDptx *InstancePtr, u8 LaneCount);
|
||||
void XDptx_EnableTrainAdaptive(XDptx *InstancePtr, u8 Enable);
|
||||
void XDptx_SetHasRedriverInPath(XDptx *InstancePtr, u8 Set);
|
||||
void XDptx_CfgTxVsOffset(XDptx *InstancePtr, u8 Offset);
|
||||
void XDptx_CfgTxVsLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
||||
void XDptx_CfgTxPeLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
||||
|
||||
/* xdptx.c: AUX transaction functions. */
|
||||
u32 XDptx_AuxRead(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToRead,
|
||||
void *ReadData);
|
||||
u32 XDptx_AuxWrite(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToWrite,
|
||||
void *WriteData);
|
||||
u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
|
||||
u16 BytesToRead, void *ReadData);
|
||||
u32 XDptx_IicWrite(XDptx *InstancePtr, u8 IicAddress, u8 BytesToWrite,
|
||||
void *WriteData);
|
||||
|
||||
/* xdptx.c: Functions for controlling the link configuration. */
|
||||
u32 XDptx_SetDownspread(XDptx *InstancePtr, u8 Enable);
|
||||
u32 XDptx_SetEnhancedFrameMode(XDptx *InstancePtr, u8 Enable);
|
||||
u32 XDptx_SetLaneCount(XDptx *InstancePtr, u8 LaneCount);
|
||||
u32 XDptx_SetLinkRate(XDptx *InstancePtr, u8 LinkRate);
|
||||
u32 XDptx_SetScrambler(XDptx *InstancePtr, u8 Enable);
|
||||
|
||||
/* xdptx.c: General usage functions. */
|
||||
u32 XDptx_IsConnected(XDptx *InstancePtr);
|
||||
void XDptx_EnableMainLink(XDptx *InstancePtr);
|
||||
void XDptx_DisableMainLink(XDptx *InstancePtr);
|
||||
void XDptx_ResetPhy(XDptx *InstancePtr, u32 Reset);
|
||||
void XDptx_SetUserTimerHandler(XDptx *InstancePtr,
|
||||
XDp_TimerHandler CallbackFunc, void *CallbackRef);
|
||||
void XDptx_WaitUs(XDptx *InstancePtr, u32 MicroSeconds);
|
||||
|
||||
/* xdptx_spm.c: Stream policy maker functions. */
|
||||
void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
||||
XVidC_VideoMode VideoMode);
|
||||
void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream,
|
||||
u8 *Edid);
|
||||
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
||||
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate);
|
||||
void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor);
|
||||
void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable);
|
||||
void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream);
|
||||
|
||||
/* xdptx_intr.c: Interrupt handling functions. */
|
||||
void XDptx_HpdInterruptHandler(XDptx *InstancePtr);
|
||||
void XDptx_SetHpdEventHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdEventHandler CallbackFunc, void *CallbackRef);
|
||||
void XDptx_SetHpdPulseHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef);
|
||||
|
||||
/* xdptx_selftest.c: Self test function. */
|
||||
u32 XDptx_SelfTest(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST mode. */
|
||||
void XDptx_MstCfgModeEnable(XDptx *InstancePtr);
|
||||
void XDptx_MstCfgModeDisable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstCapable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstEnable(XDptx *InstancePtr);
|
||||
u32 XDptx_MstDisable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
||||
* MST streams and selecting their associated target sinks. */
|
||||
void XDptx_MstCfgStreamEnable(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_MstCfgStreamDisable(XDptx *InstancePtr, u8 Stream);
|
||||
u8 XDptx_MstStreamIsEnabled(XDptx *InstancePtr, u8 Stream);
|
||||
void XDptx_SetStreamSelectFromSinkList(XDptx *InstancePtr, u8 Stream, u8
|
||||
SinkNum);
|
||||
void XDptx_SetStreamSinkRad(XDptx *InstancePtr, u8 Stream, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST topology
|
||||
* discovery and management. */
|
||||
u32 XDptx_DiscoverTopology(XDptx *InstancePtr);
|
||||
u32 XDptx_FindAccessibleDpDevices(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress);
|
||||
void XDptx_TopologySwapSinks(XDptx *InstancePtr, u8 Index0, u8 Index1);
|
||||
void XDptx_TopologySortSinksByTiling(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for communicating
|
||||
* with downstream DisplayPort devices. */
|
||||
u32 XDptx_RemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDptx_RemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDptx_RemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST stream
|
||||
* allocation. */
|
||||
u32 XDptx_AllocatePayloadStreams(XDptx *InstancePtr);
|
||||
u32 XDptx_AllocatePayloadVcIdTable(XDptx *InstancePtr, u8 VcId, u8 Ts);
|
||||
u32 XDptx_ClearPayloadVcIdTable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) functions for issuing sideband
|
||||
* messages. */
|
||||
u32 XDptx_SendSbMsgRemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_SendSbMsgRemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
||||
u32 XDptx_SendSbMsgRemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData);
|
||||
u32 XDptx_SendSbMsgRemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead,
|
||||
u8 *ReadData);
|
||||
u32 XDptx_SendSbMsgLinkAddress(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, XDptx_SbMsgLinkAddressReplyDeviceInfo *DeviceInfo);
|
||||
u32 XDptx_SendSbMsgEnumPathResources(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn);
|
||||
u32 XDptx_SendSbMsgAllocatePayload(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 VcId, u16 Pbn);
|
||||
u32 XDptx_SendSbMsgClearPayloadIdTable(XDptx *InstancePtr);
|
||||
|
||||
/* xdptx_mst.c: Multi-stream transport (MST) utility functions. */
|
||||
void XDptx_WriteGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 Guid[4]);
|
||||
void XDptx_GetGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
||||
u32 *Guid);
|
||||
|
||||
/* xdptx_edid.c: EDID utility functions. */
|
||||
u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid);
|
||||
u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
||||
u8 *RelativeAddress, u8 *Edid);
|
||||
u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum);
|
||||
u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress);
|
||||
u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag,
|
||||
u8 **DataBlockPtr);
|
||||
u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
||||
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr);
|
||||
|
||||
#endif /* XDPTX_H_ */
|
File diff suppressed because it is too large
Load diff
|
@ -1,180 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_intr.c
|
||||
*
|
||||
* This file contains functions related to XDptx interrupt handling.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* 3.0 als 12/16/14 Increased debounce duration for HPD to 0.500ms.
|
||||
* Added masking of interrupts during servicing.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function is the interrupt handler for the XDptx driver.
|
||||
*
|
||||
* When an interrupt happens, it first detects what kind of interrupt happened,
|
||||
* then decides which callback function to invoke.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_HpdInterruptHandler(XDptx *InstancePtr)
|
||||
{
|
||||
u32 IntrStatus;
|
||||
u8 HpdEventDetected;
|
||||
u8 HpdPulseDetected;
|
||||
u32 HpdDuration;
|
||||
u32 IntrMask;
|
||||
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
/* Determine what kind of interrupt occurred.
|
||||
* Note: XDPTX_INTERRUPT_STATUS is an RC (read-clear) register. */
|
||||
IntrStatus = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_STATUS);
|
||||
IntrStatus &= ~XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
IntrMask = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK);
|
||||
|
||||
HpdEventDetected = IntrStatus & XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK;
|
||||
HpdPulseDetected = IntrStatus &
|
||||
XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK;
|
||||
|
||||
if (HpdEventDetected) {
|
||||
/* Mask interrupts while event handling is taking place. API
|
||||
* will error out in case of a disconnection event anyway. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK, IntrMask |
|
||||
XDPTX_INTERRUPT_MASK_HPD_EVENT_MASK);
|
||||
|
||||
InstancePtr->HpdEventHandler(InstancePtr->HpdEventCallbackRef);
|
||||
}
|
||||
else if (HpdPulseDetected && XDptx_IsConnected(InstancePtr)) {
|
||||
/* Mask interrupts while event handling is taking place. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_INTERRUPT_MASK, IntrMask |
|
||||
XDPTX_INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK);
|
||||
|
||||
/* The source device must debounce the incoming HPD signal by
|
||||
* sampling the value at an interval greater than 0.500 ms. An
|
||||
* HPD pulse should be of width 0.5 ms - 1.0 ms. */
|
||||
HpdDuration = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
XDPTX_HPD_DURATION);
|
||||
if (HpdDuration >= 500) {
|
||||
InstancePtr->HpdPulseHandler(
|
||||
InstancePtr->HpdPulseCallbackRef);
|
||||
}
|
||||
}
|
||||
|
||||
/* Unmask previously masked interrupts once handling is done. */
|
||||
XDptx_WriteReg(InstancePtr->Config.BaseAddr, XDPTX_INTERRUPT_MASK,
|
||||
IntrMask);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect event
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetHpdEventHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdEventHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->HpdEventHandler = CallbackFunc;
|
||||
InstancePtr->HpdEventCallbackRef = CallbackRef;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function installs a callback function for when a hot-plug-detect pulse
|
||||
* interrupt occurs.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
* @param CallbackFunc is the address to the callback function.
|
||||
* @param CallbackRef is the user data item that will be passed to the
|
||||
* callback function when it is invoked.
|
||||
*
|
||||
* @return None.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
void XDptx_SetHpdPulseHandler(XDptx *InstancePtr,
|
||||
XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef)
|
||||
{
|
||||
/* Verify arguments. */
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
Xil_AssertVoid(CallbackFunc != NULL);
|
||||
Xil_AssertVoid(CallbackRef != NULL);
|
||||
|
||||
InstancePtr->HpdPulseHandler = CallbackFunc;
|
||||
InstancePtr->HpdPulseCallbackRef = CallbackRef;
|
||||
}
|
|
@ -1,213 +0,0 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
*******************************************************************************/
|
||||
/******************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xdptx_selftest.c
|
||||
*
|
||||
* This file contains a diagnostic self-test function for the XDptx driver. It
|
||||
* will check many of the DisplayPort TX's register values against the default
|
||||
* reset values as a sanity-check that the core is ready to be used.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -----------------------------------------------
|
||||
* 1.0 als 05/17/14 Initial release.
|
||||
* 3.0 als 12/16/14 Stream naming now starts at 1 to follow IP.
|
||||
* </pre>
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
/******************************* Include Files ********************************/
|
||||
|
||||
#include "xdptx.h"
|
||||
#include "xstatus.h"
|
||||
|
||||
/**************************** Variable Definitions ****************************/
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's general
|
||||
* usage registers.
|
||||
*/
|
||||
u32 ResetValues[53][2] =
|
||||
{
|
||||
{XDPTX_LINK_BW_SET, 0},
|
||||
{XDPTX_LANE_COUNT_SET, 0},
|
||||
{XDPTX_ENHANCED_FRAME_EN, 0},
|
||||
{XDPTX_TRAINING_PATTERN_SET, 0},
|
||||
{XDPTX_LINK_QUAL_PATTERN_SET, 0},
|
||||
{XDPTX_SCRAMBLING_DISABLE, 0},
|
||||
{XDPTX_DOWNSPREAD_CTRL, 0},
|
||||
{XDPTX_SOFT_RESET, 0},
|
||||
{XDPTX_ENABLE, 0},
|
||||
{XDPTX_ENABLE_MAIN_STREAM, 0},
|
||||
{XDPTX_ENABLE_SEC_STREAM, 0},
|
||||
{XDPTX_FORCE_SCRAMBLER_RESET, 0},
|
||||
{XDPTX_TX_MST_CONFIG, 0},
|
||||
{XDPTX_AUX_CMD, 0},
|
||||
{XDPTX_AUX_WRITE_FIFO, 0},
|
||||
{XDPTX_AUX_ADDRESS, 0},
|
||||
{XDPTX_AUX_CLK_DIVIDER, 0},
|
||||
{XDPTX_TX_USER_FIFO_OVERFLOW, 0},
|
||||
{XDPTX_AUX_REPLY_DATA, 0},
|
||||
{XDPTX_AUX_REPLY_CODE, 0},
|
||||
{XDPTX_AUX_REPLY_COUNT, 0},
|
||||
{XDPTX_INTERRUPT_MASK, 0x3F},
|
||||
{XDPTX_REPLY_DATA_COUNT, 0},
|
||||
{XDPTX_REPLY_STATUS, 0x10},
|
||||
{XDPTX_STREAM1, 0},
|
||||
{XDPTX_STREAM2, 0},
|
||||
{XDPTX_STREAM3, 0},
|
||||
{XDPTX_STREAM4, 0},
|
||||
{XDPTX_PHY_CONFIG, 0x03},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_0, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_1, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_2, 0},
|
||||
{XDPTX_PHY_VOLTAGE_DIFF_LANE_3, 0},
|
||||
{XDPTX_PHY_TRANSMIT_PRBS7, 0},
|
||||
{XDPTX_PHY_CLOCK_SELECT, 0},
|
||||
{XDPTX_TX_PHY_POWER_DOWN, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_0, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_1, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_2, 0},
|
||||
{XDPTX_PHY_PRECURSOR_LANE_3, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_0, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_1, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_2, 0},
|
||||
{XDPTX_PHY_POSTCURSOR_LANE_3, 0},
|
||||
{XDPTX_GT_DRP_COMMAND, 0},
|
||||
{XDPTX_GT_DRP_READ_DATA, 0},
|
||||
{XDPTX_GT_DRP_CHANNEL_STATUS, 0},
|
||||
{XDPTX_TX_AUDIO_CONTROL, 0},
|
||||
{XDPTX_TX_AUDIO_CHANNELS, 0},
|
||||
{XDPTX_TX_AUDIO_INFO_DATA(1), 0},
|
||||
{XDPTX_TX_AUDIO_MAUD, 0},
|
||||
{XDPTX_TX_AUDIO_NAUD, 0},
|
||||
{XDPTX_TX_AUDIO_EXT_DATA(1), 0}
|
||||
};
|
||||
|
||||
/**
|
||||
* This table contains the default values for the DisplayPort TX core's main
|
||||
* stream attribute (MSA) registers.
|
||||
*/
|
||||
u32 ResetValuesMsa[20][2] =
|
||||
{
|
||||
{XDPTX_MAIN_STREAM_HTOTAL, 0},
|
||||
{XDPTX_MAIN_STREAM_VTOTAL, 0},
|
||||
{XDPTX_MAIN_STREAM_POLARITY, 0},
|
||||
{XDPTX_MAIN_STREAM_HSWIDTH, 0},
|
||||
{XDPTX_MAIN_STREAM_VSWIDTH, 0},
|
||||
{XDPTX_MAIN_STREAM_HRES, 0},
|
||||
{XDPTX_MAIN_STREAM_VRES, 0},
|
||||
{XDPTX_MAIN_STREAM_HSTART, 0},
|
||||
{XDPTX_MAIN_STREAM_VSTART, 0},
|
||||
{XDPTX_MAIN_STREAM_MISC0, 0},
|
||||
{XDPTX_MAIN_STREAM_MISC1, 0},
|
||||
{XDPTX_M_VID, 0},
|
||||
{XDPTX_TU_SIZE, 0},
|
||||
{XDPTX_N_VID, 0},
|
||||
{XDPTX_USER_PIXEL_WIDTH, 0},
|
||||
{XDPTX_USER_DATA_COUNT_PER_LANE, 0},
|
||||
{XDPTX_MAIN_STREAM_INTERLACED, 0},
|
||||
{XDPTX_MIN_BYTES_PER_TU, 0},
|
||||
{XDPTX_FRAC_BYTES_PER_TU, 0},
|
||||
{XDPTX_INIT_WAIT, 32}
|
||||
};
|
||||
|
||||
/**************************** Function Definitions ****************************/
|
||||
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* This function runs a self-test on the XDptx driver/device. The sanity test
|
||||
* checks whether or not all tested registers hold their default reset values.
|
||||
*
|
||||
* @param InstancePtr is a pointer to the XDptx instance.
|
||||
*
|
||||
* @return
|
||||
* - XST_SUCCESS if the self-test passed - all tested registers
|
||||
* hold their default reset values.
|
||||
* - XST_FAILURE otherwise.
|
||||
*
|
||||
* @note None.
|
||||
*
|
||||
*******************************************************************************/
|
||||
u32 XDptx_SelfTest(XDptx *InstancePtr)
|
||||
{
|
||||
u8 Index;
|
||||
u8 StreamIndex;
|
||||
u32 StreamOffset;
|
||||
u32 Val;
|
||||
|
||||
/* Compare general usage registers with their default values. */
|
||||
for (Index = 0; Index < 53; Index++) {
|
||||
Val = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
ResetValues[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != ResetValues[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Compare main stream attribute (MSA) registers for all 4 streams with
|
||||
* their default values. */
|
||||
for (StreamIndex = 0; StreamIndex < 4; StreamIndex++) {
|
||||
/* Determine the MSA register offset for each stream. */
|
||||
if (StreamIndex == 0) {
|
||||
StreamOffset = 0;
|
||||
}
|
||||
else if (StreamIndex == 1) {
|
||||
StreamOffset = XDPTX_STREAM2_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 2) {
|
||||
StreamOffset = XDPTX_STREAM3_MSA_START_OFFSET;
|
||||
}
|
||||
else if (StreamIndex == 3) {
|
||||
StreamOffset = XDPTX_STREAM4_MSA_START_OFFSET;
|
||||
}
|
||||
|
||||
for (Index = 0; Index < 20; Index++) {
|
||||
Val = XDptx_ReadReg(InstancePtr->Config.BaseAddr,
|
||||
StreamOffset + ResetValuesMsa[Index][0]);
|
||||
/* Fail if register does not hold default value. */
|
||||
if (Val != ResetValuesMsa[Index][1]) {
|
||||
return XST_FAILURE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* All tested registers hold their default reset values. */
|
||||
return XST_SUCCESS;
|
||||
}
|
Loading…
Add table
Reference in a new issue