sw_apps:zynqmp_fsbl: Changes in FSBL to sync HEAD with beta2 branch

These changes were present in master-sdk-beta2 and also need to be
applied to master as well.
Changes done are:
- Macro name change in QSPI for PSU naming change
- Workaround for QEMU in QSPI32 dummy mode

Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
This commit is contained in:
Sarat Chand Savitala 2015-04-08 14:34:56 +05:30 committed by Nava kishore Manne
parent 411bfef505
commit 1e8599957a
2 changed files with 7 additions and 11 deletions

View file

@ -455,7 +455,7 @@ extern "C" {
/**
* Definition for QSPI to be included
*/
#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPS_0_DEVICE_ID))
#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPSU_0_DEVICE_ID))
#define XFSBL_QSPI
#define XFSBL_QSPI_BASEADDRESS XPAR_XQSPIPS_0_BASEADDR
#endif

View file

@ -918,17 +918,13 @@ u32 XFsbl_Qspi32Copy(u32 SrcAddress, PTRSIZE DestAddress, u32 Length)
(ReadCommand == QUAD_READ_CMD_32BIT)) {
/* Update Dummy cycles as per flash specs for QUAD IO */
if (ReadCommand == FAST_READ_CMD_32BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
}
if (ReadCommand == DUAL_READ_CMD_32BIT) {
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
}
if (ReadCommand == QUAD_READ_CMD_32BIT){
FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
}
/*
* Silicon and REMUS do not care what the SPI mode is
* for dummies, but QEMU expects it to match the address
* phase. Make it so.
*/
FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
FlashMsg[1].TxBfrPtr = NULL;
FlashMsg[1].RxBfrPtr = NULL;