sw_apps:zynqmp_fsbl: Changes in FSBL to sync HEAD with beta2 branch
These changes were present in master-sdk-beta2 and also need to be applied to master as well. Changes done are: - Macro name change in QSPI for PSU naming change - Workaround for QEMU in QSPI32 dummy mode Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com>
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2 changed files with 7 additions and 11 deletions
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@ -455,7 +455,7 @@ extern "C" {
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/**
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* Definition for QSPI to be included
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*/
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#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPS_0_DEVICE_ID))
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#if (!defined(FSBL_QSPI_EXCLUDE) && defined(XPAR_XQSPIPSU_0_DEVICE_ID))
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#define XFSBL_QSPI
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#define XFSBL_QSPI_BASEADDRESS XPAR_XQSPIPS_0_BASEADDR
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#endif
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@ -918,17 +918,13 @@ u32 XFsbl_Qspi32Copy(u32 SrcAddress, PTRSIZE DestAddress, u32 Length)
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(ReadCommand == QUAD_READ_CMD_32BIT)) {
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/* Update Dummy cycles as per flash specs for QUAD IO */
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if (ReadCommand == FAST_READ_CMD_32BIT) {
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FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_SPI;
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}
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if (ReadCommand == DUAL_READ_CMD_32BIT) {
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FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_DUALSPI;
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}
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if (ReadCommand == QUAD_READ_CMD_32BIT){
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FlashMsg[1].BusWidth = XQSPIPSU_SELECT_MODE_QUADSPI;
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}
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/*
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* Silicon and REMUS do not care what the SPI mode is
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* for dummies, but QEMU expects it to match the address
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* phase. Make it so.
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*/
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FlashMsg[1].BusWidth = FlashMsg[0].BusWidth;
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FlashMsg[1].TxBfrPtr = NULL;
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FlashMsg[1].RxBfrPtr = NULL;
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