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vtc: Added interlaced programming feature.

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Added new interlaced source select field to provide interlaced programming option to user.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
This commit is contained in:
Srikanth Vemula 2015-10-23 01:37:14 +08:00 • committed by Nava kishore Manne
parent 56ea0274df
commit 5155c4f47f
3 changed files with 19 additions and 4 deletions
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14
XilinxProcessorIPLib/drivers/vtc/src/xvtc.c
View file

@ -162,6 +162,11 @@
* XVtc_ConvSignal2Timing
* Corrected register read to XVTC_DVSYNC_F1_OFFSET
* in API XVtc_GetDetector
* vns 10/14/15 Modified XVtc_SetSource API to provided programming
* interlaced mode feature and modified XVtc_GetSource
* API to read interlaced mode status.
* Corrected XVtc_ConvSignal2Timing API to get interlaced
* mode from SignalCfgPtr structure.
* </pre>
*
******************************************************************************/
@ -708,6 +713,9 @@ void XVtc_SetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr)
if (SourcePtr->HTotalSrc)
CtrlRegValue |= XVTC_CTL_HTSS_MASK;
if (SourcePtr->InterlacedMode)
CtrlRegValue |= XVTC_CTL_INTERLACE_MASK;
XVtc_WriteReg(InstancePtr->Config.BaseAddress, (XVTC_CTL_OFFSET),
CtrlRegValue);
}
@ -782,6 +790,8 @@ void XVtc_GetSource(XVtc *InstancePtr, XVtc_SourceSelect *SourcePtr)
SourcePtr->HFrontPorchSrc = 1;
if (CtrlRegValue & XVTC_CTL_HTSS_MASK)
SourcePtr->HTotalSrc = 1;
if (CtrlRegValue & XVTC_CTL_INTERLACE_MASK)
SourcePtr->InterlacedMode = 1;
}
/*****************************************************************************/
@ -2278,9 +2288,7 @@ void XVtc_ConvSignal2Timing(XVtc *InstancePtr, XVtc_Signal *SignalCfgPtr,
SignalCfgPtr->V1BackPorchStart;
/* Interlaced */
if (SignalCfgPtr->Interlaced == 1) {
TimingPtr->Interlaced = 1;
}
TimingPtr->Interlaced = SignalCfgPtr->Interlaced;
}

3
XilinxProcessorIPLib/drivers/vtc/src/xvtc.h
View file

@ -292,6 +292,8 @@
* First Release.
* Implemented following function:
* XVtc_SelfTest.
* 7.1 vns 10/14/15 Added InterlacedMode feild to XVtc_SourceSelect
* structure
* </pre>
*
******************************************************************************/
@ -415,6 +417,7 @@ typedef struct {
u8 HFrontPorchSrc; /**< Horizontal Front Porch Start Register
* Source Select */
u8 HTotalSrc; /**< Horizontal Total Register Source Select */
u8 InterlacedMode; /**< Interelaced mode */
} XVtc_SourceSelect;

6
XilinxProcessorIPLib/drivers/vtc/src/xvtc_hw.h
View file

@ -148,6 +148,8 @@
* Modified register offsets from XVTC_* to XVTC_*_OFFSET
* for consistency.
* Added backward compatibility macros.
* 7.1 vns 10/14/15 Added XVTC_CTL_INTERLACE_MASK macro and
* modified XVTC_CTL_ALLSS_MASK
* </pre>
*
******************************************************************************/
@ -285,6 +287,8 @@ extern "C" {
#define XVTC_CTL_VBPSS_MASK 0x00100000 /**< Vertical Blank Output
* Polarity Source Mask */
#define XVTC_CTL_INTERLACE_MASK 0x00080000 /**< Interlaced mode */
#define XVTC_CTL_VCSS_MASK 0x00040000 /**< Generator Chroma Polarity
* and Encoding Source
* Select Mask */
@ -313,7 +317,7 @@ extern "C" {
* Source Select (Frame Size)
* Mask */
#define XVTC_CTL_ALLSS_MASK 0x03F5EF00 /**< Bit mask for all source
#define XVTC_CTL_ALLSS_MASK 0x03FDEF00 /**< Bit mask for all source
* select Mask */
//#define XVTC_CTL_LP_MASK 0x00000008 /**< Lock Polarity */
#define XVTC_CTL_SE_MASK 0x00000020 /**< Enable Sync with Detector */