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sdps: Polled for transfer complete for cmd6.

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This patch does following things:
Added polling for transfer complete for cmd6 in case
of eMMC and MMC card.
Added 2.0 controller version check in case of eMMC to
switch for High speed mode in Zynq.
Added check for eMMC card, since HS200 mode switching
will only support by eMMC.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
This commit is contained in:
P L Sai Krishna 2015-10-20 18:08:27 +05:30 • committed by Nava kishore Manne
parent 08f242df8b
commit 56ea0274df
2 changed files with 52 additions and 2 deletions
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5
XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
View file

@ -628,7 +628,8 @@ static u8 ExtCsd[512] __attribute__ ((aligned(32)));
}
}
} else if (InstancePtr->CardType == XSDPS_CARD_MMC) {
} else if ((InstancePtr->CardType == XSDPS_CARD_MMC) &&
(InstancePtr->HC_Version == XSDPS_HC_SPEC_V2)) {
Status = XSdPs_Change_BusWidth(InstancePtr);
if (Status != XST_SUCCESS) {
@ -666,7 +667,7 @@ static u8 ExtCsd[512] __attribute__ ((aligned(32)));
goto RETURN_PATH;
}
}
} else {
} else if (InstancePtr->CardType == XSDPS_CHIP_EMMC){
/* Change bus width to 8-bit */
Status = XSdPs_Change_BusWidth(InstancePtr);
if (Status != XST_SUCCESS) {

49
XilinxProcessorIPLib/drivers/sdps/src/xsdps_options.c
View file

@ -507,6 +507,31 @@ s32 XSdPs_Change_BusSpeed(XSdPs *InstancePtr)
Status = XST_FAILURE;
goto RETURN_PATH;
}
/*
* Check for transfer complete
*/
do {
StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
XSDPS_NORM_INTR_STS_OFFSET);
if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
/*
* Write to clear error bits
*/
XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
XSDPS_ERR_INTR_STS_OFFSET,
XSDPS_ERROR_INTR_ALL_MASK);
Status = XST_FAILURE;
goto RETURN_PATH;
}
} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
/*
* Write to clear bit
*/
XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
/* Change the clock frequency to 52 MHz */
InstancePtr->BusSpeed = XSDPS_CLK_52_MHZ;
Status = XSdPs_Change_ClkFreq(InstancePtr, XSDPS_CLK_52_MHZ);
@ -523,6 +548,30 @@ s32 XSdPs_Change_BusSpeed(XSdPs *InstancePtr)
goto RETURN_PATH;
}
/*
* Check for transfer complete
*/
do {
StatusReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
XSDPS_NORM_INTR_STS_OFFSET);
if ((StatusReg & XSDPS_INTR_ERR_MASK) != 0U) {
/*
* Write to clear error bits
*/
XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
XSDPS_ERR_INTR_STS_OFFSET,
XSDPS_ERROR_INTR_ALL_MASK);
Status = XST_FAILURE;
goto RETURN_PATH;
}
} while ((StatusReg & XSDPS_INTR_TC_MASK) == 0U);
/*
* Write to clear bit
*/
XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
XSDPS_NORM_INTR_STS_OFFSET, XSDPS_INTR_TC_MASK);
/* Change the clock frequency to 200 MHz */
InstancePtr->BusSpeed = XSDPS_MMC_HS200_MAX_CLK;