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emacps: Select interrupt ID in example based on instance present

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Different GEM instances are present on evaluation and emulation platforms
of Zynq Ultrascale+ MPSoC.
To allow for automatic testing, select XPS_GEMx_INTR_ID based on the
PSU_<> present. Left initial definition intact for Zynq.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
This commit is contained in:
Harini Katakam 2015-10-15 16:46:03 +05:30 • committed by Nava kishore Manne
parent d29d6bdcd0
commit 62177f1717
1 changed files with 15 additions and 1 deletions
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16
XilinxProcessorIPLib/drivers/emacps/examples/xemacps_example_intr_dma.c
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@ -106,8 +106,9 @@
* 3.0 kpc 01/23/14 Removed PEEP board related code
* 3.0 hk 03/18/15 Added support for jumbo frames.
* Add cache flush after BD terminate entries.
* 3.2 hk 09/30/15 Added clock control using CRL_APB_GEM_REF_CTRL register.
* 3.2 hk 10/15/15 Added clock control using CRL_APB_GEM_REF_CTRL register.
* Enabled 1G speed for ZynqMP GEM.
* Select GEM interrupt based on instance present.
*
* </pre>
*
@ -129,6 +130,19 @@
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
#define EMACPS_IRPT_INTR XPS_GEM0_INT_ID
#ifdef XPAR_PSU_ETHERNET_3_DEVICE_ID
#define EMACPS_IRPT_INTR XPS_GEM3_INT_ID
#endif
#ifdef XPAR_PSU_ETHERNET_2_DEVICE_ID
#define EMACPS_IRPT_INTR XPS_GEM2_INT_ID
#endif
#ifdef XPAR_PSU_ETHERNET_1_DEVICE_ID
#define EMACPS_IRPT_INTR XPS_GEM1_INT_ID
#endif
#ifdef XPAR_PSU_ETHERNET_0_DEVICE_ID
#define EMACPS_IRPT_INTR XPS_GEM0_INT_ID
#endif
#define RXBD_CNT 32 /* Number of RxBDs to use */
#define TXBD_CNT 32 /* Number of TxBDs to use */